2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
4 * Based on alpha version.
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
12 #ifndef _ASM_POWERPC_OPROFILE_IMPL_H
13 #define _ASM_POWERPC_OPROFILE_IMPL_H
16 #define OP_MAX_COUNTER 8
18 /* Per-counter configuration as set via oprofilefs. */
19 struct op_counter_config
{
23 unsigned long enabled
;
26 /* Classic doesn't support per-counter user/kernel selection */
29 unsigned long unit_mask
;
32 /* System-wide configuration as set via oprofilefs. */
33 struct op_system_config
{
39 unsigned long enable_kernel
;
40 unsigned long enable_user
;
42 unsigned long backtrace_spinlocks
;
46 /* Per-arch configuration */
47 struct op_powerpc_model
{
48 void (*reg_setup
) (struct op_counter_config
*,
49 struct op_system_config
*,
51 void (*cpu_setup
) (void *);
52 void (*start
) (struct op_counter_config
*);
54 void (*handle_interrupt
) (struct pt_regs
*,
55 struct op_counter_config
*);
59 #ifdef CONFIG_FSL_BOOKE
60 extern struct op_powerpc_model op_model_fsl_booke
;
61 #else /* Otherwise, it's classic */
64 extern struct op_powerpc_model op_model_rs64
;
65 extern struct op_powerpc_model op_model_power4
;
67 #else /* Otherwise, CONFIG_PPC32 */
68 extern struct op_powerpc_model op_model_7450
;
71 /* All the classic PPC parts use these */
72 static inline unsigned int ctr_read(unsigned int i
)
76 return mfspr(SPRN_PMC1
);
78 return mfspr(SPRN_PMC2
);
80 return mfspr(SPRN_PMC3
);
82 return mfspr(SPRN_PMC4
);
84 return mfspr(SPRN_PMC5
);
86 return mfspr(SPRN_PMC6
);
88 /* No PPC32 chip has more than 6 so far */
91 return mfspr(SPRN_PMC7
);
93 return mfspr(SPRN_PMC8
);
100 static inline void ctr_write(unsigned int i
, unsigned int val
)
104 mtspr(SPRN_PMC1
, val
);
107 mtspr(SPRN_PMC2
, val
);
110 mtspr(SPRN_PMC3
, val
);
113 mtspr(SPRN_PMC4
, val
);
116 mtspr(SPRN_PMC5
, val
);
119 mtspr(SPRN_PMC6
, val
);
122 /* No PPC32 chip has more than 6, yet */
125 mtspr(SPRN_PMC7
, val
);
128 mtspr(SPRN_PMC8
, val
);
135 #endif /* !CONFIG_FSL_BOOKE */
137 #endif /* __KERNEL__ */
138 #endif /* _ASM_POWERPC_OPROFILE_IMPL_H */