2 * linux/arch/x86_64/entry.S
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
8 * entry.S contains the system-call and fault low-level handling routines.
10 * Some of this is documented in Documentation/x86/entry_64.txt
12 * A note on terminology:
13 * - iret frame: Architecture defined interrupt frame from SS to RIP
14 * at the top of the kernel process stack.
17 * - ENTRY/END: Define functions in the symbol table.
18 * - TRACE_IRQ_*: Trace hardirq state for lock debugging.
19 * - idtentry: Define exception entry points.
21 #include <linux/linkage.h>
22 #include <asm/segment.h>
23 #include <asm/cache.h>
24 #include <asm/errno.h>
26 #include <asm/asm-offsets.h>
28 #include <asm/unistd.h>
29 #include <asm/thread_info.h>
30 #include <asm/hw_irq.h>
31 #include <asm/page_types.h>
32 #include <asm/irqflags.h>
33 #include <asm/paravirt.h>
34 #include <asm/percpu.h>
37 #include <asm/pgtable_types.h>
38 #include <linux/err.h>
40 /* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
41 #include <linux/elf-em.h>
42 #define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
43 #define __AUDIT_ARCH_64BIT 0x80000000
44 #define __AUDIT_ARCH_LE 0x40000000
47 .section .entry.text, "ax"
49 #ifdef CONFIG_PARAVIRT
50 ENTRY(native_usergs_sysret64)
53 ENDPROC(native_usergs_sysret64)
54 #endif /* CONFIG_PARAVIRT */
56 .macro TRACE_IRQS_IRETQ
57 #ifdef CONFIG_TRACE_IRQFLAGS
58 bt $9, EFLAGS(%rsp) /* interrupts off? */
66 * When dynamic function tracer is enabled it will add a breakpoint
67 * to all locations that it is about to modify, sync CPUs, update
68 * all the code, sync CPUs, then remove the breakpoints. In this time
69 * if lockdep is enabled, it might jump back into the debug handler
70 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
72 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
73 * make sure the stack pointer does not get reset back to the top
74 * of the debug stack, and instead just reuses the current stack.
76 #if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
78 .macro TRACE_IRQS_OFF_DEBUG
79 call debug_stack_set_zero
81 call debug_stack_reset
84 .macro TRACE_IRQS_ON_DEBUG
85 call debug_stack_set_zero
87 call debug_stack_reset
90 .macro TRACE_IRQS_IRETQ_DEBUG
91 bt $9, EFLAGS(%rsp) /* interrupts off? */
98 # define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
99 # define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
100 # define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
104 * 64-bit SYSCALL instruction entry. Up to 6 arguments in registers.
106 * 64-bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
107 * then loads new ss, cs, and rip from previously programmed MSRs.
108 * rflags gets masked by a value from another MSR (so CLD and CLAC
109 * are not needed). SYSCALL does not save anything on the stack
110 * and does not change rsp.
112 * Registers on entry:
113 * rax system call number
115 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
119 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
122 * (note: r12-r15, rbp, rbx are callee-preserved in C ABI)
124 * Only called from user space.
126 * When user can change pt_regs->foo always force IRET. That is because
127 * it deals with uncanonical addresses better. SYSRET has trouble
128 * with them due to bugs in both AMD and Intel CPUs.
131 ENTRY(entry_SYSCALL_64)
133 * Interrupts are off on entry.
134 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
135 * it is too small to ever cause noticeable irq latency.
139 * A hypervisor implementation might want to use a label
140 * after the swapgs, so that it can do the swapgs
141 * for the guest and jump here on syscall.
143 GLOBAL(entry_SYSCALL_64_after_swapgs)
145 movq %rsp, PER_CPU_VAR(rsp_scratch)
146 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
148 /* Construct struct pt_regs on stack */
149 pushq $__USER_DS /* pt_regs->ss */
150 pushq PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
152 * Re-enable interrupts.
153 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
154 * must execute atomically in the face of possible interrupt-driven
155 * task preemption. We must enable interrupts only after we're done
156 * with using rsp_scratch:
158 ENABLE_INTERRUPTS(CLBR_NONE)
159 pushq %r11 /* pt_regs->flags */
160 pushq $__USER_CS /* pt_regs->cs */
161 pushq %rcx /* pt_regs->ip */
162 pushq %rax /* pt_regs->orig_ax */
163 pushq %rdi /* pt_regs->di */
164 pushq %rsi /* pt_regs->si */
165 pushq %rdx /* pt_regs->dx */
166 pushq %rcx /* pt_regs->cx */
167 pushq $-ENOSYS /* pt_regs->ax */
168 pushq %r8 /* pt_regs->r8 */
169 pushq %r9 /* pt_regs->r9 */
170 pushq %r10 /* pt_regs->r10 */
171 pushq %r11 /* pt_regs->r11 */
172 sub $(6*8), %rsp /* pt_regs->bp, bx, r12-15 not saved */
174 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
176 entry_SYSCALL_64_fastpath:
177 #if __SYSCALL_MASK == ~0
178 cmpq $__NR_syscall_max, %rax
180 andl $__SYSCALL_MASK, %eax
181 cmpl $__NR_syscall_max, %eax
183 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
185 call *sys_call_table(, %rax, 8)
189 * Syscall return path ending with SYSRET (fast path).
190 * Has incompletely filled pt_regs.
194 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
195 * it is too small to ever cause noticeable irq latency.
197 DISABLE_INTERRUPTS(CLBR_NONE)
200 * We must check ti flags with interrupts (or at least preemption)
201 * off because we must *never* return to userspace without
202 * processing exit work that is enqueued if we're preempted here.
203 * In particular, returning to userspace with any of the one-shot
204 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
207 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
208 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
210 RESTORE_C_REGS_EXCEPT_RCX_R11
212 movq EFLAGS(%rsp), %r11
215 * 64-bit SYSRET restores rip from rcx,
216 * rflags from r11 (but RF and VM bits are forced to 0),
217 * cs and ss are loaded from MSRs.
218 * Restoration of rflags re-enables interrupts.
220 * NB: On AMD CPUs with the X86_BUG_SYSRET_SS_ATTRS bug, the ss
221 * descriptor is not reinitialized. This means that we should
222 * avoid SYSRET with SS == NULL, which could happen if we schedule,
223 * exit the kernel, and re-enter using an interrupt vector. (All
224 * interrupt entries on x86_64 set SS to NULL.) We prevent that
225 * from happening by reloading SS in __switch_to. (Actually
226 * detecting the failure in 64-bit userspace is tricky but can be
231 GLOBAL(int_ret_from_sys_call_irqs_off)
233 ENABLE_INTERRUPTS(CLBR_NONE)
234 jmp int_ret_from_sys_call
236 /* Do syscall entry tracing */
239 movl $AUDIT_ARCH_X86_64, %esi
240 call syscall_trace_enter_phase1
242 jnz tracesys_phase2 /* if needed, run the slow path */
243 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
244 movq ORIG_RAX(%rsp), %rax
245 jmp entry_SYSCALL_64_fastpath /* and return to the fast path */
250 movl $AUDIT_ARCH_X86_64, %esi
252 call syscall_trace_enter_phase2
255 * Reload registers from stack in case ptrace changed them.
256 * We don't reload %rax because syscall_trace_entry_phase2() returned
257 * the value it wants us to use in the table lookup.
259 RESTORE_C_REGS_EXCEPT_RAX
261 #if __SYSCALL_MASK == ~0
262 cmpq $__NR_syscall_max, %rax
264 andl $__SYSCALL_MASK, %eax
265 cmpl $__NR_syscall_max, %eax
267 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
268 movq %r10, %rcx /* fixup for C */
269 call *sys_call_table(, %rax, 8)
272 /* Use IRET because user could have changed pt_regs->foo */
275 * Syscall return path ending with IRET.
276 * Has correct iret frame.
278 GLOBAL(int_ret_from_sys_call)
281 call syscall_return_slowpath /* returns with IRQs disabled */
283 TRACE_IRQS_IRETQ /* we're about to change IF */
286 * Try to use SYSRET instead of IRET if we're returning to
287 * a completely clean 64-bit userspace context.
291 cmpq %rcx, %r11 /* RCX == RIP */
292 jne opportunistic_sysret_failed
295 * On Intel CPUs, SYSRET with non-canonical RCX/RIP will #GP
296 * in kernel space. This essentially lets the user take over
297 * the kernel, since userspace controls RSP.
299 * If width of "canonical tail" ever becomes variable, this will need
300 * to be updated to remain correct on both old and new CPUs.
302 .ifne __VIRTUAL_MASK_SHIFT - 47
303 .error "virtual address width changed -- SYSRET checks need update"
306 /* Change top 16 bits to be the sign-extension of 47th bit */
307 shl $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
308 sar $(64 - (__VIRTUAL_MASK_SHIFT+1)), %rcx
310 /* If this changed %rcx, it was not canonical */
312 jne opportunistic_sysret_failed
314 cmpq $__USER_CS, CS(%rsp) /* CS must match SYSRET */
315 jne opportunistic_sysret_failed
318 cmpq %r11, EFLAGS(%rsp) /* R11 == RFLAGS */
319 jne opportunistic_sysret_failed
322 * SYSRET can't restore RF. SYSRET can restore TF, but unlike IRET,
323 * restoring TF results in a trap from userspace immediately after
324 * SYSRET. This would cause an infinite loop whenever #DB happens
325 * with register state that satisfies the opportunistic SYSRET
326 * conditions. For example, single-stepping this user code:
328 * movq $stuck_here, %rcx
333 * would never get past 'stuck_here'.
335 testq $(X86_EFLAGS_RF|X86_EFLAGS_TF), %r11
336 jnz opportunistic_sysret_failed
338 /* nothing to check for RSP */
340 cmpq $__USER_DS, SS(%rsp) /* SS must match SYSRET */
341 jne opportunistic_sysret_failed
344 * We win! This label is here just for ease of understanding
345 * perf profiles. Nothing jumps here.
347 syscall_return_via_sysret:
348 /* rcx and r11 are already restored (see code above) */
349 RESTORE_C_REGS_EXCEPT_RCX_R11
353 opportunistic_sysret_failed:
355 jmp restore_c_regs_and_iret
356 END(entry_SYSCALL_64)
359 .macro FORK_LIKE func
375 /* exec failed, can use fast SYSRET code path in this case */
378 /* must use IRET code path (pt_regs->cs may have changed) */
382 jmp int_ret_from_sys_call
385 * Remaining execve stubs are only 7 bytes long.
386 * ENTRY() often aligns to 16 bytes, which in this case has no benefits.
389 GLOBAL(stub_execveat)
391 jmp return_from_execve
394 #if defined(CONFIG_X86_X32_ABI)
396 GLOBAL(stub_x32_execve)
397 call compat_sys_execve
398 jmp return_from_execve
401 GLOBAL(stub_x32_execveat)
402 call compat_sys_execveat
403 jmp return_from_execve
404 END(stub_x32_execveat)
408 * sigreturn is special because it needs to restore all registers on return.
409 * This cannot be done with SYSRET, so use the IRET return path instead.
411 ENTRY(stub_rt_sigreturn)
413 * SAVE_EXTRA_REGS result is not normally needed:
414 * sigreturn overwrites all pt_regs->GPREGS.
415 * But sigreturn can fail (!), and there is no easy way to detect that.
416 * To make sure RESTORE_EXTRA_REGS doesn't restore garbage on error,
417 * we SAVE_EXTRA_REGS here.
420 call sys_rt_sigreturn
425 jmp int_ret_from_sys_call
426 END(stub_rt_sigreturn)
428 #ifdef CONFIG_X86_X32_ABI
429 ENTRY(stub_x32_rt_sigreturn)
431 call sys32_x32_rt_sigreturn
433 END(stub_x32_rt_sigreturn)
437 * A newly forked process directly context switches into this address.
439 * rdi: prev task we switched from
443 LOCK ; btr $TIF_FORK, TI_flags(%r8)
446 popfq /* reset kernel eflags */
448 call schedule_tail /* rdi: 'prev' task parameter */
452 testb $3, CS(%rsp) /* from kernel_thread? */
455 * By the time we get here, we have no idea whether our pt_regs,
456 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
457 * the slow path, or one of the 32-bit compat paths.
458 * Use IRET code path to return, since it can safely handle
461 jnz int_ret_from_sys_call
464 * We came from kernel_thread
465 * nb: we depend on RESTORE_EXTRA_REGS above
471 jmp int_ret_from_sys_call
475 * Build the entry stubs with some assembler magic.
476 * We pack 1 stub into every 8-byte block.
479 ENTRY(irq_entries_start)
480 vector=FIRST_EXTERNAL_VECTOR
481 .rept (FIRST_SYSTEM_VECTOR - FIRST_EXTERNAL_VECTOR)
482 pushq $(~vector+0x80) /* Note: always in signed byte range */
487 END(irq_entries_start)
490 * Interrupt entry/exit.
492 * Interrupt entry points save only callee clobbered registers in fast path.
494 * Entry runs with interrupts off.
497 /* 0(%rsp): ~(interrupt number) */
498 .macro interrupt func
500 ALLOC_PT_GPREGS_ON_STACK
508 * IRQ from user mode. Switch to kernel gsbase and inform context
509 * tracking that we're in kernel mode.
514 * We need to tell lockdep that IRQs are off. We can't do this until
515 * we fix gsbase, and we should do it before enter_from_user_mode
516 * (which can take locks). Since TRACE_IRQS_OFF idempotent,
517 * the simplest way to handle it is to just call it twice if
518 * we enter from user mode. There's no reason to optimize this since
519 * TRACE_IRQS_OFF is a no-op if lockdep is off.
523 CALL_enter_from_user_mode
527 * Save previous stack pointer, optionally switch to interrupt stack.
528 * irq_count is used to check if a CPU is already on an interrupt stack
529 * or not. While this is essentially redundant with preempt_count it is
530 * a little cheaper to use a separate counter in the PDA (short of
531 * moving irq_enter into assembly, which would be too much work)
534 incl PER_CPU_VAR(irq_count)
535 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
537 /* We entered an interrupt context - irqs are off: */
540 call \func /* rdi points to pt_regs */
544 * The interrupt stubs push (~vector+0x80) onto the stack and
545 * then jump to common_interrupt.
547 .p2align CONFIG_X86_L1_CACHE_SHIFT
550 addq $-0x80, (%rsp) /* Adjust vector to [-256, -1] range */
552 /* 0(%rsp): old RSP */
554 DISABLE_INTERRUPTS(CLBR_NONE)
556 decl PER_CPU_VAR(irq_count)
558 /* Restore saved previous stack */
564 /* Interrupt came from user space */
567 call prepare_exit_to_usermode
570 jmp restore_regs_and_iret
572 /* Returning to kernel space */
574 #ifdef CONFIG_PREEMPT
575 /* Interrupts are off */
576 /* Check if we need preemption */
577 bt $9, EFLAGS(%rsp) /* were interrupts off? */
579 0: cmpl $0, PER_CPU_VAR(__preempt_count)
581 call preempt_schedule_irq
586 * The iretq could re-enable interrupts:
591 * At this label, code paths which return to kernel and to user,
592 * which come from interrupts/exception and from syscalls, merge.
594 GLOBAL(restore_regs_and_iret)
596 restore_c_regs_and_iret:
598 REMOVE_PT_GPREGS_FROM_STACK 8
603 * Are we returning to a stack segment from the LDT? Note: in
604 * 64-bit mode SS:RSP on the exception stack is always valid.
606 #ifdef CONFIG_X86_ESPFIX64
607 testb $4, (SS-RIP)(%rsp)
608 jnz native_irq_return_ldt
611 .global native_irq_return_iret
612 native_irq_return_iret:
614 * This may fault. Non-paranoid faults on return to userspace are
615 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
616 * Double-faults due to espfix64 are handled in do_double_fault.
617 * Other faults here are fatal.
621 #ifdef CONFIG_X86_ESPFIX64
622 native_irq_return_ldt:
626 movq PER_CPU_VAR(espfix_waddr), %rdi
627 movq %rax, (0*8)(%rdi) /* RAX */
628 movq (2*8)(%rsp), %rax /* RIP */
629 movq %rax, (1*8)(%rdi)
630 movq (3*8)(%rsp), %rax /* CS */
631 movq %rax, (2*8)(%rdi)
632 movq (4*8)(%rsp), %rax /* RFLAGS */
633 movq %rax, (3*8)(%rdi)
634 movq (6*8)(%rsp), %rax /* SS */
635 movq %rax, (5*8)(%rdi)
636 movq (5*8)(%rsp), %rax /* RSP */
637 movq %rax, (4*8)(%rdi)
638 andl $0xffff0000, %eax
640 orq PER_CPU_VAR(espfix_stack), %rax
644 jmp native_irq_return_iret
646 END(common_interrupt)
651 .macro apicinterrupt3 num sym do_sym
661 #ifdef CONFIG_TRACING
662 #define trace(sym) trace_##sym
663 #define smp_trace(sym) smp_trace_##sym
665 .macro trace_apicinterrupt num sym
666 apicinterrupt3 \num trace(\sym) smp_trace(\sym)
669 .macro trace_apicinterrupt num sym do_sym
673 .macro apicinterrupt num sym do_sym
674 apicinterrupt3 \num \sym \do_sym
675 trace_apicinterrupt \num \sym
679 apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
680 apicinterrupt3 REBOOT_VECTOR reboot_interrupt smp_reboot_interrupt
684 apicinterrupt3 UV_BAU_MESSAGE uv_bau_message_intr1 uv_bau_message_interrupt
687 apicinterrupt LOCAL_TIMER_VECTOR apic_timer_interrupt smp_apic_timer_interrupt
688 apicinterrupt X86_PLATFORM_IPI_VECTOR x86_platform_ipi smp_x86_platform_ipi
690 #ifdef CONFIG_HAVE_KVM
691 apicinterrupt3 POSTED_INTR_VECTOR kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
692 apicinterrupt3 POSTED_INTR_WAKEUP_VECTOR kvm_posted_intr_wakeup_ipi smp_kvm_posted_intr_wakeup_ipi
695 #ifdef CONFIG_X86_MCE_THRESHOLD
696 apicinterrupt THRESHOLD_APIC_VECTOR threshold_interrupt smp_threshold_interrupt
699 #ifdef CONFIG_X86_MCE_AMD
700 apicinterrupt DEFERRED_ERROR_VECTOR deferred_error_interrupt smp_deferred_error_interrupt
703 #ifdef CONFIG_X86_THERMAL_VECTOR
704 apicinterrupt THERMAL_APIC_VECTOR thermal_interrupt smp_thermal_interrupt
708 apicinterrupt CALL_FUNCTION_SINGLE_VECTOR call_function_single_interrupt smp_call_function_single_interrupt
709 apicinterrupt CALL_FUNCTION_VECTOR call_function_interrupt smp_call_function_interrupt
710 apicinterrupt RESCHEDULE_VECTOR reschedule_interrupt smp_reschedule_interrupt
713 apicinterrupt ERROR_APIC_VECTOR error_interrupt smp_error_interrupt
714 apicinterrupt SPURIOUS_APIC_VECTOR spurious_interrupt smp_spurious_interrupt
716 #ifdef CONFIG_IRQ_WORK
717 apicinterrupt IRQ_WORK_VECTOR irq_work_interrupt smp_irq_work_interrupt
721 * Exception entry points.
723 #define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
725 .macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
728 .if \shift_ist != -1 && \paranoid == 0
729 .error "using shift_ist requires paranoid=1"
733 PARAVIRT_ADJUST_EXCEPTION_FRAME
735 .ifeq \has_error_code
736 pushq $-1 /* ORIG_RAX: no syscall to restart */
739 ALLOC_PT_GPREGS_ON_STACK
743 testb $3, CS(%rsp) /* If coming from userspace, switch stacks */
750 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
754 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
760 movq %rsp, %rdi /* pt_regs pointer */
763 movq ORIG_RAX(%rsp), %rsi /* get error code */
764 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
766 xorl %esi, %esi /* no error code */
770 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
776 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
779 /* these procedures expect "no swapgs" flag in ebx */
788 * Paranoid entry from userspace. Switch stacks and treat it
789 * as a normal entry. This means that paranoid handlers
790 * run in real process context if user_mode(regs).
796 movq %rsp, %rdi /* pt_regs pointer */
798 movq %rax, %rsp /* switch stack */
800 movq %rsp, %rdi /* pt_regs pointer */
803 movq ORIG_RAX(%rsp), %rsi /* get error code */
804 movq $-1, ORIG_RAX(%rsp) /* no syscall to restart */
806 xorl %esi, %esi /* no error code */
811 jmp error_exit /* %ebx: no swapgs flag */
816 #ifdef CONFIG_TRACING
817 .macro trace_idtentry sym do_sym has_error_code:req
818 idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
819 idtentry \sym \do_sym has_error_code=\has_error_code
822 .macro trace_idtentry sym do_sym has_error_code:req
823 idtentry \sym \do_sym has_error_code=\has_error_code
827 idtentry divide_error do_divide_error has_error_code=0
828 idtentry overflow do_overflow has_error_code=0
829 idtentry bounds do_bounds has_error_code=0
830 idtentry invalid_op do_invalid_op has_error_code=0
831 idtentry device_not_available do_device_not_available has_error_code=0
832 idtentry double_fault do_double_fault has_error_code=1 paranoid=2
833 idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
834 idtentry invalid_TSS do_invalid_TSS has_error_code=1
835 idtentry segment_not_present do_segment_not_present has_error_code=1
836 idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
837 idtentry coprocessor_error do_coprocessor_error has_error_code=0
838 idtentry alignment_check do_alignment_check has_error_code=1
839 idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
843 * Reload gs selector with exception handling
846 ENTRY(native_load_gs_index)
848 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
852 2: mfence /* workaround */
856 END(native_load_gs_index)
858 _ASM_EXTABLE(gs_change, bad_gs)
859 .section .fixup, "ax"
860 /* running with kernelgs */
862 SWAPGS /* switch back to user gs */
868 /* Call softirq on interrupt stack. Interrupts are off. */
869 ENTRY(do_softirq_own_stack)
872 incl PER_CPU_VAR(irq_count)
873 cmove PER_CPU_VAR(irq_stack_ptr), %rsp
874 push %rbp /* frame pointer backlink */
877 decl PER_CPU_VAR(irq_count)
879 END(do_softirq_own_stack)
882 idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
885 * A note on the "critical region" in our callback handler.
886 * We want to avoid stacking callback handlers due to events occurring
887 * during handling of the last event. To do this, we keep events disabled
888 * until we've done all processing. HOWEVER, we must enable events before
889 * popping the stack frame (can't be done atomically) and so it would still
890 * be possible to get enough handler activations to overflow the stack.
891 * Although unlikely, bugs of that kind are hard to track down, so we'd
892 * like to avoid the possibility.
893 * So, on entry to the handler we detect whether we interrupted an
894 * existing activation in its critical region -- if so, we pop the current
895 * activation and restart the handler using the previous one.
897 ENTRY(xen_do_hypervisor_callback) /* do_hypervisor_callback(struct *pt_regs) */
900 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
901 * see the correct pointer to the pt_regs
903 movq %rdi, %rsp /* we don't return, adjust the stack frame */
904 11: incl PER_CPU_VAR(irq_count)
906 cmovzq PER_CPU_VAR(irq_stack_ptr), %rsp
907 pushq %rbp /* frame pointer backlink */
908 call xen_evtchn_do_upcall
910 decl PER_CPU_VAR(irq_count)
911 #ifndef CONFIG_PREEMPT
912 call xen_maybe_preempt_hcall
915 END(xen_do_hypervisor_callback)
918 * Hypervisor uses this for application faults while it executes.
919 * We get here for two reasons:
920 * 1. Fault while reloading DS, ES, FS or GS
921 * 2. Fault while executing IRET
922 * Category 1 we do not need to fix up as Xen has already reloaded all segment
923 * registers that could be reloaded and zeroed the others.
924 * Category 2 we fix up by killing the current process. We cannot use the
925 * normal Linux return path in this case because if we use the IRET hypercall
926 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
927 * We distinguish between categories by comparing each saved segment register
928 * with its current contents: any discrepancy means we in category 1.
930 ENTRY(xen_failsafe_callback)
943 /* All segments match their saved values => Category 2 (Bad IRET). */
950 jmp general_protection
951 1: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
955 pushq $-1 /* orig_ax = -1 => not a system call */
956 ALLOC_PT_GPREGS_ON_STACK
960 END(xen_failsafe_callback)
962 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
963 xen_hvm_callback_vector xen_evtchn_do_upcall
965 #endif /* CONFIG_XEN */
967 #if IS_ENABLED(CONFIG_HYPERV)
968 apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
969 hyperv_callback_vector hyperv_vector_handler
970 #endif /* CONFIG_HYPERV */
972 idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
973 idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
974 idtentry stack_segment do_stack_segment has_error_code=1
977 idtentry xen_debug do_debug has_error_code=0
978 idtentry xen_int3 do_int3 has_error_code=0
979 idtentry xen_stack_segment do_stack_segment has_error_code=1
982 idtentry general_protection do_general_protection has_error_code=1
983 trace_idtentry page_fault do_page_fault has_error_code=1
985 #ifdef CONFIG_KVM_GUEST
986 idtentry async_page_fault do_async_page_fault has_error_code=1
989 #ifdef CONFIG_X86_MCE
990 idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
994 * Save all registers in pt_regs, and switch gs if needed.
995 * Use slow, but surefire "are we in kernel?" check.
996 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
998 ENTRY(paranoid_entry)
1003 movl $MSR_GS_BASE, %ecx
1006 js 1f /* negative -> in kernel */
1013 * "Paranoid" exit path from exception stack. This is invoked
1014 * only on return from non-NMI IST interrupts that came
1015 * from kernel space.
1017 * We may be returning to very strange contexts (e.g. very early
1018 * in syscall entry), so checking for preemption here would
1019 * be complicated. Fortunately, we there's no good reason
1020 * to try to handle preemption here.
1022 * On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it)
1024 ENTRY(paranoid_exit)
1025 DISABLE_INTERRUPTS(CLBR_NONE)
1026 TRACE_IRQS_OFF_DEBUG
1027 testl %ebx, %ebx /* swapgs needed? */
1028 jnz paranoid_exit_no_swapgs
1031 jmp paranoid_exit_restore
1032 paranoid_exit_no_swapgs:
1033 TRACE_IRQS_IRETQ_DEBUG
1034 paranoid_exit_restore:
1037 REMOVE_PT_GPREGS_FROM_STACK 8
1042 * Save all registers in pt_regs, and switch gs if needed.
1043 * Return: EBX=0: came from user mode; EBX=1: otherwise
1050 testb $3, CS+8(%rsp)
1051 jz .Lerror_kernelspace
1053 .Lerror_entry_from_usermode_swapgs:
1055 * We entered from user mode or we're pretending to have entered
1056 * from user mode due to an IRET fault.
1060 .Lerror_entry_from_usermode_after_swapgs:
1062 * We need to tell lockdep that IRQs are off. We can't do this until
1063 * we fix gsbase, and we should do it before enter_from_user_mode
1064 * (which can take locks).
1067 CALL_enter_from_user_mode
1075 * There are two places in the kernel that can potentially fault with
1076 * usergs. Handle them here. B stepping K8s sometimes report a
1077 * truncated RIP for IRET exceptions returning to compat mode. Check
1078 * for these here too.
1080 .Lerror_kernelspace:
1082 leaq native_irq_return_iret(%rip), %rcx
1083 cmpq %rcx, RIP+8(%rsp)
1085 movl %ecx, %eax /* zero extend */
1086 cmpq %rax, RIP+8(%rsp)
1088 cmpq $gs_change, RIP+8(%rsp)
1089 jne .Lerror_entry_done
1092 * hack: gs_change can fail with user gsbase. If this happens, fix up
1093 * gsbase and proceed. We'll fix up the exception and land in
1094 * gs_change's error handler with kernel gsbase.
1096 jmp .Lerror_entry_from_usermode_swapgs
1099 /* Fix truncated RIP */
1100 movq %rcx, RIP+8(%rsp)
1105 * We came from an IRET to user mode, so we have user gsbase.
1106 * Switch to kernel gsbase:
1111 * Pretend that the exception came from user mode: set up pt_regs
1112 * as if we faulted immediately after IRET and clear EBX so that
1113 * error_exit knows that we will be returning to user mode.
1119 jmp .Lerror_entry_from_usermode_after_swapgs
1124 * On entry, EBS is a "return to kernel mode" flag:
1125 * 1: already in kernel mode, don't need SWAPGS
1126 * 0: user gsbase is loaded, we need SWAPGS and standard preparation for return to usermode
1130 DISABLE_INTERRUPTS(CLBR_NONE)
1137 /* Runs on exception stack */
1140 * Fix up the exception frame if we're on Xen.
1141 * PARAVIRT_ADJUST_EXCEPTION_FRAME is guaranteed to push at most
1142 * one value to the stack on native, so it may clobber the rdx
1143 * scratch slot, but it won't clobber any of the important
1146 * Xen is a different story, because the Xen frame itself overlaps
1147 * the "NMI executing" variable.
1149 PARAVIRT_ADJUST_EXCEPTION_FRAME
1152 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1153 * the iretq it performs will take us out of NMI context.
1154 * This means that we can have nested NMIs where the next
1155 * NMI is using the top of the stack of the previous NMI. We
1156 * can't let it execute because the nested NMI will corrupt the
1157 * stack of the previous NMI. NMI handlers are not re-entrant
1160 * To handle this case we do the following:
1161 * Check the a special location on the stack that contains
1162 * a variable that is set when NMIs are executing.
1163 * The interrupted task's stack is also checked to see if it
1165 * If the variable is not set and the stack is not the NMI
1167 * o Set the special variable on the stack
1168 * o Copy the interrupt frame into an "outermost" location on the
1170 * o Copy the interrupt frame into an "iret" location on the stack
1171 * o Continue processing the NMI
1172 * If the variable is set or the previous stack is the NMI stack:
1173 * o Modify the "iret" location to jump to the repeat_nmi
1174 * o return back to the first NMI
1176 * Now on exit of the first NMI, we first clear the stack variable
1177 * The NMI stack will tell any nested NMIs at that point that it is
1178 * nested. Then we pop the stack normally with iret, and if there was
1179 * a nested NMI that updated the copy interrupt stack frame, a
1180 * jump will be made to the repeat_nmi code that will handle the second
1183 * However, espfix prevents us from directly returning to userspace
1184 * with a single IRET instruction. Similarly, IRET to user mode
1185 * can fault. We therefore handle NMIs from user space like
1186 * other IST entries.
1189 /* Use %rdx as our temp variable throughout */
1192 testb $3, CS-RIP+8(%rsp)
1193 jz .Lnmi_from_kernel
1196 * NMI from user mode. We need to run on the thread stack, but we
1197 * can't go through the normal entry paths: NMIs are masked, and
1198 * we don't want to enable interrupts, because then we'll end
1199 * up in an awkward situation in which IRQs are on but NMIs
1202 * We also must not push anything to the stack before switching
1203 * stacks lest we corrupt the "NMI executing" variable.
1209 movq PER_CPU_VAR(cpu_current_top_of_stack), %rsp
1210 pushq 5*8(%rdx) /* pt_regs->ss */
1211 pushq 4*8(%rdx) /* pt_regs->rsp */
1212 pushq 3*8(%rdx) /* pt_regs->flags */
1213 pushq 2*8(%rdx) /* pt_regs->cs */
1214 pushq 1*8(%rdx) /* pt_regs->rip */
1215 pushq $-1 /* pt_regs->orig_ax */
1216 pushq %rdi /* pt_regs->di */
1217 pushq %rsi /* pt_regs->si */
1218 pushq (%rdx) /* pt_regs->dx */
1219 pushq %rcx /* pt_regs->cx */
1220 pushq %rax /* pt_regs->ax */
1221 pushq %r8 /* pt_regs->r8 */
1222 pushq %r9 /* pt_regs->r9 */
1223 pushq %r10 /* pt_regs->r10 */
1224 pushq %r11 /* pt_regs->r11 */
1225 pushq %rbx /* pt_regs->rbx */
1226 pushq %rbp /* pt_regs->rbp */
1227 pushq %r12 /* pt_regs->r12 */
1228 pushq %r13 /* pt_regs->r13 */
1229 pushq %r14 /* pt_regs->r14 */
1230 pushq %r15 /* pt_regs->r15 */
1233 * At this point we no longer need to worry about stack damage
1234 * due to nesting -- we're on the normal thread stack and we're
1235 * done with the NMI stack.
1243 * Return back to user mode. We must *not* do the normal exit
1244 * work, because we don't want to enable interrupts. Fortunately,
1245 * do_nmi doesn't modify pt_regs.
1248 jmp restore_c_regs_and_iret
1252 * Here's what our stack frame will look like:
1253 * +---------------------------------------------------------+
1255 * | original Return RSP |
1256 * | original RFLAGS |
1259 * +---------------------------------------------------------+
1260 * | temp storage for rdx |
1261 * +---------------------------------------------------------+
1262 * | "NMI executing" variable |
1263 * +---------------------------------------------------------+
1264 * | iret SS } Copied from "outermost" frame |
1265 * | iret Return RSP } on each loop iteration; overwritten |
1266 * | iret RFLAGS } by a nested NMI to force another |
1267 * | iret CS } iteration if needed. |
1269 * +---------------------------------------------------------+
1270 * | outermost SS } initialized in first_nmi; |
1271 * | outermost Return RSP } will not be changed before |
1272 * | outermost RFLAGS } NMI processing is done. |
1273 * | outermost CS } Copied to "iret" frame on each |
1274 * | outermost RIP } iteration. |
1275 * +---------------------------------------------------------+
1277 * +---------------------------------------------------------+
1279 * The "original" frame is used by hardware. Before re-enabling
1280 * NMIs, we need to be done with it, and we need to leave enough
1281 * space for the asm code here.
1283 * We return by executing IRET while RSP points to the "iret" frame.
1284 * That will either return for real or it will loop back into NMI
1287 * The "outermost" frame is copied to the "iret" frame on each
1288 * iteration of the loop, so each iteration starts with the "iret"
1289 * frame pointing to the final return target.
1293 * Determine whether we're a nested NMI.
1295 * If we interrupted kernel code between repeat_nmi and
1296 * end_repeat_nmi, then we are a nested NMI. We must not
1297 * modify the "iret" frame because it's being written by
1298 * the outer NMI. That's okay; the outer NMI handler is
1299 * about to about to call do_nmi anyway, so we can just
1300 * resume the outer NMI.
1303 movq $repeat_nmi, %rdx
1306 movq $end_repeat_nmi, %rdx
1312 * Now check "NMI executing". If it's set, then we're nested.
1313 * This will not detect if we interrupted an outer NMI just
1320 * Now test if the previous stack was an NMI stack. This covers
1321 * the case where we interrupt an outer NMI after it clears
1322 * "NMI executing" but before IRET. We need to be careful, though:
1323 * there is one case in which RSP could point to the NMI stack
1324 * despite there being no NMI active: naughty userspace controls
1325 * RSP at the very beginning of the SYSCALL targets. We can
1326 * pull a fast one on naughty userspace, though: we program
1327 * SYSCALL to mask DF, so userspace cannot cause DF to be set
1328 * if it controls the kernel's RSP. We set DF before we clear
1332 /* Compare the NMI stack (rdx) with the stack we came from (4*8(%rsp)) */
1333 cmpq %rdx, 4*8(%rsp)
1334 /* If the stack pointer is above the NMI stack, this is a normal NMI */
1337 subq $EXCEPTION_STKSZ, %rdx
1338 cmpq %rdx, 4*8(%rsp)
1339 /* If it is below the NMI stack, it is a normal NMI */
1342 /* Ah, it is within the NMI stack. */
1344 testb $(X86_EFLAGS_DF >> 8), (3*8 + 1)(%rsp)
1345 jz first_nmi /* RSP was user controlled. */
1347 /* This is a nested NMI. */
1351 * Modify the "iret" frame to point to repeat_nmi, forcing another
1352 * iteration of NMI handling.
1355 leaq -10*8(%rsp), %rdx
1362 /* Put stack back */
1368 /* We are returning to kernel mode, so this cannot result in a fault. */
1375 /* Make room for "NMI executing". */
1378 /* Leave room for the "iret" frame */
1381 /* Copy the "original" frame to the "outermost" frame */
1386 /* Everything up to here is safe from nested NMIs */
1388 #ifdef CONFIG_DEBUG_ENTRY
1390 * For ease of testing, unmask NMIs right away. Disabled by
1391 * default because IRET is very expensive.
1394 pushq %rsp /* RSP (minus 8 because of the previous push) */
1395 addq $8, (%rsp) /* Fix up RSP */
1397 pushq $__KERNEL_CS /* CS */
1399 INTERRUPT_RETURN /* continues at repeat_nmi below */
1405 * If there was a nested NMI, the first NMI's iret will return
1406 * here. But NMIs are still enabled and we can take another
1407 * nested NMI. The nested NMI checks the interrupted RIP to see
1408 * if it is between repeat_nmi and end_repeat_nmi, and if so
1409 * it will just return, as we are about to repeat an NMI anyway.
1410 * This makes it safe to copy to the stack frame that a nested
1413 * RSP is pointing to "outermost RIP". gsbase is unknown, but, if
1414 * we're repeating an NMI, gsbase has the same value that it had on
1415 * the first iteration. paranoid_entry will load the kernel
1416 * gsbase if needed before we call do_nmi. "NMI executing"
1419 movq $1, 10*8(%rsp) /* Set "NMI executing". */
1422 * Copy the "outermost" frame to the "iret" frame. NMIs that nest
1423 * here must not modify the "iret" frame while we're writing to
1424 * it or it will end up containing garbage.
1434 * Everything below this point can be preempted by a nested NMI.
1435 * If this happens, then the inner NMI will change the "iret"
1436 * frame to point back to repeat_nmi.
1438 pushq $-1 /* ORIG_RAX: no syscall to restart */
1439 ALLOC_PT_GPREGS_ON_STACK
1442 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1443 * as we should not be calling schedule in NMI context.
1444 * Even with normal interrupts enabled. An NMI should not be
1445 * setting NEED_RESCHED or anything that normal interrupts and
1446 * exceptions might do.
1450 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1455 testl %ebx, %ebx /* swapgs needed? */
1463 /* Point RSP at the "iret" frame. */
1464 REMOVE_PT_GPREGS_FROM_STACK 6*8
1467 * Clear "NMI executing". Set DF first so that we can easily
1468 * distinguish the remaining code between here and IRET from
1469 * the SYSCALL entry and exit paths. On a native kernel, we
1470 * could just inspect RIP, but, on paravirt kernels,
1471 * INTERRUPT_RETURN can translate into a jump into a
1475 movq $0, 5*8(%rsp) /* clear "NMI executing" */
1478 * INTERRUPT_RETURN reads the "iret" frame and exits the NMI
1479 * stack in a single instruction. We are returning to kernel
1480 * mode, so this cannot result in a fault.
1485 ENTRY(ignore_sysret)