2 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License along
16 * with this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
22 * Purpose: Implement functions to access baseband
29 * BBuGetFrameTime - Calculate data frame transmitting time
30 * BBvCaculateParameter - Caculate PhyLength, PhyService and Phy Signal
31 * parameter for baseband Tx
32 * BBbReadEmbedded - Embedded read baseband register via MAC
33 * BBbWriteEmbedded - Embedded write baseband register via MAC
34 * BBbVT3253Init - VIA VT3253 baseband chip init code
37 * 06-10-2003 Bryan YC Fan: Re-write codes to support VT3253 spec.
38 * 08-07-2003 Bryan YC Fan: Add MAXIM2827/2825 and RFMD2959 support.
39 * 08-26-2003 Kyle Hsu : Modify BBuGetFrameTime() and BBvCalculateParameter().
40 * cancel the setting of MAC_REG_SOFTPWRCTL on BBbVT3253Init().
42 * 09-01-2003 Bryan YC Fan: RF & BB tables updated.
43 * Modified BBvLoopbackOn & BBvLoopbackOff().
54 /*--------------------- Static Classes ----------------------------*/
56 /*--------------------- Static Variables --------------------------*/
58 /*--------------------- Static Functions --------------------------*/
60 /*--------------------- Export Variables --------------------------*/
62 /*--------------------- Static Definitions -------------------------*/
64 /*--------------------- Static Classes ----------------------------*/
66 /*--------------------- Static Variables --------------------------*/
68 #define CB_VT3253_INIT_FOR_RFMD 446
69 static unsigned char byVT3253InitTab_RFMD
[CB_VT3253_INIT_FOR_RFMD
][2] = {
518 #define CB_VT3253B0_INIT_FOR_RFMD 256
519 static unsigned char byVT3253B0_RFMD
[CB_VT3253B0_INIT_FOR_RFMD
][2] = {
778 #define CB_VT3253B0_AGC_FOR_RFMD2959 195
780 static unsigned char byVT3253B0_AGC4_RFMD2959
[CB_VT3253B0_AGC_FOR_RFMD2959
][2] = {
978 #define CB_VT3253B0_INIT_FOR_AIROHA2230 256
980 static unsigned char byVT3253B0_AIROHA2230
[CB_VT3253B0_INIT_FOR_AIROHA2230
][2] = {
1089 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1239 #define CB_VT3253B0_INIT_FOR_UW2451 256
1241 static unsigned char byVT3253B0_UW2451
[CB_VT3253B0_INIT_FOR_UW2451
][2] = {
1350 {0x6c, 0x00}, /* RobertYu:20050125, request by JJSue */
1500 #define CB_VT3253B0_AGC 193
1502 static unsigned char byVT3253B0_AGC
[CB_VT3253B0_AGC
][2] = {
1698 static const unsigned short awcFrameTime
[MAX_RATE
] = {
1699 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
1702 /*--------------------- Export Variables --------------------------*/
1704 * Description: Calculate data frame transmitting time
1708 * byPreambleType - Preamble Type
1709 * byPktType - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
1710 * cbFrameLength - Baseband Type
1714 * Return Value: FrameTime
1719 unsigned char byPreambleType
,
1720 unsigned char byPktType
,
1721 unsigned int cbFrameLength
,
1722 unsigned short wRate
1725 unsigned int uFrameTime
;
1726 unsigned int uPreamble
;
1728 unsigned int uRateIdx
= (unsigned int) wRate
;
1729 unsigned int uRate
= 0;
1731 if (uRateIdx
> RATE_54M
)
1734 uRate
= (unsigned int)awcFrameTime
[uRateIdx
];
1736 if (uRateIdx
<= 3) { /* CCK mode */
1737 if (byPreambleType
== 1) /* Short */
1742 uFrameTime
= (cbFrameLength
* 80) / uRate
; /* ????? */
1743 uTmp
= (uFrameTime
* uRate
) / 80;
1744 if (cbFrameLength
!= uTmp
)
1747 return uPreamble
+ uFrameTime
;
1749 uFrameTime
= (cbFrameLength
* 8 + 22) / uRate
; /* ???????? */
1750 uTmp
= ((uFrameTime
* uRate
) - 22) / 8;
1751 if (cbFrameLength
!= uTmp
)
1754 uFrameTime
= uFrameTime
* 4; /* ??????? */
1755 if (byPktType
!= PK_TYPE_11A
)
1756 uFrameTime
+= 6; /* ?????? */
1758 return 20 + uFrameTime
; /* ?????? */
1762 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
1766 * priv - Device Structure
1767 * frame_length - Tx Frame Length
1770 * struct vnt_phy_field *phy
1771 * - pointer to Phy Length field
1772 * - pointer to Phy Service field
1773 * - pointer to Phy Signal field
1775 * Return Value: none
1778 void vnt_get_phy_field(struct vnt_private
*priv
, u32 frame_length
,
1779 u16 tx_rate
, u8 pkt_type
, struct vnt_phy_field
*phy
)
1785 u8 preamble_type
= priv
->byPreambleType
;
1787 bit_count
= frame_length
* 8;
1798 count
= bit_count
/ 2;
1800 if (preamble_type
== 1)
1807 count
= (bit_count
* 10) / 55;
1808 tmp
= (count
* 55) / 10;
1810 if (tmp
!= bit_count
)
1813 if (preamble_type
== 1)
1820 count
= bit_count
/ 11;
1823 if (tmp
!= bit_count
) {
1826 if ((bit_count
- tmp
) <= 3)
1830 if (preamble_type
== 1)
1837 if (pkt_type
== PK_TYPE_11A
)
1844 if (pkt_type
== PK_TYPE_11A
)
1851 if (pkt_type
== PK_TYPE_11A
)
1858 if (pkt_type
== PK_TYPE_11A
)
1865 if (pkt_type
== PK_TYPE_11A
)
1872 if (pkt_type
== PK_TYPE_11A
)
1879 if (pkt_type
== PK_TYPE_11A
)
1886 if (pkt_type
== PK_TYPE_11A
)
1892 if (pkt_type
== PK_TYPE_11A
)
1899 if (pkt_type
== PK_TYPE_11B
) {
1900 phy
->service
= 0x00;
1902 phy
->service
|= 0x80;
1903 phy
->len
= cpu_to_le16((u16
)count
);
1905 phy
->service
= 0x00;
1906 phy
->len
= cpu_to_le16((u16
)frame_length
);
1911 * Description: Read a byte from BASEBAND, by embedded programming
1915 * dwIoBase - I/O base address
1916 * byBBAddr - address of register in Baseband
1918 * pbyData - data read
1920 * Return Value: true if succeeded; false if failed.
1923 bool BBbReadEmbedded(struct vnt_private
*priv
,
1924 unsigned char byBBAddr
, unsigned char *pbyData
)
1926 void __iomem
*dwIoBase
= priv
->PortOffset
;
1928 unsigned char byValue
;
1931 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGADR
, byBBAddr
);
1934 MACvRegBitsOn(dwIoBase
, MAC_REG_BBREGCTL
, BBREGCTL_REGR
);
1935 /* W_MAX_TIMEOUT is the timeout period */
1936 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
1937 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGCTL
, &byValue
);
1938 if (byValue
& BBREGCTL_DONE
)
1943 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGDATA
, pbyData
);
1945 if (ww
== W_MAX_TIMEOUT
) {
1946 pr_debug(" DBG_PORT80(0x30)\n");
1953 * Description: Write a Byte to BASEBAND, by embedded programming
1957 * dwIoBase - I/O base address
1958 * byBBAddr - address of register in Baseband
1959 * byData - data to write
1963 * Return Value: true if succeeded; false if failed.
1966 bool BBbWriteEmbedded(struct vnt_private
*priv
,
1967 unsigned char byBBAddr
, unsigned char byData
)
1969 void __iomem
*dwIoBase
= priv
->PortOffset
;
1971 unsigned char byValue
;
1974 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGADR
, byBBAddr
);
1976 VNSvOutPortB(dwIoBase
+ MAC_REG_BBREGDATA
, byData
);
1978 /* turn on BBREGCTL_REGW */
1979 MACvRegBitsOn(dwIoBase
, MAC_REG_BBREGCTL
, BBREGCTL_REGW
);
1980 /* W_MAX_TIMEOUT is the timeout period */
1981 for (ww
= 0; ww
< W_MAX_TIMEOUT
; ww
++) {
1982 VNSvInPortB(dwIoBase
+ MAC_REG_BBREGCTL
, &byValue
);
1983 if (byValue
& BBREGCTL_DONE
)
1987 if (ww
== W_MAX_TIMEOUT
) {
1988 pr_debug(" DBG_PORT80(0x31)\n");
1995 * Description: VIA VT3253 Baseband chip init function
1999 * dwIoBase - I/O base address
2000 * byRevId - Revision ID
2001 * byRFType - RF type
2005 * Return Value: true if succeeded; false if failed.
2009 bool BBbVT3253Init(struct vnt_private
*priv
)
2011 bool bResult
= true;
2013 void __iomem
*dwIoBase
= priv
->PortOffset
;
2014 unsigned char byRFType
= priv
->byRFType
;
2015 unsigned char byLocalID
= priv
->byLocalID
;
2017 if (byRFType
== RF_RFMD2959
) {
2018 if (byLocalID
<= REV_ID_VT3253_A1
) {
2019 for (ii
= 0; ii
< CB_VT3253_INIT_FOR_RFMD
; ii
++)
2020 bResult
&= BBbWriteEmbedded(priv
,
2021 byVT3253InitTab_RFMD
[ii
][0],
2022 byVT3253InitTab_RFMD
[ii
][1]);
2025 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_RFMD
; ii
++)
2026 bResult
&= BBbWriteEmbedded(priv
,
2027 byVT3253B0_RFMD
[ii
][0],
2028 byVT3253B0_RFMD
[ii
][1]);
2030 for (ii
= 0; ii
< CB_VT3253B0_AGC_FOR_RFMD2959
; ii
++)
2031 bResult
&= BBbWriteEmbedded(priv
,
2032 byVT3253B0_AGC4_RFMD2959
[ii
][0],
2033 byVT3253B0_AGC4_RFMD2959
[ii
][1]);
2035 VNSvOutPortD(dwIoBase
+ MAC_REG_ITRTMSET
, 0x23);
2036 MACvRegBitsOn(dwIoBase
, MAC_REG_PAPEDELAY
, BIT(0));
2038 priv
->abyBBVGA
[0] = 0x18;
2039 priv
->abyBBVGA
[1] = 0x0A;
2040 priv
->abyBBVGA
[2] = 0x0;
2041 priv
->abyBBVGA
[3] = 0x0;
2042 priv
->ldBmThreshold
[0] = -70;
2043 priv
->ldBmThreshold
[1] = -50;
2044 priv
->ldBmThreshold
[2] = 0;
2045 priv
->ldBmThreshold
[3] = 0;
2046 } else if ((byRFType
== RF_AIROHA
) || (byRFType
== RF_AL2230S
)) {
2047 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2048 bResult
&= BBbWriteEmbedded(priv
,
2049 byVT3253B0_AIROHA2230
[ii
][0],
2050 byVT3253B0_AIROHA2230
[ii
][1]);
2052 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2053 bResult
&= BBbWriteEmbedded(priv
,
2054 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2056 priv
->abyBBVGA
[0] = 0x1C;
2057 priv
->abyBBVGA
[1] = 0x10;
2058 priv
->abyBBVGA
[2] = 0x0;
2059 priv
->abyBBVGA
[3] = 0x0;
2060 priv
->ldBmThreshold
[0] = -70;
2061 priv
->ldBmThreshold
[1] = -48;
2062 priv
->ldBmThreshold
[2] = 0;
2063 priv
->ldBmThreshold
[3] = 0;
2064 } else if (byRFType
== RF_UW2451
) {
2065 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_UW2451
; ii
++)
2066 bResult
&= BBbWriteEmbedded(priv
,
2067 byVT3253B0_UW2451
[ii
][0],
2068 byVT3253B0_UW2451
[ii
][1]);
2070 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2071 bResult
&= BBbWriteEmbedded(priv
,
2072 byVT3253B0_AGC
[ii
][0],
2073 byVT3253B0_AGC
[ii
][1]);
2075 VNSvOutPortB(dwIoBase
+ MAC_REG_ITRTMSET
, 0x23);
2076 MACvRegBitsOn(dwIoBase
, MAC_REG_PAPEDELAY
, BIT(0));
2078 priv
->abyBBVGA
[0] = 0x14;
2079 priv
->abyBBVGA
[1] = 0x0A;
2080 priv
->abyBBVGA
[2] = 0x0;
2081 priv
->abyBBVGA
[3] = 0x0;
2082 priv
->ldBmThreshold
[0] = -60;
2083 priv
->ldBmThreshold
[1] = -50;
2084 priv
->ldBmThreshold
[2] = 0;
2085 priv
->ldBmThreshold
[3] = 0;
2086 } else if (byRFType
== RF_UW2452
) {
2087 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_UW2451
; ii
++)
2088 bResult
&= BBbWriteEmbedded(priv
,
2089 byVT3253B0_UW2451
[ii
][0],
2090 byVT3253B0_UW2451
[ii
][1]);
2092 /* Init ANT B select,
2093 * TX Config CR09 = 0x61->0x45,
2094 * 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted)
2097 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2099 /* Init ANT B select,
2100 * RX Config CR10 = 0x28->0x2A,
2101 * 0x2A->0x28(VC1/VC2 define,
2102 * make the ANT_A, ANT_B inverted)
2105 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2106 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2107 bResult
&= BBbWriteEmbedded(priv
, 0xd7, 0x06);
2109 /* {{RobertYu:20050125, request by Jack */
2110 bResult
&= BBbWriteEmbedded(priv
, 0x90, 0x20);
2111 bResult
&= BBbWriteEmbedded(priv
, 0x97, 0xeb);
2114 /* {{RobertYu:20050221, request by Jack */
2115 bResult
&= BBbWriteEmbedded(priv
, 0xa6, 0x00);
2116 bResult
&= BBbWriteEmbedded(priv
, 0xa8, 0x30);
2118 bResult
&= BBbWriteEmbedded(priv
, 0xb0, 0x58);
2120 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2121 bResult
&= BBbWriteEmbedded(priv
,
2122 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2124 priv
->abyBBVGA
[0] = 0x14;
2125 priv
->abyBBVGA
[1] = 0x0A;
2126 priv
->abyBBVGA
[2] = 0x0;
2127 priv
->abyBBVGA
[3] = 0x0;
2128 priv
->ldBmThreshold
[0] = -60;
2129 priv
->ldBmThreshold
[1] = -50;
2130 priv
->ldBmThreshold
[2] = 0;
2131 priv
->ldBmThreshold
[3] = 0;
2134 } else if (byRFType
== RF_VT3226
) {
2135 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2136 bResult
&= BBbWriteEmbedded(priv
,
2137 byVT3253B0_AIROHA2230
[ii
][0],
2138 byVT3253B0_AIROHA2230
[ii
][1]);
2140 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2141 bResult
&= BBbWriteEmbedded(priv
,
2142 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2144 priv
->abyBBVGA
[0] = 0x1C;
2145 priv
->abyBBVGA
[1] = 0x10;
2146 priv
->abyBBVGA
[2] = 0x0;
2147 priv
->abyBBVGA
[3] = 0x0;
2148 priv
->ldBmThreshold
[0] = -70;
2149 priv
->ldBmThreshold
[1] = -48;
2150 priv
->ldBmThreshold
[2] = 0;
2151 priv
->ldBmThreshold
[3] = 0;
2152 /* Fix VT3226 DFC system timing issue */
2153 MACvSetRFLE_LatchBase(dwIoBase
);
2154 /* {{ RobertYu: 20050104 */
2155 } else if (byRFType
== RF_AIROHA7230
) {
2156 for (ii
= 0; ii
< CB_VT3253B0_INIT_FOR_AIROHA2230
; ii
++)
2157 bResult
&= BBbWriteEmbedded(priv
,
2158 byVT3253B0_AIROHA2230
[ii
][0],
2159 byVT3253B0_AIROHA2230
[ii
][1]);
2162 /* {{ RobertYu:20050223, request by JerryChung */
2163 /* Init ANT B select,TX Config CR09 = 0x61->0x45, 0x45->0x41(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2164 /*bResult &= BBbWriteEmbedded(dwIoBase,0x09,0x41);*/
2165 /* Init ANT B select,RX Config CR10 = 0x28->0x2A, 0x2A->0x28(VC1/VC2 define, make the ANT_A, ANT_B inverted) */
2166 /*bResult &= BBbWriteEmbedded(dwIoBase,0x0a,0x28);*/
2167 /* Select VC1/VC2, CR215 = 0x02->0x06 */
2168 bResult
&= BBbWriteEmbedded(priv
, 0xd7, 0x06);
2171 for (ii
= 0; ii
< CB_VT3253B0_AGC
; ii
++)
2172 bResult
&= BBbWriteEmbedded(priv
,
2173 byVT3253B0_AGC
[ii
][0], byVT3253B0_AGC
[ii
][1]);
2175 priv
->abyBBVGA
[0] = 0x1C;
2176 priv
->abyBBVGA
[1] = 0x10;
2177 priv
->abyBBVGA
[2] = 0x0;
2178 priv
->abyBBVGA
[3] = 0x0;
2179 priv
->ldBmThreshold
[0] = -70;
2180 priv
->ldBmThreshold
[1] = -48;
2181 priv
->ldBmThreshold
[2] = 0;
2182 priv
->ldBmThreshold
[3] = 0;
2185 /* No VGA Table now */
2186 priv
->bUpdateBBVGA
= false;
2187 priv
->abyBBVGA
[0] = 0x1C;
2190 if (byLocalID
> REV_ID_VT3253_A1
) {
2191 BBbWriteEmbedded(priv
, 0x04, 0x7F);
2192 BBbWriteEmbedded(priv
, 0x0D, 0x01);
2199 * Description: Set ShortSlotTime mode
2203 * priv - Device Structure
2207 * Return Value: none
2211 BBvSetShortSlotTime(struct vnt_private
*priv
)
2213 unsigned char byBBRxConf
= 0;
2214 unsigned char byBBVGA
= 0;
2216 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2218 if (priv
->bShortSlotTime
)
2219 byBBRxConf
&= 0xDF; /* 1101 1111 */
2221 byBBRxConf
|= 0x20; /* 0010 0000 */
2223 /* patch for 3253B0 Baseband with Cardbus module */
2224 BBbReadEmbedded(priv
, 0xE7, &byBBVGA
);
2225 if (byBBVGA
== priv
->abyBBVGA
[0])
2226 byBBRxConf
|= 0x20; /* 0010 0000 */
2228 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2231 void BBvSetVGAGainOffset(struct vnt_private
*priv
, unsigned char byData
)
2233 unsigned char byBBRxConf
= 0;
2235 BBbWriteEmbedded(priv
, 0xE7, byData
);
2237 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2238 /* patch for 3253B0 Baseband with Cardbus module */
2239 if (byData
== priv
->abyBBVGA
[0])
2240 byBBRxConf
|= 0x20; /* 0010 0000 */
2241 else if (priv
->bShortSlotTime
)
2242 byBBRxConf
&= 0xDF; /* 1101 1111 */
2244 byBBRxConf
|= 0x20; /* 0010 0000 */
2245 priv
->byBBVGACurrent
= byData
;
2246 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2250 * Description: Baseband SoftwareReset
2254 * dwIoBase - I/O base address
2258 * Return Value: none
2262 BBvSoftwareReset(struct vnt_private
*priv
)
2264 BBbWriteEmbedded(priv
, 0x50, 0x40);
2265 BBbWriteEmbedded(priv
, 0x50, 0);
2266 BBbWriteEmbedded(priv
, 0x9C, 0x01);
2267 BBbWriteEmbedded(priv
, 0x9C, 0);
2271 * Description: Baseband Power Save Mode ON
2275 * dwIoBase - I/O base address
2279 * Return Value: none
2283 BBvPowerSaveModeON(struct vnt_private
*priv
)
2285 unsigned char byOrgData
;
2287 BBbReadEmbedded(priv
, 0x0D, &byOrgData
);
2288 byOrgData
|= BIT(0);
2289 BBbWriteEmbedded(priv
, 0x0D, byOrgData
);
2293 * Description: Baseband Power Save Mode OFF
2297 * dwIoBase - I/O base address
2301 * Return Value: none
2305 BBvPowerSaveModeOFF(struct vnt_private
*priv
)
2307 unsigned char byOrgData
;
2309 BBbReadEmbedded(priv
, 0x0D, &byOrgData
);
2310 byOrgData
&= ~(BIT(0));
2311 BBbWriteEmbedded(priv
, 0x0D, byOrgData
);
2315 * Description: Set Tx Antenna mode
2319 * priv - Device Structure
2320 * byAntennaMode - Antenna Mode
2324 * Return Value: none
2329 BBvSetTxAntennaMode(struct vnt_private
*priv
, unsigned char byAntennaMode
)
2331 unsigned char byBBTxConf
;
2333 BBbReadEmbedded(priv
, 0x09, &byBBTxConf
); /* CR09 */
2334 if (byAntennaMode
== ANT_DIVERSITY
) {
2335 /* bit 1 is diversity */
2337 } else if (byAntennaMode
== ANT_A
) {
2338 /* bit 2 is ANTSEL */
2339 byBBTxConf
&= 0xF9; /* 1111 1001 */
2340 } else if (byAntennaMode
== ANT_B
) {
2341 byBBTxConf
&= 0xFD; /* 1111 1101 */
2344 BBbWriteEmbedded(priv
, 0x09, byBBTxConf
); /* CR09 */
2348 * Description: Set Rx Antenna mode
2352 * priv - Device Structure
2353 * byAntennaMode - Antenna Mode
2357 * Return Value: none
2362 BBvSetRxAntennaMode(struct vnt_private
*priv
, unsigned char byAntennaMode
)
2364 unsigned char byBBRxConf
;
2366 BBbReadEmbedded(priv
, 0x0A, &byBBRxConf
); /* CR10 */
2367 if (byAntennaMode
== ANT_DIVERSITY
) {
2370 } else if (byAntennaMode
== ANT_A
) {
2371 byBBRxConf
&= 0xFC; /* 1111 1100 */
2372 } else if (byAntennaMode
== ANT_B
) {
2373 byBBRxConf
&= 0xFE; /* 1111 1110 */
2376 BBbWriteEmbedded(priv
, 0x0A, byBBRxConf
); /* CR10 */
2380 * Description: BBvSetDeepSleep
2384 * priv - Device Structure
2388 * Return Value: none
2392 BBvSetDeepSleep(struct vnt_private
*priv
, unsigned char byLocalID
)
2394 BBbWriteEmbedded(priv
, 0x0C, 0x17); /* CR12 */
2395 BBbWriteEmbedded(priv
, 0x0D, 0xB9); /* CR13 */
2399 BBvExitDeepSleep(struct vnt_private
*priv
, unsigned char byLocalID
)
2401 BBbWriteEmbedded(priv
, 0x0C, 0x00); /* CR12 */
2402 BBbWriteEmbedded(priv
, 0x0D, 0x01); /* CR13 */