2 * platform.c - DesignWare HS OTG Controller platform driver
4 * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions, and the following disclaimer,
11 * without modification.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The names of the above-listed copyright holders may not be used
16 * to endorse or promote products derived from this software without
17 * specific prior written permission.
19 * ALTERNATIVELY, this software may be distributed under the terms of the
20 * GNU General Public License ("GPL") as published by the Free Software
21 * Foundation; either version 2 of the License, or (at your option) any
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
25 * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
26 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
28 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
29 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
31 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
32 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
33 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
34 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/slab.h>
40 #include <linux/clk.h>
41 #include <linux/device.h>
42 #include <linux/dma-mapping.h>
43 #include <linux/of_device.h>
44 #include <linux/mutex.h>
45 #include <linux/platform_device.h>
46 #include <linux/phy/phy.h>
47 #include <linux/platform_data/s3c-hsotg.h>
49 #include <linux/usb/of.h>
55 static const char dwc2_driver_name
[] = "dwc2";
57 static const struct dwc2_core_params params_bcm2835
= {
58 .otg_cap
= 0, /* HNP/SRP capable */
59 .otg_ver
= 0, /* 1.3 */
62 .speed
= 0, /* High Speed */
63 .enable_dynamic_fifo
= 1,
64 .en_multiple_tx_fifo
= 1,
65 .host_rx_fifo_size
= 774, /* 774 DWORDs */
66 .host_nperio_tx_fifo_size
= 256, /* 256 DWORDs */
67 .host_perio_tx_fifo_size
= 512, /* 512 DWORDs */
68 .max_transfer_size
= 65535,
69 .max_packet_count
= 511,
71 .phy_type
= 1, /* UTMI */
72 .phy_utmi_width
= 8, /* 8 bits */
73 .phy_ulpi_ddr
= 0, /* Single */
74 .phy_ulpi_ext_vbus
= 0,
77 .host_support_fs_ls_low_power
= 0,
78 .host_ls_low_power_phy_clk
= 0, /* 48 MHz */
83 .external_id_pin_ctl
= -1,
87 static const struct dwc2_core_params params_rk3066
= {
88 .otg_cap
= 2, /* non-HNP/non-SRP */
93 .enable_dynamic_fifo
= 1,
94 .en_multiple_tx_fifo
= -1,
95 .host_rx_fifo_size
= 520, /* 520 DWORDs */
96 .host_nperio_tx_fifo_size
= 128, /* 128 DWORDs */
97 .host_perio_tx_fifo_size
= 256, /* 256 DWORDs */
98 .max_transfer_size
= 65535,
99 .max_packet_count
= -1,
102 .phy_utmi_width
= -1,
104 .phy_ulpi_ext_vbus
= -1,
107 .host_support_fs_ls_low_power
= -1,
108 .host_ls_low_power_phy_clk
= -1,
111 .ahbcfg
= GAHBCFG_HBSTLEN_INCR16
<<
112 GAHBCFG_HBSTLEN_SHIFT
,
114 .external_id_pin_ctl
= -1,
118 static int __dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
120 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
123 ret
= regulator_bulk_enable(ARRAY_SIZE(hsotg
->supplies
),
129 ret
= clk_prepare_enable(hsotg
->clk
);
135 ret
= usb_phy_init(hsotg
->uphy
);
136 else if (hsotg
->plat
&& hsotg
->plat
->phy_init
)
137 ret
= hsotg
->plat
->phy_init(pdev
, hsotg
->plat
->phy_type
);
139 ret
= phy_power_on(hsotg
->phy
);
141 ret
= phy_init(hsotg
->phy
);
148 * dwc2_lowlevel_hw_enable - enable platform lowlevel hw resources
149 * @hsotg: The driver state
151 * A wrapper for platform code responsible for controlling
152 * low-level USB platform resources (phy, clock, regulators)
154 int dwc2_lowlevel_hw_enable(struct dwc2_hsotg
*hsotg
)
156 int ret
= __dwc2_lowlevel_hw_enable(hsotg
);
159 hsotg
->ll_hw_enabled
= true;
163 static int __dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
165 struct platform_device
*pdev
= to_platform_device(hsotg
->dev
);
169 usb_phy_shutdown(hsotg
->uphy
);
170 else if (hsotg
->plat
&& hsotg
->plat
->phy_exit
)
171 ret
= hsotg
->plat
->phy_exit(pdev
, hsotg
->plat
->phy_type
);
173 ret
= phy_exit(hsotg
->phy
);
175 ret
= phy_power_off(hsotg
->phy
);
181 clk_disable_unprepare(hsotg
->clk
);
183 ret
= regulator_bulk_disable(ARRAY_SIZE(hsotg
->supplies
),
190 * dwc2_lowlevel_hw_disable - disable platform lowlevel hw resources
191 * @hsotg: The driver state
193 * A wrapper for platform code responsible for controlling
194 * low-level USB platform resources (phy, clock, regulators)
196 int dwc2_lowlevel_hw_disable(struct dwc2_hsotg
*hsotg
)
198 int ret
= __dwc2_lowlevel_hw_disable(hsotg
);
201 hsotg
->ll_hw_enabled
= false;
205 static int dwc2_lowlevel_hw_init(struct dwc2_hsotg
*hsotg
)
209 /* Set default UTMI width */
210 hsotg
->phyif
= GUSBCFG_PHYIF16
;
213 * Attempt to find a generic PHY, then look for an old style
214 * USB PHY and then fall back to pdata
216 hsotg
->phy
= devm_phy_get(hsotg
->dev
, "usb2-phy");
217 if (IS_ERR(hsotg
->phy
)) {
218 ret
= PTR_ERR(hsotg
->phy
);
227 dev_err(hsotg
->dev
, "error getting phy %d\n", ret
);
233 hsotg
->uphy
= devm_usb_get_phy(hsotg
->dev
, USB_PHY_TYPE_USB2
);
234 if (IS_ERR(hsotg
->uphy
)) {
235 ret
= PTR_ERR(hsotg
->uphy
);
244 dev_err(hsotg
->dev
, "error getting usb phy %d\n",
251 hsotg
->plat
= dev_get_platdata(hsotg
->dev
);
255 * If using the generic PHY framework, check if the PHY bus
256 * width is 8-bit and set the phyif appropriately.
258 if (phy_get_bus_width(hsotg
->phy
) == 8)
259 hsotg
->phyif
= GUSBCFG_PHYIF8
;
263 hsotg
->clk
= devm_clk_get(hsotg
->dev
, "otg");
264 if (IS_ERR(hsotg
->clk
)) {
266 dev_dbg(hsotg
->dev
, "cannot get otg clock\n");
270 for (i
= 0; i
< ARRAY_SIZE(hsotg
->supplies
); i
++)
271 hsotg
->supplies
[i
].supply
= dwc2_hsotg_supply_names
[i
];
273 ret
= devm_regulator_bulk_get(hsotg
->dev
, ARRAY_SIZE(hsotg
->supplies
),
276 dev_err(hsotg
->dev
, "failed to request supplies: %d\n", ret
);
283 * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
286 * @dev: Platform device
288 * This routine is called, for example, when the rmmod command is executed. The
289 * device may or may not be electrically present. If it is present, the driver
290 * stops device processing. Any resources used on behalf of this device are
293 static int dwc2_driver_remove(struct platform_device
*dev
)
295 struct dwc2_hsotg
*hsotg
= platform_get_drvdata(dev
);
297 dwc2_debugfs_exit(hsotg
);
298 if (hsotg
->hcd_enabled
)
299 dwc2_hcd_remove(hsotg
);
300 if (hsotg
->gadget_enabled
)
301 dwc2_hsotg_remove(hsotg
);
303 if (hsotg
->ll_hw_enabled
)
304 dwc2_lowlevel_hw_disable(hsotg
);
309 static const struct of_device_id dwc2_of_match_table
[] = {
310 { .compatible
= "brcm,bcm2835-usb", .data
= ¶ms_bcm2835
},
311 { .compatible
= "rockchip,rk3066-usb", .data
= ¶ms_rk3066
},
312 { .compatible
= "snps,dwc2", .data
= NULL
},
313 { .compatible
= "samsung,s3c6400-hsotg", .data
= NULL
},
316 MODULE_DEVICE_TABLE(of
, dwc2_of_match_table
);
319 * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
322 * @dev: Platform device
324 * This routine creates the driver components required to control the device
325 * (core, HCD, and PCD) and initializes the device. The driver components are
326 * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
327 * in the device private data. This allows the driver to access the dwc2_hsotg
328 * structure on subsequent calls to driver methods for this device.
330 static int dwc2_driver_probe(struct platform_device
*dev
)
332 const struct of_device_id
*match
;
333 const struct dwc2_core_params
*params
;
334 struct dwc2_core_params defparams
;
335 struct dwc2_hsotg
*hsotg
;
336 struct resource
*res
;
340 match
= of_match_device(dwc2_of_match_table
, &dev
->dev
);
341 if (match
&& match
->data
) {
342 params
= match
->data
;
344 /* Default all params to autodetect */
345 dwc2_set_all_params(&defparams
, -1);
349 * Disable descriptor dma mode by default as the HW can support
350 * it, but does not support it for SPLIT transactions.
352 defparams
.dma_desc_enable
= 0;
355 hsotg
= devm_kzalloc(&dev
->dev
, sizeof(*hsotg
), GFP_KERNEL
);
359 hsotg
->dev
= &dev
->dev
;
362 * Use reasonable defaults so platforms don't have to provide these.
364 if (!dev
->dev
.dma_mask
)
365 dev
->dev
.dma_mask
= &dev
->dev
.coherent_dma_mask
;
366 retval
= dma_set_coherent_mask(&dev
->dev
, DMA_BIT_MASK(32));
370 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
371 hsotg
->regs
= devm_ioremap_resource(&dev
->dev
, res
);
372 if (IS_ERR(hsotg
->regs
))
373 return PTR_ERR(hsotg
->regs
);
375 dev_dbg(&dev
->dev
, "mapped PA %08lx to VA %p\n",
376 (unsigned long)res
->start
, hsotg
->regs
);
378 hsotg
->dr_mode
= usb_get_dr_mode(&dev
->dev
);
379 if (IS_ENABLED(CONFIG_USB_DWC2_HOST
) &&
380 hsotg
->dr_mode
!= USB_DR_MODE_HOST
) {
381 hsotg
->dr_mode
= USB_DR_MODE_HOST
;
383 "Configuration mismatch. Forcing host mode\n");
384 } else if (IS_ENABLED(CONFIG_USB_DWC2_PERIPHERAL
) &&
385 hsotg
->dr_mode
!= USB_DR_MODE_PERIPHERAL
) {
386 hsotg
->dr_mode
= USB_DR_MODE_PERIPHERAL
;
388 "Configuration mismatch. Forcing peripheral mode\n");
391 retval
= dwc2_lowlevel_hw_init(hsotg
);
395 spin_lock_init(&hsotg
->lock
);
397 hsotg
->core_params
= devm_kzalloc(&dev
->dev
,
398 sizeof(*hsotg
->core_params
), GFP_KERNEL
);
399 if (!hsotg
->core_params
)
402 dwc2_set_all_params(hsotg
->core_params
, -1);
404 irq
= platform_get_irq(dev
, 0);
406 dev_err(&dev
->dev
, "missing IRQ resource\n");
410 dev_dbg(hsotg
->dev
, "registering common handler for irq%d\n",
412 retval
= devm_request_irq(hsotg
->dev
, irq
,
413 dwc2_handle_common_intr
, IRQF_SHARED
,
414 dev_name(hsotg
->dev
), hsotg
);
418 retval
= dwc2_lowlevel_hw_enable(hsotg
);
422 /* Detect config values from hardware */
423 retval
= dwc2_get_hwparams(hsotg
);
427 /* Validate parameter values */
428 dwc2_set_parameters(hsotg
, params
);
430 if (hsotg
->dr_mode
!= USB_DR_MODE_HOST
) {
431 retval
= dwc2_gadget_init(hsotg
, irq
);
434 hsotg
->gadget_enabled
= 1;
437 if (hsotg
->dr_mode
!= USB_DR_MODE_PERIPHERAL
) {
438 retval
= dwc2_hcd_init(hsotg
, irq
);
440 if (hsotg
->gadget_enabled
)
441 dwc2_hsotg_remove(hsotg
);
444 hsotg
->hcd_enabled
= 1;
447 platform_set_drvdata(dev
, hsotg
);
449 dwc2_debugfs_init(hsotg
);
451 /* Gadget code manages lowlevel hw on its own */
452 if (hsotg
->dr_mode
== USB_DR_MODE_PERIPHERAL
)
453 dwc2_lowlevel_hw_disable(hsotg
);
458 dwc2_lowlevel_hw_disable(hsotg
);
462 static int __maybe_unused
dwc2_suspend(struct device
*dev
)
464 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
467 if (dwc2_is_device_mode(dwc2
))
468 dwc2_hsotg_suspend(dwc2
);
470 if (dwc2
->ll_hw_enabled
)
471 ret
= __dwc2_lowlevel_hw_disable(dwc2
);
476 static int __maybe_unused
dwc2_resume(struct device
*dev
)
478 struct dwc2_hsotg
*dwc2
= dev_get_drvdata(dev
);
481 if (dwc2
->ll_hw_enabled
) {
482 ret
= __dwc2_lowlevel_hw_enable(dwc2
);
487 if (dwc2_is_device_mode(dwc2
))
488 ret
= dwc2_hsotg_resume(dwc2
);
493 static const struct dev_pm_ops dwc2_dev_pm_ops
= {
494 SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend
, dwc2_resume
)
497 static struct platform_driver dwc2_platform_driver
= {
499 .name
= dwc2_driver_name
,
500 .of_match_table
= dwc2_of_match_table
,
501 .pm
= &dwc2_dev_pm_ops
,
503 .probe
= dwc2_driver_probe
,
504 .remove
= dwc2_driver_remove
,
507 module_platform_driver(dwc2_platform_driver
);
509 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
510 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
511 MODULE_LICENSE("Dual BSD/GPL");