1 // SPDX-License-Identifier: GPL-2.0
2 #include "amd64_edac.h"
4 #define EDAC_DCT_ATTR_SHOW(reg) \
5 static ssize_t amd64_##reg##_show(struct device *dev, \
6 struct device_attribute *mattr, \
9 struct mem_ctl_info *mci = to_mci(dev); \
10 struct amd64_pvt *pvt = mci->pvt_info; \
11 return sprintf(data, "0x%016llx\n", (u64)pvt->reg); \
14 EDAC_DCT_ATTR_SHOW(dhar
);
15 EDAC_DCT_ATTR_SHOW(dbam0
);
16 EDAC_DCT_ATTR_SHOW(top_mem
);
17 EDAC_DCT_ATTR_SHOW(top_mem2
);
19 static ssize_t
amd64_hole_show(struct device
*dev
,
20 struct device_attribute
*mattr
,
23 struct mem_ctl_info
*mci
= to_mci(dev
);
29 amd64_get_dram_hole_info(mci
, &hole_base
, &hole_offset
, &hole_size
);
31 return sprintf(data
, "%llx %llx %llx\n", hole_base
, hole_offset
,
36 * update NUM_DBG_ATTRS in case you add new members
38 static DEVICE_ATTR(dhar
, S_IRUGO
, amd64_dhar_show
, NULL
);
39 static DEVICE_ATTR(dbam
, S_IRUGO
, amd64_dbam0_show
, NULL
);
40 static DEVICE_ATTR(topmem
, S_IRUGO
, amd64_top_mem_show
, NULL
);
41 static DEVICE_ATTR(topmem2
, S_IRUGO
, amd64_top_mem2_show
, NULL
);
42 static DEVICE_ATTR(dram_hole
, S_IRUGO
, amd64_hole_show
, NULL
);
44 static struct attribute
*amd64_edac_dbg_attrs
[] = {
47 &dev_attr_topmem
.attr
,
48 &dev_attr_topmem2
.attr
,
49 &dev_attr_dram_hole
.attr
,
53 const struct attribute_group amd64_edac_dbg_group
= {
54 .attrs
= amd64_edac_dbg_attrs
,