spi: efm32: Convert to use GPIO descriptors
[linux/fpc-iii.git] / arch / m68k / include / asm / mmu_context.h
blobcac9f289d1f60b8cc254471ed9d653e9fc7bf6b4
1 /* SPDX-License-Identifier: GPL-2.0 */
2 #ifndef __M68K_MMU_CONTEXT_H
3 #define __M68K_MMU_CONTEXT_H
5 #include <asm-generic/mm_hooks.h>
6 #include <linux/mm_types.h>
8 static inline void enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
12 #ifdef CONFIG_MMU
14 #if defined(CONFIG_COLDFIRE)
16 #include <asm/atomic.h>
17 #include <asm/bitops.h>
18 #include <asm/mcfmmu.h>
19 #include <asm/mmu.h>
21 #define NO_CONTEXT 256
22 #define LAST_CONTEXT 255
23 #define FIRST_CONTEXT 1
25 extern unsigned long context_map[];
26 extern mm_context_t next_mmu_context;
28 extern atomic_t nr_free_contexts;
29 extern struct mm_struct *context_mm[LAST_CONTEXT+1];
30 extern void steal_context(void);
32 static inline void get_mmu_context(struct mm_struct *mm)
34 mm_context_t ctx;
36 if (mm->context != NO_CONTEXT)
37 return;
38 while (atomic_dec_and_test_lt(&nr_free_contexts)) {
39 atomic_inc(&nr_free_contexts);
40 steal_context();
42 ctx = next_mmu_context;
43 while (test_and_set_bit(ctx, context_map)) {
44 ctx = find_next_zero_bit(context_map, LAST_CONTEXT+1, ctx);
45 if (ctx > LAST_CONTEXT)
46 ctx = 0;
48 next_mmu_context = (ctx + 1) & LAST_CONTEXT;
49 mm->context = ctx;
50 context_mm[ctx] = mm;
54 * Set up the context for a new address space.
56 #define init_new_context(tsk, mm) (((mm)->context = NO_CONTEXT), 0)
59 * We're finished using the context for an address space.
61 static inline void destroy_context(struct mm_struct *mm)
63 if (mm->context != NO_CONTEXT) {
64 clear_bit(mm->context, context_map);
65 mm->context = NO_CONTEXT;
66 atomic_inc(&nr_free_contexts);
70 static inline void set_context(mm_context_t context, pgd_t *pgd)
72 __asm__ __volatile__ ("movec %0,%%asid" : : "d" (context));
75 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
76 struct task_struct *tsk)
78 get_mmu_context(tsk->mm);
79 set_context(tsk->mm->context, next->pgd);
83 * After we have set current->mm to a new value, this activates
84 * the context for the new mm so we see the new mappings.
86 static inline void activate_mm(struct mm_struct *active_mm,
87 struct mm_struct *mm)
89 get_mmu_context(mm);
90 set_context(mm->context, mm->pgd);
93 #define deactivate_mm(tsk, mm) do { } while (0)
95 #define prepare_arch_switch(next) load_ksp_mmu(next)
97 static inline void load_ksp_mmu(struct task_struct *task)
99 unsigned long flags;
100 struct mm_struct *mm;
101 int asid;
102 pgd_t *pgd;
103 p4d_t *p4d;
104 pud_t *pud;
105 pmd_t *pmd;
106 pte_t *pte;
107 unsigned long mmuar;
109 local_irq_save(flags);
110 mmuar = task->thread.ksp;
112 /* Search for a valid TLB entry, if one is found, don't remap */
113 mmu_write(MMUAR, mmuar);
114 mmu_write(MMUOR, MMUOR_STLB | MMUOR_ADR);
115 if (mmu_read(MMUSR) & MMUSR_HIT)
116 goto end;
118 if (mmuar >= PAGE_OFFSET) {
119 mm = &init_mm;
120 } else {
121 pr_info("load_ksp_mmu: non-kernel mm found: 0x%p\n", task->mm);
122 mm = task->mm;
125 if (!mm)
126 goto bug;
128 pgd = pgd_offset(mm, mmuar);
129 if (pgd_none(*pgd))
130 goto bug;
132 p4d = p4d_offset(pgd, mmuar);
133 if (p4d_none(*p4d))
134 goto bug;
136 pud = pud_offset(p4d, mmuar);
137 if (pud_none(*pud))
138 goto bug;
140 pmd = pmd_offset(pud, mmuar);
141 if (pmd_none(*pmd))
142 goto bug;
144 pte = (mmuar >= PAGE_OFFSET) ? pte_offset_kernel(pmd, mmuar)
145 : pte_offset_map(pmd, mmuar);
146 if (pte_none(*pte) || !pte_present(*pte))
147 goto bug;
149 set_pte(pte, pte_mkyoung(*pte));
150 asid = mm->context & 0xff;
151 if (!pte_dirty(*pte) && mmuar <= PAGE_OFFSET)
152 set_pte(pte, pte_wrprotect(*pte));
154 mmu_write(MMUTR, (mmuar & PAGE_MASK) | (asid << MMUTR_IDN) |
155 (((int)(pte->pte) & (int)CF_PAGE_MMUTR_MASK)
156 >> CF_PAGE_MMUTR_SHIFT) | MMUTR_V);
158 mmu_write(MMUDR, (pte_val(*pte) & PAGE_MASK) |
159 ((pte->pte) & CF_PAGE_MMUDR_MASK) | MMUDR_SZ_8KB | MMUDR_X);
161 mmu_write(MMUOR, MMUOR_ACC | MMUOR_UAA);
163 goto end;
165 bug:
166 pr_info("ksp load failed: mm=0x%p ksp=0x08%lx\n", mm, mmuar);
167 end:
168 local_irq_restore(flags);
171 #elif defined(CONFIG_SUN3)
172 #include <asm/sun3mmu.h>
173 #include <linux/sched.h>
175 extern unsigned long get_free_context(struct mm_struct *mm);
176 extern void clear_context(unsigned long context);
178 /* set the context for a new task to unmapped */
179 static inline int init_new_context(struct task_struct *tsk,
180 struct mm_struct *mm)
182 mm->context = SUN3_INVALID_CONTEXT;
183 return 0;
186 /* find the context given to this process, and if it hasn't already
187 got one, go get one for it. */
188 static inline void get_mmu_context(struct mm_struct *mm)
190 if (mm->context == SUN3_INVALID_CONTEXT)
191 mm->context = get_free_context(mm);
194 /* flush context if allocated... */
195 static inline void destroy_context(struct mm_struct *mm)
197 if (mm->context != SUN3_INVALID_CONTEXT)
198 clear_context(mm->context);
201 static inline void activate_context(struct mm_struct *mm)
203 get_mmu_context(mm);
204 sun3_put_context(mm->context);
207 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
208 struct task_struct *tsk)
210 activate_context(tsk->mm);
213 #define deactivate_mm(tsk, mm) do { } while (0)
215 static inline void activate_mm(struct mm_struct *prev_mm,
216 struct mm_struct *next_mm)
218 activate_context(next_mm);
221 #else
223 #include <asm/setup.h>
224 #include <asm/page.h>
225 #include <asm/pgalloc.h>
227 static inline int init_new_context(struct task_struct *tsk,
228 struct mm_struct *mm)
230 mm->context = virt_to_phys(mm->pgd);
231 return 0;
234 #define destroy_context(mm) do { } while(0)
236 static inline void switch_mm_0230(struct mm_struct *mm)
238 unsigned long crp[2] = {
239 0x80000000 | _PAGE_TABLE, mm->context
241 unsigned long tmp;
243 asm volatile (".chip 68030");
245 /* flush MC68030/MC68020 caches (they are virtually addressed) */
246 asm volatile (
247 "movec %%cacr,%0;"
248 "orw %1,%0; "
249 "movec %0,%%cacr"
250 : "=d" (tmp) : "di" (FLUSH_I_AND_D));
252 /* Switch the root pointer. For a 030-only kernel,
253 * avoid flushing the whole ATC, we only need to
254 * flush the user entries. The 68851 does this by
255 * itself. Avoid a runtime check here.
257 asm volatile (
258 #ifdef CPU_M68030_ONLY
259 "pmovefd %0,%%crp; "
260 "pflush #0,#4"
261 #else
262 "pmove %0,%%crp"
263 #endif
264 : : "m" (crp[0]));
266 asm volatile (".chip 68k");
269 static inline void switch_mm_0460(struct mm_struct *mm)
271 asm volatile (".chip 68040");
273 /* flush address translation cache (user entries) */
274 asm volatile ("pflushan");
276 /* switch the root pointer */
277 asm volatile ("movec %0,%%urp" : : "r" (mm->context));
279 if (CPU_IS_060) {
280 unsigned long tmp;
282 /* clear user entries in the branch cache */
283 asm volatile (
284 "movec %%cacr,%0; "
285 "orl %1,%0; "
286 "movec %0,%%cacr"
287 : "=d" (tmp): "di" (0x00200000));
290 asm volatile (".chip 68k");
293 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
295 if (prev != next) {
296 if (CPU_IS_020_OR_030)
297 switch_mm_0230(next);
298 else
299 switch_mm_0460(next);
303 #define deactivate_mm(tsk,mm) do { } while (0)
305 static inline void activate_mm(struct mm_struct *prev_mm,
306 struct mm_struct *next_mm)
308 next_mm->context = virt_to_phys(next_mm->pgd);
310 if (CPU_IS_020_OR_030)
311 switch_mm_0230(next_mm);
312 else
313 switch_mm_0460(next_mm);
316 #endif
318 #else /* !CONFIG_MMU */
320 static inline int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
322 return 0;
326 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, struct task_struct *tsk)
330 #define destroy_context(mm) do { } while (0)
331 #define deactivate_mm(tsk,mm) do { } while (0)
333 static inline void activate_mm(struct mm_struct *prev_mm, struct mm_struct *next_mm)
337 #endif /* CONFIG_MMU */
338 #endif /* __M68K_MMU_CONTEXT_H */