2 * Copyright (C) 2013-2014 Altera Corporation
3 * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
4 * Copyright (C) 2004 Microtronix Datacom Ltd.
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
11 #include <linux/export.h>
12 #include <linux/interrupt.h>
13 #include <linux/clockchips.h>
14 #include <linux/clocksource.h>
15 #include <linux/delay.h>
17 #include <linux/of_address.h>
18 #include <linux/of_irq.h>
20 #include <linux/slab.h>
22 #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0"
24 #define ALTERA_TIMER_STATUS_REG 0
25 #define ALTERA_TIMER_CONTROL_REG 4
26 #define ALTERA_TIMER_PERIODL_REG 8
27 #define ALTERA_TIMER_PERIODH_REG 12
28 #define ALTERA_TIMER_SNAPL_REG 16
29 #define ALTERA_TIMER_SNAPH_REG 20
31 #define ALTERA_TIMER_CONTROL_ITO_MSK (0x1)
32 #define ALTERA_TIMER_CONTROL_CONT_MSK (0x2)
33 #define ALTERA_TIMER_CONTROL_START_MSK (0x4)
34 #define ALTERA_TIMER_CONTROL_STOP_MSK (0x8)
41 struct nios2_clockevent_dev
{
42 struct nios2_timer timer
;
43 struct clock_event_device ced
;
46 struct nios2_clocksource
{
47 struct nios2_timer timer
;
48 struct clocksource cs
;
51 static inline struct nios2_clockevent_dev
*
52 to_nios2_clkevent(struct clock_event_device
*evt
)
54 return container_of(evt
, struct nios2_clockevent_dev
, ced
);
57 static inline struct nios2_clocksource
*
58 to_nios2_clksource(struct clocksource
*cs
)
60 return container_of(cs
, struct nios2_clocksource
, cs
);
63 static u16
timer_readw(struct nios2_timer
*timer
, u32 offs
)
65 return readw(timer
->base
+ offs
);
68 static void timer_writew(struct nios2_timer
*timer
, u16 val
, u32 offs
)
70 writew(val
, timer
->base
+ offs
);
73 static inline unsigned long read_timersnapshot(struct nios2_timer
*timer
)
77 timer_writew(timer
, 0, ALTERA_TIMER_SNAPL_REG
);
78 count
= timer_readw(timer
, ALTERA_TIMER_SNAPH_REG
) << 16 |
79 timer_readw(timer
, ALTERA_TIMER_SNAPL_REG
);
84 static u64
nios2_timer_read(struct clocksource
*cs
)
86 struct nios2_clocksource
*nios2_cs
= to_nios2_clksource(cs
);
90 local_irq_save(flags
);
91 count
= read_timersnapshot(&nios2_cs
->timer
);
92 local_irq_restore(flags
);
94 /* Counter is counting down */
98 static struct nios2_clocksource nios2_cs
= {
100 .name
= "nios2-clksrc",
102 .read
= nios2_timer_read
,
103 .mask
= CLOCKSOURCE_MASK(32),
104 .flags
= CLOCK_SOURCE_IS_CONTINUOUS
,
108 cycles_t
get_cycles(void)
110 /* Only read timer if it has been initialized */
111 if (nios2_cs
.timer
.base
)
112 return nios2_timer_read(&nios2_cs
.cs
);
115 EXPORT_SYMBOL(get_cycles
);
117 static void nios2_timer_start(struct nios2_timer
*timer
)
121 ctrl
= timer_readw(timer
, ALTERA_TIMER_CONTROL_REG
);
122 ctrl
|= ALTERA_TIMER_CONTROL_START_MSK
;
123 timer_writew(timer
, ctrl
, ALTERA_TIMER_CONTROL_REG
);
126 static void nios2_timer_stop(struct nios2_timer
*timer
)
130 ctrl
= timer_readw(timer
, ALTERA_TIMER_CONTROL_REG
);
131 ctrl
|= ALTERA_TIMER_CONTROL_STOP_MSK
;
132 timer_writew(timer
, ctrl
, ALTERA_TIMER_CONTROL_REG
);
135 static void nios2_timer_config(struct nios2_timer
*timer
, unsigned long period
,
140 /* The timer's actual period is one cycle greater than the value
141 * stored in the period register. */
144 ctrl
= timer_readw(timer
, ALTERA_TIMER_CONTROL_REG
);
146 timer_writew(timer
, ctrl
| ALTERA_TIMER_CONTROL_STOP_MSK
,
147 ALTERA_TIMER_CONTROL_REG
);
149 /* write new count */
150 timer_writew(timer
, period
, ALTERA_TIMER_PERIODL_REG
);
151 timer_writew(timer
, period
>> 16, ALTERA_TIMER_PERIODH_REG
);
153 ctrl
|= ALTERA_TIMER_CONTROL_START_MSK
| ALTERA_TIMER_CONTROL_ITO_MSK
;
155 ctrl
|= ALTERA_TIMER_CONTROL_CONT_MSK
;
157 ctrl
&= ~ALTERA_TIMER_CONTROL_CONT_MSK
;
158 timer_writew(timer
, ctrl
, ALTERA_TIMER_CONTROL_REG
);
161 static int nios2_timer_set_next_event(unsigned long delta
,
162 struct clock_event_device
*evt
)
164 struct nios2_clockevent_dev
*nios2_ced
= to_nios2_clkevent(evt
);
166 nios2_timer_config(&nios2_ced
->timer
, delta
, false);
171 static int nios2_timer_shutdown(struct clock_event_device
*evt
)
173 struct nios2_clockevent_dev
*nios2_ced
= to_nios2_clkevent(evt
);
174 struct nios2_timer
*timer
= &nios2_ced
->timer
;
176 nios2_timer_stop(timer
);
180 static int nios2_timer_set_periodic(struct clock_event_device
*evt
)
182 unsigned long period
;
183 struct nios2_clockevent_dev
*nios2_ced
= to_nios2_clkevent(evt
);
184 struct nios2_timer
*timer
= &nios2_ced
->timer
;
186 period
= DIV_ROUND_UP(timer
->freq
, HZ
);
187 nios2_timer_config(timer
, period
, true);
191 static int nios2_timer_resume(struct clock_event_device
*evt
)
193 struct nios2_clockevent_dev
*nios2_ced
= to_nios2_clkevent(evt
);
194 struct nios2_timer
*timer
= &nios2_ced
->timer
;
196 nios2_timer_start(timer
);
200 irqreturn_t
timer_interrupt(int irq
, void *dev_id
)
202 struct clock_event_device
*evt
= (struct clock_event_device
*) dev_id
;
203 struct nios2_clockevent_dev
*nios2_ced
= to_nios2_clkevent(evt
);
205 /* Clear the interrupt condition */
206 timer_writew(&nios2_ced
->timer
, 0, ALTERA_TIMER_STATUS_REG
);
207 evt
->event_handler(evt
);
212 static int __init
nios2_timer_get_base_and_freq(struct device_node
*np
,
213 void __iomem
**base
, u32
*freq
)
215 *base
= of_iomap(np
, 0);
217 pr_crit("Unable to map reg for %pOFn\n", np
);
221 if (of_property_read_u32(np
, "clock-frequency", freq
)) {
222 pr_crit("Unable to get %pOFn clock frequency\n", np
);
229 static struct nios2_clockevent_dev nios2_ce
= {
231 .name
= "nios2-clkevent",
232 .features
= CLOCK_EVT_FEAT_PERIODIC
| CLOCK_EVT_FEAT_ONESHOT
,
235 .set_next_event
= nios2_timer_set_next_event
,
236 .set_state_shutdown
= nios2_timer_shutdown
,
237 .set_state_periodic
= nios2_timer_set_periodic
,
238 .set_state_oneshot
= nios2_timer_shutdown
,
239 .tick_resume
= nios2_timer_resume
,
243 static __init
int nios2_clockevent_init(struct device_node
*timer
)
245 void __iomem
*iobase
;
249 ret
= nios2_timer_get_base_and_freq(timer
, &iobase
, &freq
);
253 irq
= irq_of_parse_and_map(timer
, 0);
255 pr_crit("Unable to parse timer irq\n");
259 nios2_ce
.timer
.base
= iobase
;
260 nios2_ce
.timer
.freq
= freq
;
262 nios2_ce
.ced
.cpumask
= cpumask_of(0);
263 nios2_ce
.ced
.irq
= irq
;
265 nios2_timer_stop(&nios2_ce
.timer
);
266 /* clear pending interrupt */
267 timer_writew(&nios2_ce
.timer
, 0, ALTERA_TIMER_STATUS_REG
);
269 ret
= request_irq(irq
, timer_interrupt
, IRQF_TIMER
, timer
->name
,
272 pr_crit("Unable to setup timer irq\n");
276 clockevents_config_and_register(&nios2_ce
.ced
, freq
, 1, ULONG_MAX
);
281 static __init
int nios2_clocksource_init(struct device_node
*timer
)
284 void __iomem
*iobase
;
288 ret
= nios2_timer_get_base_and_freq(timer
, &iobase
, &freq
);
292 nios2_cs
.timer
.base
= iobase
;
293 nios2_cs
.timer
.freq
= freq
;
295 ret
= clocksource_register_hz(&nios2_cs
.cs
, freq
);
299 timer_writew(&nios2_cs
.timer
, USHRT_MAX
, ALTERA_TIMER_PERIODL_REG
);
300 timer_writew(&nios2_cs
.timer
, USHRT_MAX
, ALTERA_TIMER_PERIODH_REG
);
302 /* interrupt disable + continuous + start */
303 ctrl
= ALTERA_TIMER_CONTROL_CONT_MSK
| ALTERA_TIMER_CONTROL_START_MSK
;
304 timer_writew(&nios2_cs
.timer
, ctrl
, ALTERA_TIMER_CONTROL_REG
);
306 /* Calibrate the delay loop directly */
307 lpj_fine
= freq
/ HZ
;
313 * The first timer instance will use as a clockevent. If there are two or
314 * more instances, the second one gets used as clocksource and all
317 static int __init
nios2_time_init(struct device_node
*timer
)
319 static int num_called
;
322 switch (num_called
) {
324 ret
= nios2_clockevent_init(timer
);
327 ret
= nios2_clocksource_init(timer
);
339 void read_persistent_clock64(struct timespec64
*ts
)
341 ts
->tv_sec
= mktime64(2007, 1, 1, 0, 0, 0);
345 void __init
time_init(void)
347 struct device_node
*np
;
350 for_each_compatible_node(np
, NULL
, ALTR_TIMER_COMPATIBLE
)
354 panic("%d timer is found, it needs 2 timers in system\n", count
);
359 TIMER_OF_DECLARE(nios2_timer
, ALTR_TIMER_COMPATIBLE
, nios2_time_init
);