arch/arm64/boot/dts/xilinx/zynqmp-ep108.dts

   1 /*
   2  * dts file for Xilinx ZynqMP ep108 development board
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * This program is free software; you can redistribute it and/or
   9  * modify it under the terms of the GNU General Public License as
  10  * published by the Free Software Foundation; either version 2 of
  11  * the License, or (at your option) any later version.
  12  */
  13
  14 /dts-v1/;
  15
  16 /include/ "zynqmp.dtsi"
  17 /include/ "zynqmp-ep108-clk.dtsi"
  18
  19 / {
  20         model = "ZynqMP EP108";
  21
  22         aliases {
  23                 serial0 = &uart0;
  24         };
  25
  26         chosen {
  27                 stdout-path = "serial0:115200n8";
  28         };
  29
  30         memory@0 {
  31                 device_type = "memory";
  32                 reg = <0x0 0x0 0x0 0x40000000>;
  33         };
  34 };
  35
  36 &can0 {
  37         status = "okay";
  38 };
  39
  40 &gem0 {
  41         status = "okay";
  42         phy-handle = <&phy0>;
  43         phy-mode = "rgmii-id";
  44         phy0: phy@0{
  45                 reg = <0>;
  46                 max-speed = <100>;
  47         };
  48 };
  49
  50 &gpio {
  51         status = "okay";
  52 };
  53
  54 &i2c0 {
  55         status = "okay";
  56         clock-frequency = <400000>;
  57         eeprom@54 {
  58                 compatible = "at,24c64";
  59                 reg = <0x54>;
  60         };
  61 };
  62
  63 &i2c1 {
  64         status = "okay";
  65         clock-frequency = <400000>;
  66         eeprom@55 {
  67                 compatible = "at,24c64";
  68                 reg = <0x55>;
  69         };
  70 };
  71
  72 &sata {
  73         status = "okay";
  74         ceva,broken-gen2;
  75 };
  76
  77 &sdhci0 {
  78         status = "okay";
  79 };
  80
  81 &sdhci1 {
  82         status = "okay";
  83 };
  84
  85 &spi0 {
  86         status = "okay";
  87         num-cs = <1>;
  88         spi0_flash0: spi0_flash0@0 {
  89                 compatible = "m25p80";
  90                 #address-cells = <1>;
  91                 #size-cells = <1>;
  92                 spi-max-frequency = <50000000>;
  93                 reg = <0>;
  94
  95                 spi0_flash0@00000000 {
  96                         label = "spi0_flash0";
  97                         reg = <0x0 0x100000>;
  98                 };
  99         };
 100 };
 101
 102 &spi1 {
 103         status = "okay";
 104         num-cs = <1>;
 105         spi1_flash0: spi1_flash0@0 {
 106                 compatible = "m25p80";
 107                 #address-cells = <1>;
 108                 #size-cells = <1>;
 109                 spi-max-frequency = <50000000>;
 110                 reg = <0>;
 111
 112                 spi1_flash0@00000000 {
 113                         label = "spi1_flash0";
 114                         reg = <0x0 0x100000>;
 115                 };
 116         };
 117 };
 118
 119 &uart0 {
 120         status = "okay";
 121 };
 122
 123 &usb0 {
 124         status = "okay";
 125         dr_mode = "peripheral";
 126         maximum-speed = "high-speed";
 127 };
 128
 129 &usb1 {
 130         status = "okay";
 131         dr_mode = "host";
 132         maximum-speed = "high-speed";
 133 };
 134
 135 &watchdog0 {
 136         status = "okay";
 137 };