include/asm-ppc/pmac_feature.h

   1 /*
   2  * Definition of platform feature hooks for PowerMacs
   3  *
   4  * This file is subject to the terms and conditions of the GNU General Public
   5  * License.  See the file "COPYING" in the main directory of this archive
   6  * for more details.
   7  *
   8  * Copyright (C) 1998 Paul Mackerras &
   9  *                    Ben. Herrenschmidt.
  10  *
  11  *
  12  * Note: I removed media-bay details from the feature stuff, I believe it's
  13  *       not worth it, the media-bay driver can directly use the mac-io
  14  *       ASIC registers.
  15  *
  16  * Implementation note: Currently, none of these functions will block.
  17  * However, they may internally protect themselves with a spinlock
  18  * for way too long. Be prepared for at least some of these to block
  19  * in the future.
  20  *
  21  * Unless specifically defined, the result code is assumed to be an
  22  * error when negative, 0 is the default success result. Some functions
  23  * may return additional positive result values.
  24  *
  25  * To keep implementation simple, all feature calls are assumed to have
  26  * the prototype parameters (struct device_node* node, int value).
  27  * When either is not used, pass 0.
  28  */
  29
  30 #ifdef __KERNEL__
  31 #ifndef __PPC_ASM_PMAC_FEATURE_H
  32 #define __PPC_ASM_PMAC_FEATURE_H
  33
  34 #include <asm/macio.h>
  35
  36 /*
  37  * Known Mac motherboard models
  38  *
  39  * Please, report any error here to benh@kernel.crashing.org, thanks !
  40  *
  41  * Note that I don't fully maintain this list for Core99 & MacRISC2
  42  * and I'm considering removing all NewWorld entries from it and
  43  * entirely rely on the model string.
  44  */
  45
  46 /* PowerSurge are the first generation of PCI Pmacs. This include
  47  * all of the Grand-Central based machines. We currently don't
  48  * differenciate most of them.
  49  */
  50 #define PMAC_TYPE_PSURGE                0x10    /* PowerSurge */
  51 #define PMAC_TYPE_ANS                   0x11    /* Apple Network Server */
  52
  53 /* Here is the infamous serie of OHare based machines
  54  */
  55 #define PMAC_TYPE_COMET                 0x20    /* Beleived to be PowerBook 2400 */
  56 #define PMAC_TYPE_HOOPER                0x21    /* Beleived to be PowerBook 3400 */
  57 #define PMAC_TYPE_KANGA                 0x22    /* PowerBook 3500 (first G3) */
  58 #define PMAC_TYPE_ALCHEMY               0x23    /* Alchemy motherboard base */
  59 #define PMAC_TYPE_GAZELLE               0x24    /* Spartacus, some 5xxx/6xxx */
  60 #define PMAC_TYPE_UNKNOWN_OHARE         0x2f    /* Unknown, but OHare based */
  61
  62 /* Here are the Heathrow based machines
  63  * FIXME: Differenciate wallstreet,mainstreet,wallstreetII
  64  */
  65 #define PMAC_TYPE_GOSSAMER              0x30    /* Gossamer motherboard */
  66 #define PMAC_TYPE_SILK                  0x31    /* Desktop PowerMac G3 */
  67 #define PMAC_TYPE_WALLSTREET            0x32    /* Wallstreet/Mainstreet PowerBook*/
  68 #define PMAC_TYPE_UNKNOWN_HEATHROW      0x3f    /* Unknown but heathrow based */
  69
  70 /* Here are newworld machines based on Paddington (heathrow derivative)
  71  */
  72 #define PMAC_TYPE_101_PBOOK             0x40    /* 101 PowerBook (aka Lombard) */
  73 #define PMAC_TYPE_ORIG_IMAC             0x41    /* First generation iMac */
  74 #define PMAC_TYPE_YOSEMITE              0x42    /* B&W G3 */
  75 #define PMAC_TYPE_YIKES                 0x43    /* Yikes G4 (PCI graphics) */
  76 #define PMAC_TYPE_UNKNOWN_PADDINGTON    0x4f    /* Unknown but paddington based */
  77
  78 /* Core99 machines based on UniNorth 1.0 and 1.5
  79  *
  80  * Note: A single entry here may cover several actual models according
  81  * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most
  82  * FireWire based iMacs, etc...). Those machines are too similar to be
  83  * distinguished here, when they need to be differencied, use the
  84  * device-tree "model" or "compatible" property.
  85  */
  86 #define PMAC_TYPE_ORIG_IBOOK            0x40    /* First iBook model (no firewire) */
  87 #define PMAC_TYPE_SAWTOOTH              0x41    /* Desktop G4s */
  88 #define PMAC_TYPE_FW_IMAC               0x42    /* FireWire iMacs (except Pangea based) */
  89 #define PMAC_TYPE_FW_IBOOK              0x43    /* FireWire iBooks (except iBook2) */
  90 #define PMAC_TYPE_CUBE                  0x44    /* Cube PowerMac */
  91 #define PMAC_TYPE_QUICKSILVER           0x45    /* QuickSilver G4s */
  92 #define PMAC_TYPE_PISMO                 0x46    /* Pismo PowerBook */
  93 #define PMAC_TYPE_TITANIUM              0x47    /* Titanium PowerBook */
  94 #define PMAC_TYPE_TITANIUM2             0x48    /* Titanium II PowerBook (no L3, M6) */
  95 #define PMAC_TYPE_TITANIUM3             0x49    /* Titanium III PowerBook (with L3 & M7) */
  96 #define PMAC_TYPE_TITANIUM4             0x50    /* Titanium IV PowerBook (with L3 & M9) */
  97 #define PMAC_TYPE_EMAC                  0x50    /* eMac */
  98 #define PMAC_TYPE_UNKNOWN_CORE99        0x5f
  99
 100 /* MacRisc2 with UniNorth 2.0 */
 101 #define PMAC_TYPE_RACKMAC               0x80    /* XServe */
 102 #define PMAC_TYPE_WINDTUNNEL            0x81
 103
 104 /* MacRISC2 machines based on the Pangea chipset
 105  */
 106 #define PMAC_TYPE_PANGEA_IMAC           0x100   /* Flower Power iMac */
 107 #define PMAC_TYPE_IBOOK2                0x101   /* iBook2 (polycarbonate) */
 108 #define PMAC_TYPE_FLAT_PANEL_IMAC       0x102   /* Flat panel iMac */
 109 #define PMAC_TYPE_UNKNOWN_PANGEA        0x10f
 110
 111 /* MacRISC2 machines based on the Intrepid chipset
 112  */
 113 #define PMAC_TYPE_UNKNOWN_INTREPID      0x11f   /* Generic */
 114
 115 /* MacRISC4 / G5 machines. We don't have per-machine selection here anymore,
 116  * but rather machine families
 117  */
 118 #define PMAC_TYPE_POWERMAC_G5           0x150   /* U3 & U3H based */
 119 #define PMAC_TYPE_POWERMAC_G5_U3L       0x151   /* U3L based desktop */
 120 #define PMAC_TYPE_IMAC_G5               0x152   /* iMac G5 */
 121 #define PMAC_TYPE_XSERVE_G5             0x153   /* Xserve G5 */
 122 #define PMAC_TYPE_UNKNOWN_K2            0x19f   /* Any other K2 based */
 123
 124 /*
 125  * Motherboard flags
 126  */
 127
 128 #define PMAC_MB_CAN_SLEEP               0x00000001
 129 #define PMAC_MB_HAS_FW_POWER            0x00000002
 130 #define PMAC_MB_OLD_CORE99              0x00000004
 131 #define PMAC_MB_MOBILE                  0x00000008
 132 #define PMAC_MB_MAY_SLEEP               0x00000010
 133
 134 /*
 135  * Feature calls supported on pmac
 136  *
 137  */
 138
 139 /*
 140  * Use this inline wrapper
 141  */
 142 struct device_node;
 143
 144 static inline long pmac_call_feature(int selector, struct device_node* node,
 145                                         long param, long value)
 146 {
 147         if (!ppc_md.feature_call)
 148                 return -ENODEV;
 149         return ppc_md.feature_call(selector, node, param, value);
 150 }
 151
 152 /* PMAC_FTR_SERIAL_ENABLE       (struct device_node* node, int param, int value)
 153  * enable/disable an SCC side. Pass the node corresponding to the
 154  * channel side as a parameter.
 155  * param is the type of port
 156  * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled
 157  * for use by xmon.
 158  */
 159 #define PMAC_FTR_SCC_ENABLE             PMAC_FTR_DEF(0)
 160         #define PMAC_SCC_ASYNC          0
 161         #define PMAC_SCC_IRDA           1
 162         #define PMAC_SCC_I2S1           2
 163         #define PMAC_SCC_FLAG_XMON      0x00001000
 164
 165 /* PMAC_FTR_MODEM_ENABLE        (struct device_node* node, 0, int value)
 166  * enable/disable the internal modem.
 167  */
 168 #define PMAC_FTR_MODEM_ENABLE           PMAC_FTR_DEF(1)
 169
 170 /* PMAC_FTR_SWIM3_ENABLE        (struct device_node* node, 0,int value)
 171  * enable/disable the swim3 (floppy) cell of a mac-io ASIC
 172  */
 173 #define PMAC_FTR_SWIM3_ENABLE           PMAC_FTR_DEF(2)
 174
 175 /* PMAC_FTR_MESH_ENABLE         (struct device_node* node, 0, int value)
 176  * enable/disable the mesh (scsi) cell of a mac-io ASIC
 177  */
 178 #define PMAC_FTR_MESH_ENABLE            PMAC_FTR_DEF(3)
 179
 180 /* PMAC_FTR_IDE_ENABLE          (struct device_node* node, int busID, int value)
 181  * enable/disable an IDE port of a mac-io ASIC
 182  * pass the busID parameter
 183  */
 184 #define PMAC_FTR_IDE_ENABLE             PMAC_FTR_DEF(4)
 185
 186 /* PMAC_FTR_IDE_RESET           (struct device_node* node, int busID, int value)
 187  * assert(1)/release(0) an IDE reset line (mac-io IDE only)
 188  */
 189 #define PMAC_FTR_IDE_RESET              PMAC_FTR_DEF(5)
 190
 191 /* PMAC_FTR_BMAC_ENABLE         (struct device_node* node, 0, int value)
 192  * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive
 193  * it's reset line
 194  */
 195 #define PMAC_FTR_BMAC_ENABLE            PMAC_FTR_DEF(6)
 196
 197 /* PMAC_FTR_GMAC_ENABLE         (struct device_node* node, 0, int value)
 198  * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This
 199  * control the cell's clock.
 200  */
 201 #define PMAC_FTR_GMAC_ENABLE            PMAC_FTR_DEF(7)
 202
 203 /* PMAC_FTR_GMAC_PHY_RESET      (struct device_node* node, 0, 0)
 204  * Perform a HW reset of the PHY connected to a gmac controller.
 205  * Pass the gmac device node, not the PHY node.
 206  */
 207 #define PMAC_FTR_GMAC_PHY_RESET         PMAC_FTR_DEF(8)
 208
 209 /* PMAC_FTR_SOUND_CHIP_ENABLE   (struct device_node* node, 0, int value)
 210  * enable/disable the sound chip, whatever it is and provided it can
 211  * acually be controlled
 212  */
 213 #define PMAC_FTR_SOUND_CHIP_ENABLE      PMAC_FTR_DEF(9)
 214
 215 /* -- add various tweaks related to sound routing -- */
 216
 217 /* PMAC_FTR_AIRPORT_ENABLE      (struct device_node* node, 0, int value)
 218  * enable/disable the airport card
 219  */
 220 #define PMAC_FTR_AIRPORT_ENABLE         PMAC_FTR_DEF(10)
 221
 222 /* PMAC_FTR_RESET_CPU           (NULL, int cpu_nr, 0)
 223  * toggle the reset line of a CPU on an uninorth-based SMP machine
 224  */
 225 #define PMAC_FTR_RESET_CPU              PMAC_FTR_DEF(11)
 226
 227 /* PMAC_FTR_USB_ENABLE          (struct device_node* node, 0, int value)
 228  * enable/disable an USB cell, along with the power of the USB "pad"
 229  * on keylargo based machines
 230  */
 231 #define PMAC_FTR_USB_ENABLE             PMAC_FTR_DEF(12)
 232
 233 /* PMAC_FTR_1394_ENABLE         (struct device_node* node, 0, int value)
 234  * enable/disable the firewire cell of an uninorth ASIC.
 235  */
 236 #define PMAC_FTR_1394_ENABLE            PMAC_FTR_DEF(13)
 237
 238 /* PMAC_FTR_1394_CABLE_POWER    (struct device_node* node, 0, int value)
 239  * enable/disable the firewire cable power supply of the uninorth
 240  * firewire cell
 241  */
 242 #define PMAC_FTR_1394_CABLE_POWER       PMAC_FTR_DEF(14)
 243
 244 /* PMAC_FTR_SLEEP_STATE         (struct device_node* node, 0, int value)
 245  * set the sleep state of the motherboard.
 246  *
 247  * Pass -1 as value to query for sleep capability
 248  * Pass 1 to set IOs to sleep
 249  * Pass 0 to set IOs to wake
 250  */
 251 #define PMAC_FTR_SLEEP_STATE            PMAC_FTR_DEF(15)
 252
 253 /* PMAC_FTR_GET_MB_INFO         (NULL, selector, 0)
 254  *
 255  * returns some motherboard infos.
 256  * selector: 0  - model id
 257  *           1  - model flags (capabilities)
 258  *           2  - model name (cast to const char *)
 259  */
 260 #define PMAC_FTR_GET_MB_INFO            PMAC_FTR_DEF(16)
 261 #define   PMAC_MB_INFO_MODEL    0
 262 #define   PMAC_MB_INFO_FLAGS    1
 263 #define   PMAC_MB_INFO_NAME     2
 264
 265 /* PMAC_FTR_READ_GPIO           (NULL, int index, 0)
 266  *
 267  * read a GPIO from a mac-io controller of type KeyLargo or Pangea.
 268  * the value returned is a byte (positive), or a negative error code
 269  */
 270 #define PMAC_FTR_READ_GPIO              PMAC_FTR_DEF(17)
 271
 272 /* PMAC_FTR_WRITE_GPIO          (NULL, int index, int value)
 273  *
 274  * write a GPIO of a mac-io controller of type KeyLargo or Pangea.
 275  */
 276 #define PMAC_FTR_WRITE_GPIO             PMAC_FTR_DEF(18)
 277
 278 /* PMAC_FTR_ENABLE_MPIC
 279  *
 280  * Enable the MPIC cell
 281  */
 282 #define PMAC_FTR_ENABLE_MPIC            PMAC_FTR_DEF(19)
 283
 284 /* PMAC_FTR_AACK_DELAY_ENABLE   (NULL, int enable, 0)
 285  *
 286  * Enable/disable the AACK delay on the northbridge for systems using DFS
 287  */
 288 #define PMAC_FTR_AACK_DELAY_ENABLE      PMAC_FTR_DEF(20)
 289
 290 /* PMAC_FTR_DEVICE_CAN_WAKE
 291  *
 292  * Used by video drivers to inform system that they can actually perform
 293  * wakeup from sleep
 294  */
 295 #define PMAC_FTR_DEVICE_CAN_WAKE        PMAC_FTR_DEF(22)
 296
 297
 298 /* Don't use those directly, they are for the sake of pmac_setup.c */
 299 extern long pmac_do_feature_call(unsigned int selector, ...);
 300 extern void pmac_feature_init(void);
 301
 302 /* Video suspend tweak */
 303 extern void pmac_set_early_video_resume(void (*proc)(void *data), void *data);
 304 extern void pmac_call_early_video_resume(void);
 305
 306 #define PMAC_FTR_DEF(x) ((_MACH_Pmac << 16) | (x))
 307
 308 /* The AGP driver registers itself here */
 309 extern void pmac_register_agp_pm(struct pci_dev *bridge,
 310                                  int (*suspend)(struct pci_dev *bridge),
 311                                  int (*resume)(struct pci_dev *bridge));
 312
 313 /* Those are meant to be used by video drivers to deal with AGP
 314  * suspend resume properly
 315  */
 316 extern void pmac_suspend_agp_for_card(struct pci_dev *dev);
 317 extern void pmac_resume_agp_for_card(struct pci_dev *dev);
 318
 319
 320 /*
 321  * The part below is for use by macio_asic.c only, do not rely
 322  * on the data structures or constants below in a normal driver
 323  *
 324  */
 325
 326 #define MAX_MACIO_CHIPS         2
 327
 328 enum {
 329         macio_unknown = 0,
 330         macio_grand_central,
 331         macio_ohare,
 332         macio_ohareII,
 333         macio_heathrow,
 334         macio_gatwick,
 335         macio_paddington,
 336         macio_keylargo,
 337         macio_pangea,
 338         macio_intrepid,
 339         macio_keylargo2,
 340 };
 341
 342 struct macio_chip
 343 {
 344         struct device_node      *of_node;
 345         int                     type;
 346         const char              *name;
 347         int                     rev;
 348         volatile u32            __iomem *base;
 349         unsigned long           flags;
 350
 351         /* For use by macio_asic PCI driver */
 352         struct macio_bus        lbus;
 353 };
 354
 355 extern struct macio_chip macio_chips[MAX_MACIO_CHIPS];
 356
 357 #define MACIO_FLAG_SCCA_ON      0x00000001
 358 #define MACIO_FLAG_SCCB_ON      0x00000002
 359 #define MACIO_FLAG_SCC_LOCKED   0x00000004
 360 #define MACIO_FLAG_AIRPORT_ON   0x00000010
 361 #define MACIO_FLAG_FW_SUPPORTED 0x00000020
 362
 363 extern struct macio_chip* macio_find(struct device_node* child, int type);
 364
 365 #define MACIO_FCR32(macio, r)   ((macio)->base + ((r) >> 2))
 366 #define MACIO_FCR8(macio, r)    (((volatile u8 __iomem *)((macio)->base)) + (r))
 367
 368 #define MACIO_IN32(r)           (in_le32(MACIO_FCR32(macio,r)))
 369 #define MACIO_OUT32(r,v)        (out_le32(MACIO_FCR32(macio,r), (v)))
 370 #define MACIO_BIS(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) | (v)))
 371 #define MACIO_BIC(r,v)          (MACIO_OUT32((r), MACIO_IN32(r) & ~(v)))
 372 #define MACIO_IN8(r)            (in_8(MACIO_FCR8(macio,r)))
 373 #define MACIO_OUT8(r,v)         (out_8(MACIO_FCR8(macio,r), (v)))
 374
 375 #endif /* __PPC_ASM_PMAC_FEATURE_H */
 376 #endif /* __KERNEL__ */