2 * Implementation of outs{bwl} for BlackFin processors using zero overhead loops.
4 * Copyright 2005-2009 Analog Devices Inc.
6 * Bas Vermeulen <bas@buyways.nl>
8 * Licensed under the GPL-2.
11 #include <linux/linkage.h>
18 P0 = R0; /* P0 = port */
19 P1 = R1; /* P1 = address */
20 P2 = R2; /* P2 = count */
22 LSETUP( .Llong_loop_s, .Llong_loop_e) LC0 = P2;
23 .Llong_loop_s: R0 = [P1++];
24 .Llong_loop_e: [P0] = R0;
31 P0 = R0; /* P0 = port */
32 P1 = R1; /* P1 = address */
33 P2 = R2; /* P2 = count */
35 LSETUP( .Lword_loop_s, .Lword_loop_e) LC0 = P2;
36 .Lword_loop_s: R0 = W[P1++];
37 .Lword_loop_e: W[P0] = R0;
44 P0 = R0; /* P0 = port */
45 P1 = R1; /* P1 = address */
46 P2 = R2; /* P2 = count */
48 LSETUP( .Lbyte_loop_s, .Lbyte_loop_e) LC0 = P2;
49 .Lbyte_loop_s: R0 = B[P1++];
50 .Lbyte_loop_e: B[P0] = R0;
57 P0 = R0; /* P0 = port */
58 P1 = R1; /* P1 = address */
59 P2 = R2; /* P2 = count */
61 LSETUP( .Lword8_loop_s, .Lword8_loop_e) LC0 = P2;
62 .Lword8_loop_s: R1 = B[P1++];
66 .Lword8_loop_e: W[P0] = R0;