2 * I2C bus driver for Amlogic Meson SoCs
4 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/clk.h>
12 #include <linux/completion.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
19 #include <linux/of_device.h>
20 #include <linux/platform_device.h>
21 #include <linux/types.h>
23 /* Meson I2C register map */
25 #define REG_SLAVE_ADDR 0x04
26 #define REG_TOK_LIST0 0x08
27 #define REG_TOK_LIST1 0x0c
28 #define REG_TOK_WDATA0 0x10
29 #define REG_TOK_WDATA1 0x14
30 #define REG_TOK_RDATA0 0x18
31 #define REG_TOK_RDATA1 0x1c
33 /* Control register fields */
34 #define REG_CTRL_START BIT(0)
35 #define REG_CTRL_ACK_IGNORE BIT(1)
36 #define REG_CTRL_STATUS BIT(2)
37 #define REG_CTRL_ERROR BIT(3)
38 #define REG_CTRL_CLKDIV_SHIFT 12
39 #define REG_CTRL_CLKDIV_MASK GENMASK(21, 12)
40 #define REG_CTRL_CLKDIVEXT_SHIFT 28
41 #define REG_CTRL_CLKDIVEXT_MASK GENMASK(29, 28)
43 #define I2C_TIMEOUT_MS 500
48 TOKEN_SLAVE_ADDR_WRITE
,
49 TOKEN_SLAVE_ADDR_READ
,
61 struct meson_i2c_data
{
62 unsigned char div_factor
;
66 * struct meson_i2c - Meson I2C device private data
68 * @adap: I2C adapter instance
69 * @dev: Pointer to device structure
70 * @regs: Base address of the device memory mapped registers
71 * @clk: Pointer to clock structure
72 * @msg: Pointer to the current I2C message
73 * @state: Current state in the driver state machine
74 * @last: Flag set for the last message in the transfer
75 * @count: Number of bytes to be sent/received in current transfer
76 * @pos: Current position in the send/receive buffer
77 * @error: Flag set when an error is received
78 * @lock: To avoid race conditions between irq handler and xfer code
79 * @done: Completion used to wait for transfer termination
80 * @tokens: Sequence of tokens to be written to the device
81 * @num_tokens: Number of tokens
82 * @data: Pointer to the controlller's platform data
85 struct i2c_adapter adap
;
98 struct completion done
;
102 const struct meson_i2c_data
*data
;
105 static void meson_i2c_set_mask(struct meson_i2c
*i2c
, int reg
, u32 mask
,
110 data
= readl(i2c
->regs
+ reg
);
113 writel(data
, i2c
->regs
+ reg
);
116 static void meson_i2c_reset_tokens(struct meson_i2c
*i2c
)
123 static void meson_i2c_add_token(struct meson_i2c
*i2c
, int token
)
125 if (i2c
->num_tokens
< 8)
126 i2c
->tokens
[0] |= (token
& 0xf) << (i2c
->num_tokens
* 4);
128 i2c
->tokens
[1] |= (token
& 0xf) << ((i2c
->num_tokens
% 8) * 4);
133 static void meson_i2c_set_clk_div(struct meson_i2c
*i2c
, unsigned int freq
)
135 unsigned long clk_rate
= clk_get_rate(i2c
->clk
);
138 div
= DIV_ROUND_UP(clk_rate
, freq
* i2c
->data
->div_factor
);
140 /* clock divider has 12 bits */
141 if (div
>= (1 << 12)) {
142 dev_err(i2c
->dev
, "requested bus frequency too low\n");
146 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_CLKDIV_MASK
,
147 (div
& GENMASK(9, 0)) << REG_CTRL_CLKDIV_SHIFT
);
149 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_CLKDIVEXT_MASK
,
150 (div
>> 10) << REG_CTRL_CLKDIVEXT_SHIFT
);
152 dev_dbg(i2c
->dev
, "%s: clk %lu, freq %u, div %u\n", __func__
,
153 clk_rate
, freq
, div
);
156 static void meson_i2c_get_data(struct meson_i2c
*i2c
, char *buf
, int len
)
161 rdata0
= readl(i2c
->regs
+ REG_TOK_RDATA0
);
162 rdata1
= readl(i2c
->regs
+ REG_TOK_RDATA1
);
164 dev_dbg(i2c
->dev
, "%s: data %08x %08x len %d\n", __func__
,
165 rdata0
, rdata1
, len
);
167 for (i
= 0; i
< min(4, len
); i
++)
168 *buf
++ = (rdata0
>> i
* 8) & 0xff;
170 for (i
= 4; i
< min(8, len
); i
++)
171 *buf
++ = (rdata1
>> (i
- 4) * 8) & 0xff;
174 static void meson_i2c_put_data(struct meson_i2c
*i2c
, char *buf
, int len
)
176 u32 wdata0
= 0, wdata1
= 0;
179 for (i
= 0; i
< min(4, len
); i
++)
180 wdata0
|= *buf
++ << (i
* 8);
182 for (i
= 4; i
< min(8, len
); i
++)
183 wdata1
|= *buf
++ << ((i
- 4) * 8);
185 writel(wdata0
, i2c
->regs
+ REG_TOK_WDATA0
);
186 writel(wdata1
, i2c
->regs
+ REG_TOK_WDATA1
);
188 dev_dbg(i2c
->dev
, "%s: data %08x %08x len %d\n", __func__
,
189 wdata0
, wdata1
, len
);
192 static void meson_i2c_prepare_xfer(struct meson_i2c
*i2c
)
194 bool write
= !(i2c
->msg
->flags
& I2C_M_RD
);
197 i2c
->count
= min(i2c
->msg
->len
- i2c
->pos
, 8);
199 for (i
= 0; i
< i2c
->count
- 1; i
++)
200 meson_i2c_add_token(i2c
, TOKEN_DATA
);
203 if (write
|| i2c
->pos
+ i2c
->count
< i2c
->msg
->len
)
204 meson_i2c_add_token(i2c
, TOKEN_DATA
);
206 meson_i2c_add_token(i2c
, TOKEN_DATA_LAST
);
210 meson_i2c_put_data(i2c
, i2c
->msg
->buf
+ i2c
->pos
, i2c
->count
);
212 if (i2c
->last
&& i2c
->pos
+ i2c
->count
>= i2c
->msg
->len
)
213 meson_i2c_add_token(i2c
, TOKEN_STOP
);
215 writel(i2c
->tokens
[0], i2c
->regs
+ REG_TOK_LIST0
);
216 writel(i2c
->tokens
[1], i2c
->regs
+ REG_TOK_LIST1
);
219 static irqreturn_t
meson_i2c_irq(int irqno
, void *dev_id
)
221 struct meson_i2c
*i2c
= dev_id
;
224 spin_lock(&i2c
->lock
);
226 meson_i2c_reset_tokens(i2c
);
227 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_START
, 0);
228 ctrl
= readl(i2c
->regs
+ REG_CTRL
);
230 dev_dbg(i2c
->dev
, "irq: state %d, pos %d, count %d, ctrl %08x\n",
231 i2c
->state
, i2c
->pos
, i2c
->count
, ctrl
);
233 if (i2c
->state
== STATE_IDLE
) {
234 spin_unlock(&i2c
->lock
);
238 if (ctrl
& REG_CTRL_ERROR
) {
240 * The bit is set when the IGNORE_NAK bit is cleared
241 * and the device didn't respond. In this case, the
242 * I2C controller automatically generates a STOP
245 dev_dbg(i2c
->dev
, "error bit set\n");
247 i2c
->state
= STATE_IDLE
;
248 complete(&i2c
->done
);
252 if (i2c
->state
== STATE_READ
&& i2c
->count
)
253 meson_i2c_get_data(i2c
, i2c
->msg
->buf
+ i2c
->pos
, i2c
->count
);
255 i2c
->pos
+= i2c
->count
;
257 if (i2c
->pos
>= i2c
->msg
->len
) {
258 i2c
->state
= STATE_IDLE
;
259 complete(&i2c
->done
);
263 /* Restart the processing */
264 meson_i2c_prepare_xfer(i2c
);
265 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_START
, REG_CTRL_START
);
267 spin_unlock(&i2c
->lock
);
272 static void meson_i2c_do_start(struct meson_i2c
*i2c
, struct i2c_msg
*msg
)
276 token
= (msg
->flags
& I2C_M_RD
) ? TOKEN_SLAVE_ADDR_READ
:
277 TOKEN_SLAVE_ADDR_WRITE
;
279 writel(msg
->addr
<< 1, i2c
->regs
+ REG_SLAVE_ADDR
);
280 meson_i2c_add_token(i2c
, TOKEN_START
);
281 meson_i2c_add_token(i2c
, token
);
284 static int meson_i2c_xfer_msg(struct meson_i2c
*i2c
, struct i2c_msg
*msg
,
287 unsigned long time_left
, flags
;
296 meson_i2c_reset_tokens(i2c
);
298 flags
= (msg
->flags
& I2C_M_IGNORE_NAK
) ? REG_CTRL_ACK_IGNORE
: 0;
299 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_ACK_IGNORE
, flags
);
301 if (!(msg
->flags
& I2C_M_NOSTART
))
302 meson_i2c_do_start(i2c
, msg
);
304 i2c
->state
= (msg
->flags
& I2C_M_RD
) ? STATE_READ
: STATE_WRITE
;
305 meson_i2c_prepare_xfer(i2c
);
306 reinit_completion(&i2c
->done
);
308 /* Start the transfer */
309 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_START
, REG_CTRL_START
);
311 time_left
= msecs_to_jiffies(I2C_TIMEOUT_MS
);
312 time_left
= wait_for_completion_timeout(&i2c
->done
, time_left
);
315 * Protect access to i2c struct and registers from interrupt
316 * handlers triggered by a transfer terminated after the
319 spin_lock_irqsave(&i2c
->lock
, flags
);
321 /* Abort any active operation */
322 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_START
, 0);
325 i2c
->state
= STATE_IDLE
;
332 spin_unlock_irqrestore(&i2c
->lock
, flags
);
337 static int meson_i2c_xfer(struct i2c_adapter
*adap
, struct i2c_msg
*msgs
,
340 struct meson_i2c
*i2c
= adap
->algo_data
;
343 clk_enable(i2c
->clk
);
345 for (i
= 0; i
< num
; i
++) {
346 ret
= meson_i2c_xfer_msg(i2c
, msgs
+ i
, i
== num
- 1);
351 clk_disable(i2c
->clk
);
356 static u32
meson_i2c_func(struct i2c_adapter
*adap
)
358 return I2C_FUNC_I2C
| I2C_FUNC_SMBUS_EMUL
;
361 static const struct i2c_algorithm meson_i2c_algorithm
= {
362 .master_xfer
= meson_i2c_xfer
,
363 .functionality
= meson_i2c_func
,
366 static int meson_i2c_probe(struct platform_device
*pdev
)
368 struct device_node
*np
= pdev
->dev
.of_node
;
369 struct meson_i2c
*i2c
;
370 struct resource
*mem
;
371 struct i2c_timings timings
;
374 i2c
= devm_kzalloc(&pdev
->dev
, sizeof(struct meson_i2c
), GFP_KERNEL
);
378 i2c_parse_fw_timings(&pdev
->dev
, &timings
, true);
380 i2c
->dev
= &pdev
->dev
;
381 platform_set_drvdata(pdev
, i2c
);
383 spin_lock_init(&i2c
->lock
);
384 init_completion(&i2c
->done
);
386 i2c
->data
= (const struct meson_i2c_data
*)
387 of_device_get_match_data(&pdev
->dev
);
389 i2c
->clk
= devm_clk_get(&pdev
->dev
, NULL
);
390 if (IS_ERR(i2c
->clk
)) {
391 dev_err(&pdev
->dev
, "can't get device clock\n");
392 return PTR_ERR(i2c
->clk
);
395 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
396 i2c
->regs
= devm_ioremap_resource(&pdev
->dev
, mem
);
397 if (IS_ERR(i2c
->regs
))
398 return PTR_ERR(i2c
->regs
);
400 irq
= platform_get_irq(pdev
, 0);
402 dev_err(&pdev
->dev
, "can't find IRQ\n");
406 ret
= devm_request_irq(&pdev
->dev
, irq
, meson_i2c_irq
, 0, NULL
, i2c
);
408 dev_err(&pdev
->dev
, "can't request IRQ\n");
412 ret
= clk_prepare(i2c
->clk
);
414 dev_err(&pdev
->dev
, "can't prepare clock\n");
418 strlcpy(i2c
->adap
.name
, "Meson I2C adapter",
419 sizeof(i2c
->adap
.name
));
420 i2c
->adap
.owner
= THIS_MODULE
;
421 i2c
->adap
.algo
= &meson_i2c_algorithm
;
422 i2c
->adap
.dev
.parent
= &pdev
->dev
;
423 i2c
->adap
.dev
.of_node
= np
;
424 i2c
->adap
.algo_data
= i2c
;
427 * A transfer is triggered when START bit changes from 0 to 1.
428 * Ensure that the bit is set to 0 after probe
430 meson_i2c_set_mask(i2c
, REG_CTRL
, REG_CTRL_START
, 0);
432 ret
= i2c_add_adapter(&i2c
->adap
);
434 clk_unprepare(i2c
->clk
);
438 meson_i2c_set_clk_div(i2c
, timings
.bus_freq_hz
);
443 static int meson_i2c_remove(struct platform_device
*pdev
)
445 struct meson_i2c
*i2c
= platform_get_drvdata(pdev
);
447 i2c_del_adapter(&i2c
->adap
);
448 clk_unprepare(i2c
->clk
);
453 static const struct meson_i2c_data i2c_meson6_data
= {
457 static const struct meson_i2c_data i2c_gxbb_data
= {
461 static const struct meson_i2c_data i2c_axg_data
= {
465 static const struct of_device_id meson_i2c_match
[] = {
466 { .compatible
= "amlogic,meson6-i2c", .data
= &i2c_meson6_data
},
467 { .compatible
= "amlogic,meson-gxbb-i2c", .data
= &i2c_gxbb_data
},
468 { .compatible
= "amlogic,meson-axg-i2c", .data
= &i2c_axg_data
},
472 MODULE_DEVICE_TABLE(of
, meson_i2c_match
);
474 static struct platform_driver meson_i2c_driver
= {
475 .probe
= meson_i2c_probe
,
476 .remove
= meson_i2c_remove
,
479 .of_match_table
= meson_i2c_match
,
483 module_platform_driver(meson_i2c_driver
);
485 MODULE_DESCRIPTION("Amlogic Meson I2C Bus driver");
486 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
487 MODULE_LICENSE("GPL v2");