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Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / bus / brcmstb_gisb.c
blob7355fa2cb4391fd20b25797d7e90840ea2bff65e
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) 2014-2017 Broadcom
4 */
5
6 #include <linux/init.h>
7 #include <linux/types.h>
8 #include <linux/module.h>
9 #include <linux/platform_device.h>
10 #include <linux/interrupt.h>
11 #include <linux/sysfs.h>
12 #include <linux/io.h>
13 #include <linux/string.h>
14 #include <linux/device.h>
15 #include <linux/list.h>
16 #include <linux/of.h>
17 #include <linux/bitops.h>
18 #include <linux/pm.h>
19 #include <linux/kernel.h>
20 #include <linux/kdebug.h>
21 #include <linux/notifier.h>
22
23 #ifdef CONFIG_MIPS
24 #include <asm/traps.h>
25 #endif
26
27 #define ARB_ERR_CAP_CLEAR (1 << 0)
28 #define ARB_ERR_CAP_STATUS_TIMEOUT (1 << 12)
29 #define ARB_ERR_CAP_STATUS_TEA (1 << 11)
30 #define ARB_ERR_CAP_STATUS_WRITE (1 << 1)
31 #define ARB_ERR_CAP_STATUS_VALID (1 << 0)
32
33 #define ARB_BP_CAP_CLEAR (1 << 0)
34 #define ARB_BP_CAP_STATUS_PROT_SHIFT 14
35 #define ARB_BP_CAP_STATUS_TYPE (1 << 13)
36 #define ARB_BP_CAP_STATUS_RSP_SHIFT 10
37 #define ARB_BP_CAP_STATUS_MASK GENMASK(1, 0)
38 #define ARB_BP_CAP_STATUS_BS_SHIFT 2
39 #define ARB_BP_CAP_STATUS_WRITE (1 << 1)
40 #define ARB_BP_CAP_STATUS_VALID (1 << 0)
41
42 enum {
43 ARB_TIMER,
44 ARB_BP_CAP_CLR,
45 ARB_BP_CAP_HI_ADDR,
46 ARB_BP_CAP_ADDR,
47 ARB_BP_CAP_STATUS,
48 ARB_BP_CAP_MASTER,
49 ARB_ERR_CAP_CLR,
50 ARB_ERR_CAP_HI_ADDR,
51 ARB_ERR_CAP_ADDR,
52 ARB_ERR_CAP_STATUS,
53 ARB_ERR_CAP_MASTER,
54 };
55
56 static const int gisb_offsets_bcm7038[] = {
57 [ARB_TIMER] = 0x00c,
58 [ARB_BP_CAP_CLR] = 0x014,
59 [ARB_BP_CAP_HI_ADDR] = -1,
60 [ARB_BP_CAP_ADDR] = 0x0b8,
61 [ARB_BP_CAP_STATUS] = 0x0c0,
62 [ARB_BP_CAP_MASTER] = -1,
63 [ARB_ERR_CAP_CLR] = 0x0c4,
64 [ARB_ERR_CAP_HI_ADDR] = -1,
65 [ARB_ERR_CAP_ADDR] = 0x0c8,
66 [ARB_ERR_CAP_STATUS] = 0x0d0,
67 [ARB_ERR_CAP_MASTER] = -1,
68 };
69
70 static const int gisb_offsets_bcm7278[] = {
71 [ARB_TIMER] = 0x008,
72 [ARB_BP_CAP_CLR] = 0x01c,
73 [ARB_BP_CAP_HI_ADDR] = -1,
74 [ARB_BP_CAP_ADDR] = 0x220,
75 [ARB_BP_CAP_STATUS] = 0x230,
76 [ARB_BP_CAP_MASTER] = 0x234,
77 [ARB_ERR_CAP_CLR] = 0x7f8,
78 [ARB_ERR_CAP_HI_ADDR] = -1,
79 [ARB_ERR_CAP_ADDR] = 0x7e0,
80 [ARB_ERR_CAP_STATUS] = 0x7f0,
81 [ARB_ERR_CAP_MASTER] = 0x7f4,
82 };
83
84 static const int gisb_offsets_bcm7400[] = {
85 [ARB_TIMER] = 0x00c,
86 [ARB_BP_CAP_CLR] = 0x014,
87 [ARB_BP_CAP_HI_ADDR] = -1,
88 [ARB_BP_CAP_ADDR] = 0x0b8,
89 [ARB_BP_CAP_STATUS] = 0x0c0,
90 [ARB_BP_CAP_MASTER] = 0x0c4,
91 [ARB_ERR_CAP_CLR] = 0x0c8,
92 [ARB_ERR_CAP_HI_ADDR] = -1,
93 [ARB_ERR_CAP_ADDR] = 0x0cc,
94 [ARB_ERR_CAP_STATUS] = 0x0d4,
95 [ARB_ERR_CAP_MASTER] = 0x0d8,
96 };
97
98 static const int gisb_offsets_bcm7435[] = {
99 [ARB_TIMER] = 0x00c,
100 [ARB_BP_CAP_CLR] = 0x014,
101 [ARB_BP_CAP_HI_ADDR] = -1,
102 [ARB_BP_CAP_ADDR] = 0x158,
103 [ARB_BP_CAP_STATUS] = 0x160,
104 [ARB_BP_CAP_MASTER] = 0x164,
105 [ARB_ERR_CAP_CLR] = 0x168,
106 [ARB_ERR_CAP_HI_ADDR] = -1,
107 [ARB_ERR_CAP_ADDR] = 0x16c,
108 [ARB_ERR_CAP_STATUS] = 0x174,
109 [ARB_ERR_CAP_MASTER] = 0x178,
110 };
111
112 static const int gisb_offsets_bcm7445[] = {
113 [ARB_TIMER] = 0x008,
114 [ARB_BP_CAP_CLR] = 0x010,
115 [ARB_BP_CAP_HI_ADDR] = -1,
116 [ARB_BP_CAP_ADDR] = 0x1d8,
117 [ARB_BP_CAP_STATUS] = 0x1e0,
118 [ARB_BP_CAP_MASTER] = 0x1e4,
119 [ARB_ERR_CAP_CLR] = 0x7e4,
120 [ARB_ERR_CAP_HI_ADDR] = 0x7e8,
121 [ARB_ERR_CAP_ADDR] = 0x7ec,
122 [ARB_ERR_CAP_STATUS] = 0x7f4,
123 [ARB_ERR_CAP_MASTER] = 0x7f8,
124 };
125
126 struct brcmstb_gisb_arb_device {
127 void __iomem *base;
128 const int *gisb_offsets;
129 bool big_endian;
130 struct mutex lock;
131 struct list_head next;
132 u32 valid_mask;
133 const char *master_names[sizeof(u32) * BITS_PER_BYTE];
134 u32 saved_timeout;
135 };
136
137 static LIST_HEAD(brcmstb_gisb_arb_device_list);
138
139 static u32 gisb_read(struct brcmstb_gisb_arb_device *gdev, int reg)
140 {
141 int offset = gdev->gisb_offsets[reg];
142
143 if (offset < 0) {
144 /* return 1 if the hardware doesn't have ARB_ERR_CAP_MASTER */
145 if (reg == ARB_ERR_CAP_MASTER)
146 return 1;
147 else
148 return 0;
149 }
150
151 if (gdev->big_endian)
152 return ioread32be(gdev->base + offset);
153 else
154 return ioread32(gdev->base + offset);
155 }
156
157 static u64 gisb_read_address(struct brcmstb_gisb_arb_device *gdev)
158 {
159 u64 value;
160
161 value = gisb_read(gdev, ARB_ERR_CAP_ADDR);
162 value |= (u64)gisb_read(gdev, ARB_ERR_CAP_HI_ADDR) << 32;
163
164 return value;
165 }
166
167 static u64 gisb_read_bp_address(struct brcmstb_gisb_arb_device *gdev)
168 {
169 u64 value;
170
171 value = gisb_read(gdev, ARB_BP_CAP_ADDR);
172 value |= (u64)gisb_read(gdev, ARB_BP_CAP_HI_ADDR) << 32;
173
174 return value;
175 }
176
177 static void gisb_write(struct brcmstb_gisb_arb_device *gdev, u32 val, int reg)
178 {
179 int offset = gdev->gisb_offsets[reg];
180
181 if (offset == -1)
182 return;
183
184 if (gdev->big_endian)
185 iowrite32be(val, gdev->base + offset);
186 else
187 iowrite32(val, gdev->base + offset);
188 }
189
190 static ssize_t gisb_arb_get_timeout(struct device *dev,
191 struct device_attribute *attr,
192 char *buf)
193 {
194 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
195 u32 timeout;
196
197 mutex_lock(&gdev->lock);
198 timeout = gisb_read(gdev, ARB_TIMER);
199 mutex_unlock(&gdev->lock);
200
201 return sprintf(buf, "%d", timeout);
202 }
203
204 static ssize_t gisb_arb_set_timeout(struct device *dev,
205 struct device_attribute *attr,
206 const char *buf, size_t count)
207 {
208 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
209 int val, ret;
210
211 ret = kstrtoint(buf, 10, &val);
212 if (ret < 0)
213 return ret;
214
215 if (val == 0 || val >= 0xffffffff)
216 return -EINVAL;
217
218 mutex_lock(&gdev->lock);
219 gisb_write(gdev, val, ARB_TIMER);
220 mutex_unlock(&gdev->lock);
221
222 return count;
223 }
224
225 static const char *
226 brcmstb_gisb_master_to_str(struct brcmstb_gisb_arb_device *gdev,
227 u32 masters)
228 {
229 u32 mask = gdev->valid_mask & masters;
230
231 if (hweight_long(mask) != 1)
232 return NULL;
233
234 return gdev->master_names[ffs(mask) - 1];
235 }
236
237 static int brcmstb_gisb_arb_decode_addr(struct brcmstb_gisb_arb_device *gdev,
238 const char *reason)
239 {
240 u32 cap_status;
241 u64 arb_addr;
242 u32 master;
243 const char *m_name;
244 char m_fmt[11];
245
246 cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
247
248 /* Invalid captured address, bail out */
249 if (!(cap_status & ARB_ERR_CAP_STATUS_VALID))
250 return 1;
251
252 /* Read the address and master */
253 arb_addr = gisb_read_address(gdev);
254 master = gisb_read(gdev, ARB_ERR_CAP_MASTER);
255
256 m_name = brcmstb_gisb_master_to_str(gdev, master);
257 if (!m_name) {
258 snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master);
259 m_name = m_fmt;
260 }
261
262 pr_crit("GISB: %s at 0x%llx [%c %s], core: %s\n",
263 reason, arb_addr,
264 cap_status & ARB_ERR_CAP_STATUS_WRITE ? 'W' : 'R',
265 cap_status & ARB_ERR_CAP_STATUS_TIMEOUT ? "timeout" : "",
266 m_name);
267
268 /* clear the GISB error */
269 gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR);
270
271 return 0;
272 }
273
274 #ifdef CONFIG_MIPS
275 static int brcmstb_bus_error_handler(struct pt_regs *regs, int is_fixup)
276 {
277 int ret = 0;
278 struct brcmstb_gisb_arb_device *gdev;
279 u32 cap_status;
280
281 list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next) {
282 cap_status = gisb_read(gdev, ARB_ERR_CAP_STATUS);
283
284 /* Invalid captured address, bail out */
285 if (!(cap_status & ARB_ERR_CAP_STATUS_VALID)) {
286 is_fixup = 1;
287 goto out;
288 }
289
290 ret |= brcmstb_gisb_arb_decode_addr(gdev, "bus error");
291 }
292 out:
293 return is_fixup ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
294 }
295 #endif
296
297 static irqreturn_t brcmstb_gisb_timeout_handler(int irq, void *dev_id)
298 {
299 brcmstb_gisb_arb_decode_addr(dev_id, "timeout");
300
301 return IRQ_HANDLED;
302 }
303
304 static irqreturn_t brcmstb_gisb_tea_handler(int irq, void *dev_id)
305 {
306 brcmstb_gisb_arb_decode_addr(dev_id, "target abort");
307
308 return IRQ_HANDLED;
309 }
310
311 static irqreturn_t brcmstb_gisb_bp_handler(int irq, void *dev_id)
312 {
313 struct brcmstb_gisb_arb_device *gdev = dev_id;
314 const char *m_name;
315 u32 bp_status;
316 u64 arb_addr;
317 u32 master;
318 char m_fmt[11];
319
320 bp_status = gisb_read(gdev, ARB_BP_CAP_STATUS);
321
322 /* Invalid captured address, bail out */
323 if (!(bp_status & ARB_BP_CAP_STATUS_VALID))
324 return IRQ_HANDLED;
325
326 /* Read the address and master */
327 arb_addr = gisb_read_bp_address(gdev);
328 master = gisb_read(gdev, ARB_BP_CAP_MASTER);
329
330 m_name = brcmstb_gisb_master_to_str(gdev, master);
331 if (!m_name) {
332 snprintf(m_fmt, sizeof(m_fmt), "0x%08x", master);
333 m_name = m_fmt;
334 }
335
336 pr_crit("GISB: breakpoint at 0x%llx [%c], core: %s\n",
337 arb_addr, bp_status & ARB_BP_CAP_STATUS_WRITE ? 'W' : 'R',
338 m_name);
339
340 /* clear the GISB error */
341 gisb_write(gdev, ARB_ERR_CAP_CLEAR, ARB_ERR_CAP_CLR);
342
343 return IRQ_HANDLED;
344 }
345
346 /*
347 * Dump out gisb errors on die or panic.
348 */
349 static int dump_gisb_error(struct notifier_block *self, unsigned long v,
350 void *p);
351
352 static struct notifier_block gisb_die_notifier = {
353 .notifier_call = dump_gisb_error,
354 };
355
356 static struct notifier_block gisb_panic_notifier = {
357 .notifier_call = dump_gisb_error,
358 };
359
360 static int dump_gisb_error(struct notifier_block *self, unsigned long v,
361 void *p)
362 {
363 struct brcmstb_gisb_arb_device *gdev;
364 const char *reason = "panic";
365
366 if (self == &gisb_die_notifier)
367 reason = "die";
368
369 /* iterate over each GISB arb registered handlers */
370 list_for_each_entry(gdev, &brcmstb_gisb_arb_device_list, next)
371 brcmstb_gisb_arb_decode_addr(gdev, reason);
372
373 return NOTIFY_DONE;
374 }
375
376 static DEVICE_ATTR(gisb_arb_timeout, S_IWUSR | S_IRUGO,
377 gisb_arb_get_timeout, gisb_arb_set_timeout);
378
379 static struct attribute *gisb_arb_sysfs_attrs[] = {
380 &dev_attr_gisb_arb_timeout.attr,
381 NULL,
382 };
383
384 static struct attribute_group gisb_arb_sysfs_attr_group = {
385 .attrs = gisb_arb_sysfs_attrs,
386 };
387
388 static const struct of_device_id brcmstb_gisb_arb_of_match[] = {
389 { .compatible = "brcm,gisb-arb", .data = gisb_offsets_bcm7445 },
390 { .compatible = "brcm,bcm7445-gisb-arb", .data = gisb_offsets_bcm7445 },
391 { .compatible = "brcm,bcm7435-gisb-arb", .data = gisb_offsets_bcm7435 },
392 { .compatible = "brcm,bcm7400-gisb-arb", .data = gisb_offsets_bcm7400 },
393 { .compatible = "brcm,bcm7278-gisb-arb", .data = gisb_offsets_bcm7278 },
394 { .compatible = "brcm,bcm7038-gisb-arb", .data = gisb_offsets_bcm7038 },
395 { },
396 };
397
398 static int __init brcmstb_gisb_arb_probe(struct platform_device *pdev)
399 {
400 struct device_node *dn = pdev->dev.of_node;
401 struct brcmstb_gisb_arb_device *gdev;
402 const struct of_device_id *of_id;
403 struct resource *r;
404 int err, timeout_irq, tea_irq, bp_irq;
405 unsigned int num_masters, j = 0;
406 int i, first, last;
407
408 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
409 timeout_irq = platform_get_irq(pdev, 0);
410 tea_irq = platform_get_irq(pdev, 1);
411 bp_irq = platform_get_irq(pdev, 2);
412
413 gdev = devm_kzalloc(&pdev->dev, sizeof(*gdev), GFP_KERNEL);
414 if (!gdev)
415 return -ENOMEM;
416
417 mutex_init(&gdev->lock);
418 INIT_LIST_HEAD(&gdev->next);
419
420 gdev->base = devm_ioremap_resource(&pdev->dev, r);
421 if (IS_ERR(gdev->base))
422 return PTR_ERR(gdev->base);
423
424 of_id = of_match_node(brcmstb_gisb_arb_of_match, dn);
425 if (!of_id) {
426 pr_err("failed to look up compatible string\n");
427 return -EINVAL;
428 }
429 gdev->gisb_offsets = of_id->data;
430 gdev->big_endian = of_device_is_big_endian(dn);
431
432 err = devm_request_irq(&pdev->dev, timeout_irq,
433 brcmstb_gisb_timeout_handler, 0, pdev->name,
434 gdev);
435 if (err < 0)
436 return err;
437
438 err = devm_request_irq(&pdev->dev, tea_irq,
439 brcmstb_gisb_tea_handler, 0, pdev->name,
440 gdev);
441 if (err < 0)
442 return err;
443
444 /* Interrupt is optional */
445 if (bp_irq > 0) {
446 err = devm_request_irq(&pdev->dev, bp_irq,
447 brcmstb_gisb_bp_handler, 0, pdev->name,
448 gdev);
449 if (err < 0)
450 return err;
451 }
452
453 /* If we do not have a valid mask, assume all masters are enabled */
454 if (of_property_read_u32(dn, "brcm,gisb-arb-master-mask",
455 &gdev->valid_mask))
456 gdev->valid_mask = 0xffffffff;
457
458 /* Proceed with reading the litteral names if we agree on the
459 * number of masters
460 */
461 num_masters = of_property_count_strings(dn,
462 "brcm,gisb-arb-master-names");
463 if (hweight_long(gdev->valid_mask) == num_masters) {
464 first = ffs(gdev->valid_mask) - 1;
465 last = fls(gdev->valid_mask) - 1;
466
467 for (i = first; i < last; i++) {
468 if (!(gdev->valid_mask & BIT(i)))
469 continue;
470
471 of_property_read_string_index(dn,
472 "brcm,gisb-arb-master-names", j,
473 &gdev->master_names[i]);
474 j++;
475 }
476 }
477
478 err = sysfs_create_group(&pdev->dev.kobj, &gisb_arb_sysfs_attr_group);
479 if (err)
480 return err;
481
482 platform_set_drvdata(pdev, gdev);
483
484 list_add_tail(&gdev->next, &brcmstb_gisb_arb_device_list);
485
486 #ifdef CONFIG_MIPS
487 board_be_handler = brcmstb_bus_error_handler;
488 #endif
489
490 if (list_is_singular(&brcmstb_gisb_arb_device_list)) {
491 register_die_notifier(&gisb_die_notifier);
492 atomic_notifier_chain_register(&panic_notifier_list,
493 &gisb_panic_notifier);
494 }
495
496 dev_info(&pdev->dev, "registered irqs: %d, %d\n",
497 timeout_irq, tea_irq);
498
499 return 0;
500 }
501
502 #ifdef CONFIG_PM_SLEEP
503 static int brcmstb_gisb_arb_suspend(struct device *dev)
504 {
505 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
506
507 gdev->saved_timeout = gisb_read(gdev, ARB_TIMER);
508
509 return 0;
510 }
511
512 /* Make sure we provide the same timeout value that was configured before, and
513 * do this before the GISB timeout interrupt handler has any chance to run.
514 */
515 static int brcmstb_gisb_arb_resume_noirq(struct device *dev)
516 {
517 struct brcmstb_gisb_arb_device *gdev = dev_get_drvdata(dev);
518
519 gisb_write(gdev, gdev->saved_timeout, ARB_TIMER);
520
521 return 0;
522 }
523 #else
524 #define brcmstb_gisb_arb_suspend NULL
525 #define brcmstb_gisb_arb_resume_noirq NULL
526 #endif
527
528 static const struct dev_pm_ops brcmstb_gisb_arb_pm_ops = {
529 .suspend = brcmstb_gisb_arb_suspend,
530 .resume_noirq = brcmstb_gisb_arb_resume_noirq,
531 };
532
533 static struct platform_driver brcmstb_gisb_arb_driver = {
534 .driver = {
535 .name = "brcm-gisb-arb",
536 .of_match_table = brcmstb_gisb_arb_of_match,
537 .pm = &brcmstb_gisb_arb_pm_ops,
538 },
539 };
540
541 static int __init brcm_gisb_driver_init(void)
542 {
543 return platform_driver_probe(&brcmstb_gisb_arb_driver,
544 brcmstb_gisb_arb_probe);
545 }
546
547 module_init(brcm_gisb_driver_init);
Linux with added FPC-III support