1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2019 MediaTek Inc.
4 * Author: Wendell Lin <wendell.lin@mediatek.com>
7 #include <linux/clk-provider.h>
9 #include <linux/of_address.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
16 #include <dt-bindings/clock/mt6779-clk.h>
18 static const struct mtk_gate_regs audio0_cg_regs
= {
24 static const struct mtk_gate_regs audio1_cg_regs
= {
30 #define GATE_AUDIO0(_id, _name, _parent, _shift) \
31 GATE_MTK(_id, _name, _parent, &audio0_cg_regs, _shift, \
32 &mtk_clk_gate_ops_no_setclr)
33 #define GATE_AUDIO1(_id, _name, _parent, _shift) \
34 GATE_MTK(_id, _name, _parent, &audio1_cg_regs, _shift, \
35 &mtk_clk_gate_ops_no_setclr)
37 static const struct mtk_gate audio_clks
[] = {
39 GATE_AUDIO0(CLK_AUD_AFE
, "aud_afe", "audio_sel", 2),
40 GATE_AUDIO0(CLK_AUD_22M
, "aud_22m", "aud_eng1_sel", 8),
41 GATE_AUDIO0(CLK_AUD_24M
, "aud_24m", "aud_eng2_sel", 9),
42 GATE_AUDIO0(CLK_AUD_APLL2_TUNER
, "aud_apll2_tuner",
44 GATE_AUDIO0(CLK_AUD_APLL_TUNER
, "aud_apll_tuner",
46 GATE_AUDIO0(CLK_AUD_TDM
, "aud_tdm", "aud_eng1_sel", 20),
47 GATE_AUDIO0(CLK_AUD_ADC
, "aud_adc", "audio_sel", 24),
48 GATE_AUDIO0(CLK_AUD_DAC
, "aud_dac", "audio_sel", 25),
49 GATE_AUDIO0(CLK_AUD_DAC_PREDIS
, "aud_dac_predis",
51 GATE_AUDIO0(CLK_AUD_TML
, "aud_tml", "audio_sel", 27),
52 GATE_AUDIO0(CLK_AUD_NLE
, "aud_nle", "audio_sel", 28),
54 GATE_AUDIO1(CLK_AUD_I2S1_BCLK_SW
, "aud_i2s1_bclk",
56 GATE_AUDIO1(CLK_AUD_I2S2_BCLK_SW
, "aud_i2s2_bclk",
58 GATE_AUDIO1(CLK_AUD_I2S3_BCLK_SW
, "aud_i2s3_bclk",
60 GATE_AUDIO1(CLK_AUD_I2S4_BCLK_SW
, "aud_i2s4_bclk",
62 GATE_AUDIO1(CLK_AUD_I2S5_BCLK_SW
, "aud_i2s5_bclk",
64 GATE_AUDIO1(CLK_AUD_CONN_I2S_ASRC
, "aud_conn_i2s",
66 GATE_AUDIO1(CLK_AUD_GENERAL1_ASRC
, "aud_general1",
68 GATE_AUDIO1(CLK_AUD_GENERAL2_ASRC
, "aud_general2",
70 GATE_AUDIO1(CLK_AUD_DAC_HIRES
, "aud_dac_hires",
72 GATE_AUDIO1(CLK_AUD_ADC_HIRES
, "aud_adc_hires",
74 GATE_AUDIO1(CLK_AUD_ADC_HIRES_TML
, "aud_adc_hires_tml",
76 GATE_AUDIO1(CLK_AUD_PDN_ADDA6_ADC
, "aud_pdn_adda6_adc",
78 GATE_AUDIO1(CLK_AUD_ADDA6_ADC_HIRES
, "aud_adda6_adc_hires",
81 GATE_AUDIO1(CLK_AUD_3RD_DAC
, "aud_3rd_dac", "audio_sel",
83 GATE_AUDIO1(CLK_AUD_3RD_DAC_PREDIS
, "aud_3rd_dac_predis",
85 GATE_AUDIO1(CLK_AUD_3RD_DAC_TML
, "aud_3rd_dac_tml",
87 GATE_AUDIO1(CLK_AUD_3RD_DAC_HIRES
, "aud_3rd_dac_hires",
91 static const struct of_device_id of_match_clk_mt6779_aud
[] = {
92 { .compatible
= "mediatek,mt6779-audio", },
96 static int clk_mt6779_aud_probe(struct platform_device
*pdev
)
98 struct clk_onecell_data
*clk_data
;
99 struct device_node
*node
= pdev
->dev
.of_node
;
101 clk_data
= mtk_alloc_clk_data(CLK_AUD_NR_CLK
);
103 mtk_clk_register_gates(node
, audio_clks
, ARRAY_SIZE(audio_clks
),
106 return of_clk_add_provider(node
, of_clk_src_onecell_get
, clk_data
);
109 static struct platform_driver clk_mt6779_aud_drv
= {
110 .probe
= clk_mt6779_aud_probe
,
112 .name
= "clk-mt6779-aud",
113 .of_match_table
= of_match_clk_mt6779_aud
,
117 builtin_platform_driver(clk_mt6779_aud_drv
);