1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2020 MediaTek Inc.
4 * Copyright (c) 2020 BayLibre, SAS
5 * Author: James Liao <jamesjj.liao@mediatek.com>
6 * Fabien Parent <fparent@baylibre.com>
9 #include <linux/clk-provider.h>
11 #include <linux/of_address.h>
12 #include <linux/of_device.h>
13 #include <linux/platform_device.h>
18 #include <dt-bindings/clock/mt8167-clk.h>
20 static const struct mtk_gate_regs img_cg_regs
= {
26 #define GATE_IMG(_id, _name, _parent, _shift) { \
29 .parent_name = _parent, \
30 .regs = &img_cg_regs, \
32 .ops = &mtk_clk_gate_ops_setclr, \
35 static const struct mtk_gate img_clks
[] __initconst
= {
36 GATE_IMG(CLK_IMG_LARB1_SMI
, "img_larb1_smi", "smi_mm", 0),
37 GATE_IMG(CLK_IMG_CAM_SMI
, "img_cam_smi", "smi_mm", 5),
38 GATE_IMG(CLK_IMG_CAM_CAM
, "img_cam_cam", "smi_mm", 6),
39 GATE_IMG(CLK_IMG_SEN_TG
, "img_sen_tg", "cam_mm", 7),
40 GATE_IMG(CLK_IMG_SEN_CAM
, "img_sen_cam", "smi_mm", 8),
41 GATE_IMG(CLK_IMG_VENC
, "img_venc", "smi_mm", 9),
44 static void __init
mtk_imgsys_init(struct device_node
*node
)
46 struct clk_onecell_data
*clk_data
;
49 clk_data
= mtk_alloc_clk_data(CLK_IMG_NR_CLK
);
51 mtk_clk_register_gates(node
, img_clks
, ARRAY_SIZE(img_clks
), clk_data
);
53 r
= of_clk_add_provider(node
, of_clk_src_onecell_get
, clk_data
);
56 pr_err("%s(): could not register clock provider: %d\n",
60 CLK_OF_DECLARE(mtk_imgsys
, "mediatek,mt8167-imgsys", mtk_imgsys_init
);