1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2013 Emilio López
5 * Emilio López <emilio@elopez.com.ar>
8 #include <linux/clk-provider.h>
11 #include <linux/of_address.h>
12 #include <linux/slab.h>
14 static DEFINE_SPINLOCK(mod1_lock
);
16 #define SUN4I_MOD1_ENABLE 31
17 #define SUN4I_MOD1_MUX 16
18 #define SUN4I_MOD1_MUX_WIDTH 2
19 #define SUN4I_MOD1_MAX_PARENTS 4
21 static void __init
sun4i_mod1_clk_setup(struct device_node
*node
)
25 struct clk_gate
*gate
;
26 const char *parents
[4];
27 const char *clk_name
= node
->name
;
31 reg
= of_io_request_and_map(node
, 0, of_node_full_name(node
));
35 mux
= kzalloc(sizeof(*mux
), GFP_KERNEL
);
39 gate
= kzalloc(sizeof(*gate
), GFP_KERNEL
);
43 of_property_read_string(node
, "clock-output-names", &clk_name
);
44 i
= of_clk_parent_fill(node
, parents
, SUN4I_MOD1_MAX_PARENTS
);
47 gate
->bit_idx
= SUN4I_MOD1_ENABLE
;
48 gate
->lock
= &mod1_lock
;
50 mux
->shift
= SUN4I_MOD1_MUX
;
51 mux
->mask
= BIT(SUN4I_MOD1_MUX_WIDTH
) - 1;
52 mux
->lock
= &mod1_lock
;
54 clk
= clk_register_composite(NULL
, clk_name
, parents
, i
,
55 &mux
->hw
, &clk_mux_ops
,
57 &gate
->hw
, &clk_gate_ops
, CLK_SET_RATE_PARENT
);
61 of_clk_add_provider(node
, of_clk_src_simple_get
, clk
);
72 CLK_OF_DECLARE(sun4i_mod1
, "allwinner,sun4i-a10-mod1-clk",
73 sun4i_mod1_clk_setup
);