1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
4 * Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
7 #include <linux/kernel.h>
9 #include "k3-psil-priv.h"
11 #define PSIL_PDMA_XY_TR(x) \
15 .ep_type = PSIL_EP_PDMA_XY, \
19 #define PSIL_PDMA_XY_PKT(x) \
23 .ep_type = PSIL_EP_PDMA_XY, \
28 #define PSIL_ETHERNET(x) \
32 .ep_type = PSIL_EP_NATIVE, \
39 #define PSIL_SA2UL(x, tx) \
43 .ep_type = PSIL_EP_NATIVE, \
51 /* PSI-L source thread IDs, used for RX (DMA_DEV_TO_MEM) */
52 static struct psil_ep am654_src_ep_map
[] = {
54 PSIL_SA2UL(0x4000, 0),
55 PSIL_SA2UL(0x4001, 0),
56 PSIL_SA2UL(0x4002, 0),
57 PSIL_SA2UL(0x4003, 0),
59 PSIL_ETHERNET(0x4100),
60 PSIL_ETHERNET(0x4101),
61 PSIL_ETHERNET(0x4102),
62 PSIL_ETHERNET(0x4103),
64 PSIL_ETHERNET(0x4200),
65 PSIL_ETHERNET(0x4201),
66 PSIL_ETHERNET(0x4202),
67 PSIL_ETHERNET(0x4203),
69 PSIL_ETHERNET(0x4300),
70 PSIL_ETHERNET(0x4301),
71 PSIL_ETHERNET(0x4302),
72 PSIL_ETHERNET(0x4303),
74 PSIL_PDMA_XY_TR(0x4400),
75 PSIL_PDMA_XY_TR(0x4401),
76 PSIL_PDMA_XY_TR(0x4402),
78 PSIL_PDMA_XY_PKT(0x4500),
79 PSIL_PDMA_XY_PKT(0x4501),
80 PSIL_PDMA_XY_PKT(0x4502),
81 PSIL_PDMA_XY_PKT(0x4503),
82 PSIL_PDMA_XY_PKT(0x4504),
83 PSIL_PDMA_XY_PKT(0x4505),
84 PSIL_PDMA_XY_PKT(0x4506),
85 PSIL_PDMA_XY_PKT(0x4507),
86 PSIL_PDMA_XY_PKT(0x4508),
87 PSIL_PDMA_XY_PKT(0x4509),
88 PSIL_PDMA_XY_PKT(0x450a),
89 PSIL_PDMA_XY_PKT(0x450b),
90 PSIL_PDMA_XY_PKT(0x450c),
91 PSIL_PDMA_XY_PKT(0x450d),
92 PSIL_PDMA_XY_PKT(0x450e),
93 PSIL_PDMA_XY_PKT(0x450f),
94 PSIL_PDMA_XY_PKT(0x4510),
95 PSIL_PDMA_XY_PKT(0x4511),
96 PSIL_PDMA_XY_PKT(0x4512),
97 PSIL_PDMA_XY_PKT(0x4513),
98 /* PDMA1 - USART0-2 */
99 PSIL_PDMA_XY_PKT(0x4514),
100 PSIL_PDMA_XY_PKT(0x4515),
101 PSIL_PDMA_XY_PKT(0x4516),
103 PSIL_ETHERNET(0x7000),
104 /* MCU_PDMA0 - ADCs */
105 PSIL_PDMA_XY_TR(0x7100),
106 PSIL_PDMA_XY_TR(0x7101),
107 PSIL_PDMA_XY_TR(0x7102),
108 PSIL_PDMA_XY_TR(0x7103),
109 /* MCU_PDMA1 - MCU_SPI0-2 */
110 PSIL_PDMA_XY_PKT(0x7200),
111 PSIL_PDMA_XY_PKT(0x7201),
112 PSIL_PDMA_XY_PKT(0x7202),
113 PSIL_PDMA_XY_PKT(0x7203),
114 PSIL_PDMA_XY_PKT(0x7204),
115 PSIL_PDMA_XY_PKT(0x7205),
116 PSIL_PDMA_XY_PKT(0x7206),
117 PSIL_PDMA_XY_PKT(0x7207),
118 PSIL_PDMA_XY_PKT(0x7208),
119 PSIL_PDMA_XY_PKT(0x7209),
120 PSIL_PDMA_XY_PKT(0x720a),
121 PSIL_PDMA_XY_PKT(0x720b),
122 /* MCU_PDMA1 - MCU_USART0 */
123 PSIL_PDMA_XY_PKT(0x7212),
126 /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */
127 static struct psil_ep am654_dst_ep_map
[] = {
129 PSIL_SA2UL(0xc000, 1),
130 PSIL_SA2UL(0xc001, 1),
132 PSIL_ETHERNET(0xc100),
133 PSIL_ETHERNET(0xc101),
134 PSIL_ETHERNET(0xc102),
135 PSIL_ETHERNET(0xc103),
136 PSIL_ETHERNET(0xc104),
137 PSIL_ETHERNET(0xc105),
138 PSIL_ETHERNET(0xc106),
139 PSIL_ETHERNET(0xc107),
141 PSIL_ETHERNET(0xc200),
142 PSIL_ETHERNET(0xc201),
143 PSIL_ETHERNET(0xc202),
144 PSIL_ETHERNET(0xc203),
145 PSIL_ETHERNET(0xc204),
146 PSIL_ETHERNET(0xc205),
147 PSIL_ETHERNET(0xc206),
148 PSIL_ETHERNET(0xc207),
150 PSIL_ETHERNET(0xc300),
151 PSIL_ETHERNET(0xc301),
152 PSIL_ETHERNET(0xc302),
153 PSIL_ETHERNET(0xc303),
154 PSIL_ETHERNET(0xc304),
155 PSIL_ETHERNET(0xc305),
156 PSIL_ETHERNET(0xc306),
157 PSIL_ETHERNET(0xc307),
159 PSIL_ETHERNET(0xf000),
160 PSIL_ETHERNET(0xf001),
161 PSIL_ETHERNET(0xf002),
162 PSIL_ETHERNET(0xf003),
163 PSIL_ETHERNET(0xf004),
164 PSIL_ETHERNET(0xf005),
165 PSIL_ETHERNET(0xf006),
166 PSIL_ETHERNET(0xf007),
169 struct psil_ep_map am654_ep_map
= {
171 .src
= am654_src_ep_map
,
172 .src_count
= ARRAY_SIZE(am654_src_ep_map
),
173 .dst
= am654_dst_ep_map
,
174 .dst_count
= ARRAY_SIZE(am654_dst_ep_map
),