1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for pcf857x, pca857x, and pca967x I2C GPIO expanders
5 * Copyright (C) 2007 David Brownell
8 #include <linux/gpio/driver.h>
10 #include <linux/platform_data/pcf857x.h>
11 #include <linux/interrupt.h>
12 #include <linux/irq.h>
13 #include <linux/irqdomain.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
17 #include <linux/of_device.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
22 static const struct i2c_device_id pcf857x_id
[] = {
38 MODULE_DEVICE_TABLE(i2c
, pcf857x_id
);
41 static const struct of_device_id pcf857x_of_table
[] = {
42 { .compatible
= "nxp,pcf8574" },
43 { .compatible
= "nxp,pcf8574a" },
44 { .compatible
= "nxp,pca8574" },
45 { .compatible
= "nxp,pca9670" },
46 { .compatible
= "nxp,pca9672" },
47 { .compatible
= "nxp,pca9674" },
48 { .compatible
= "nxp,pcf8575" },
49 { .compatible
= "nxp,pca8575" },
50 { .compatible
= "nxp,pca9671" },
51 { .compatible
= "nxp,pca9673" },
52 { .compatible
= "nxp,pca9675" },
53 { .compatible
= "maxim,max7328" },
54 { .compatible
= "maxim,max7329" },
57 MODULE_DEVICE_TABLE(of
, pcf857x_of_table
);
61 * The pcf857x, pca857x, and pca967x chips only expose one read and one
62 * write register. Writing a "one" bit (to match the reset state) lets
63 * that pin be used as an input; it's not an open-drain model, but acts
64 * a bit like one. This is described as "quasi-bidirectional"; read the
65 * chip documentation for details.
67 * Many other I2C GPIO expander chips (like the pca953x models) have
68 * more complex register models and more conventional circuitry using
69 * push/pull drivers. They often use the same 0x20..0x27 addresses as
70 * pcf857x parts, making the "legacy" I2C driver model problematic.
73 struct gpio_chip chip
;
74 struct irq_chip irqchip
;
75 struct i2c_client
*client
;
76 struct mutex lock
; /* protect 'out' */
77 unsigned out
; /* software latch */
78 unsigned status
; /* current status */
79 unsigned irq_enabled
; /* enabled irqs */
81 int (*write
)(struct i2c_client
*client
, unsigned data
);
82 int (*read
)(struct i2c_client
*client
);
85 /*-------------------------------------------------------------------------*/
87 /* Talk to 8-bit I/O expander */
89 static int i2c_write_le8(struct i2c_client
*client
, unsigned data
)
91 return i2c_smbus_write_byte(client
, data
);
94 static int i2c_read_le8(struct i2c_client
*client
)
96 return (int)i2c_smbus_read_byte(client
);
99 /* Talk to 16-bit I/O expander */
101 static int i2c_write_le16(struct i2c_client
*client
, unsigned word
)
103 u8 buf
[2] = { word
& 0xff, word
>> 8, };
106 status
= i2c_master_send(client
, buf
, 2);
107 return (status
< 0) ? status
: 0;
110 static int i2c_read_le16(struct i2c_client
*client
)
115 status
= i2c_master_recv(client
, buf
, 2);
118 return (buf
[1] << 8) | buf
[0];
121 /*-------------------------------------------------------------------------*/
123 static int pcf857x_input(struct gpio_chip
*chip
, unsigned offset
)
125 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
128 mutex_lock(&gpio
->lock
);
129 gpio
->out
|= (1 << offset
);
130 status
= gpio
->write(gpio
->client
, gpio
->out
);
131 mutex_unlock(&gpio
->lock
);
136 static int pcf857x_get(struct gpio_chip
*chip
, unsigned offset
)
138 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
141 value
= gpio
->read(gpio
->client
);
142 return (value
< 0) ? value
: !!(value
& (1 << offset
));
145 static int pcf857x_output(struct gpio_chip
*chip
, unsigned offset
, int value
)
147 struct pcf857x
*gpio
= gpiochip_get_data(chip
);
148 unsigned bit
= 1 << offset
;
151 mutex_lock(&gpio
->lock
);
156 status
= gpio
->write(gpio
->client
, gpio
->out
);
157 mutex_unlock(&gpio
->lock
);
162 static void pcf857x_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
164 pcf857x_output(chip
, offset
, value
);
167 /*-------------------------------------------------------------------------*/
169 static irqreturn_t
pcf857x_irq(int irq
, void *data
)
171 struct pcf857x
*gpio
= data
;
172 unsigned long change
, i
, status
;
174 status
= gpio
->read(gpio
->client
);
177 * call the interrupt handler iff gpio is used as
178 * interrupt source, just to avoid bad irqs
180 mutex_lock(&gpio
->lock
);
181 change
= (gpio
->status
^ status
) & gpio
->irq_enabled
;
182 gpio
->status
= status
;
183 mutex_unlock(&gpio
->lock
);
185 for_each_set_bit(i
, &change
, gpio
->chip
.ngpio
)
186 handle_nested_irq(irq_find_mapping(gpio
->chip
.irq
.domain
, i
));
194 static void noop(struct irq_data
*data
) { }
196 static int pcf857x_irq_set_wake(struct irq_data
*data
, unsigned int on
)
198 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
200 return irq_set_irq_wake(gpio
->client
->irq
, on
);
203 static void pcf857x_irq_enable(struct irq_data
*data
)
205 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
207 gpio
->irq_enabled
|= (1 << data
->hwirq
);
210 static void pcf857x_irq_disable(struct irq_data
*data
)
212 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
214 gpio
->irq_enabled
&= ~(1 << data
->hwirq
);
217 static void pcf857x_irq_bus_lock(struct irq_data
*data
)
219 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
221 mutex_lock(&gpio
->lock
);
224 static void pcf857x_irq_bus_sync_unlock(struct irq_data
*data
)
226 struct pcf857x
*gpio
= irq_data_get_irq_chip_data(data
);
228 mutex_unlock(&gpio
->lock
);
231 /*-------------------------------------------------------------------------*/
233 static int pcf857x_probe(struct i2c_client
*client
,
234 const struct i2c_device_id
*id
)
236 struct pcf857x_platform_data
*pdata
= dev_get_platdata(&client
->dev
);
237 struct device_node
*np
= client
->dev
.of_node
;
238 struct pcf857x
*gpio
;
239 unsigned int n_latch
= 0;
242 if (IS_ENABLED(CONFIG_OF
) && np
)
243 of_property_read_u32(np
, "lines-initial-states", &n_latch
);
245 n_latch
= pdata
->n_latch
;
247 dev_dbg(&client
->dev
, "no platform data\n");
249 /* Allocate, initialize, and register this gpio_chip. */
250 gpio
= devm_kzalloc(&client
->dev
, sizeof(*gpio
), GFP_KERNEL
);
254 mutex_init(&gpio
->lock
);
256 gpio
->chip
.base
= pdata
? pdata
->gpio_base
: -1;
257 gpio
->chip
.can_sleep
= true;
258 gpio
->chip
.parent
= &client
->dev
;
259 gpio
->chip
.owner
= THIS_MODULE
;
260 gpio
->chip
.get
= pcf857x_get
;
261 gpio
->chip
.set
= pcf857x_set
;
262 gpio
->chip
.direction_input
= pcf857x_input
;
263 gpio
->chip
.direction_output
= pcf857x_output
;
264 gpio
->chip
.ngpio
= id
->driver_data
;
266 /* NOTE: the OnSemi jlc1562b is also largely compatible with
267 * these parts, notably for output. It has a low-resolution
268 * DAC instead of pin change IRQs; and its inputs can be the
269 * result of comparators.
272 /* 8574 addresses are 0x20..0x27; 8574a uses 0x38..0x3f;
273 * 9670, 9672, 9764, and 9764a use quite a variety.
275 * NOTE: we don't distinguish here between *4 and *4a parts.
277 if (gpio
->chip
.ngpio
== 8) {
278 gpio
->write
= i2c_write_le8
;
279 gpio
->read
= i2c_read_le8
;
281 if (!i2c_check_functionality(client
->adapter
,
282 I2C_FUNC_SMBUS_BYTE
))
285 /* fail if there's no chip present */
287 status
= i2c_smbus_read_byte(client
);
289 /* '75/'75c addresses are 0x20..0x27, just like the '74;
290 * the '75c doesn't have a current source pulling high.
291 * 9671, 9673, and 9765 use quite a variety of addresses.
293 * NOTE: we don't distinguish here between '75 and '75c parts.
295 } else if (gpio
->chip
.ngpio
== 16) {
296 gpio
->write
= i2c_write_le16
;
297 gpio
->read
= i2c_read_le16
;
299 if (!i2c_check_functionality(client
->adapter
, I2C_FUNC_I2C
))
302 /* fail if there's no chip present */
304 status
= i2c_read_le16(client
);
307 dev_dbg(&client
->dev
, "unsupported number of gpios\n");
314 gpio
->chip
.label
= client
->name
;
316 gpio
->client
= client
;
317 i2c_set_clientdata(client
, gpio
);
319 /* NOTE: these chips have strange "quasi-bidirectional" I/O pins.
320 * We can't actually know whether a pin is configured (a) as output
321 * and driving the signal low, or (b) as input and reporting a low
322 * value ... without knowing the last value written since the chip
323 * came out of reset (if any). We can't read the latched output.
325 * In short, the only reliable solution for setting up pin direction
326 * is to do it explicitly. The setup() method can do that, but it
327 * may cause transient glitching since it can't know the last value
328 * written (some pins may need to be driven low).
330 * Using n_latch avoids that trouble. When left initialized to zero,
331 * our software copy of the "latch" then matches the chip's all-ones
332 * reset state. Otherwise it flags pins to be driven low.
334 gpio
->out
= ~n_latch
;
335 gpio
->status
= gpio
->out
;
337 /* Enable irqchip if we have an interrupt */
339 struct gpio_irq_chip
*girq
;
341 gpio
->irqchip
.name
= "pcf857x";
342 gpio
->irqchip
.irq_enable
= pcf857x_irq_enable
;
343 gpio
->irqchip
.irq_disable
= pcf857x_irq_disable
;
344 gpio
->irqchip
.irq_ack
= noop
;
345 gpio
->irqchip
.irq_mask
= noop
;
346 gpio
->irqchip
.irq_unmask
= noop
;
347 gpio
->irqchip
.irq_set_wake
= pcf857x_irq_set_wake
;
348 gpio
->irqchip
.irq_bus_lock
= pcf857x_irq_bus_lock
;
349 gpio
->irqchip
.irq_bus_sync_unlock
= pcf857x_irq_bus_sync_unlock
;
351 status
= devm_request_threaded_irq(&client
->dev
, client
->irq
,
352 NULL
, pcf857x_irq
, IRQF_ONESHOT
|
353 IRQF_TRIGGER_FALLING
| IRQF_SHARED
,
354 dev_name(&client
->dev
), gpio
);
358 girq
= &gpio
->chip
.irq
;
359 girq
->chip
= &gpio
->irqchip
;
360 /* This will let us handle the parent IRQ in the driver */
361 girq
->parent_handler
= NULL
;
362 girq
->num_parents
= 0;
363 girq
->parents
= NULL
;
364 girq
->default_type
= IRQ_TYPE_NONE
;
365 girq
->handler
= handle_level_irq
;
366 girq
->threaded
= true;
369 status
= devm_gpiochip_add_data(&client
->dev
, &gpio
->chip
, gpio
);
373 /* Let platform code set up the GPIOs and their users.
374 * Now is the first time anyone could use them.
376 if (pdata
&& pdata
->setup
) {
377 status
= pdata
->setup(client
,
378 gpio
->chip
.base
, gpio
->chip
.ngpio
,
381 dev_warn(&client
->dev
, "setup --> %d\n", status
);
384 dev_info(&client
->dev
, "probed\n");
389 dev_dbg(&client
->dev
, "probe error %d for '%s'\n", status
,
395 static int pcf857x_remove(struct i2c_client
*client
)
397 struct pcf857x_platform_data
*pdata
= dev_get_platdata(&client
->dev
);
398 struct pcf857x
*gpio
= i2c_get_clientdata(client
);
401 if (pdata
&& pdata
->teardown
) {
402 status
= pdata
->teardown(client
,
403 gpio
->chip
.base
, gpio
->chip
.ngpio
,
406 dev_err(&client
->dev
, "%s --> %d\n",
415 static void pcf857x_shutdown(struct i2c_client
*client
)
417 struct pcf857x
*gpio
= i2c_get_clientdata(client
);
419 /* Drive all the I/O lines high */
420 gpio
->write(gpio
->client
, BIT(gpio
->chip
.ngpio
) - 1);
423 static struct i2c_driver pcf857x_driver
= {
426 .of_match_table
= of_match_ptr(pcf857x_of_table
),
428 .probe
= pcf857x_probe
,
429 .remove
= pcf857x_remove
,
430 .shutdown
= pcf857x_shutdown
,
431 .id_table
= pcf857x_id
,
434 static int __init
pcf857x_init(void)
436 return i2c_add_driver(&pcf857x_driver
);
438 /* register after i2c postcore initcall and before
439 * subsys initcalls that may rely on these GPIOs
441 subsys_initcall(pcf857x_init
);
443 static void __exit
pcf857x_exit(void)
445 i2c_del_driver(&pcf857x_driver
);
447 module_exit(pcf857x_exit
);
449 MODULE_LICENSE("GPL");
450 MODULE_AUTHOR("David Brownell");