drivers/gpu/drm/gma500/psb_drv.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /**************************************************************************
   3  * Copyright (c) 2007-2011, Intel Corporation.
   4  * All Rights Reserved.
   5  * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
   6  * All Rights Reserved.
   7  *
   8  **************************************************************************/
   9
  10 #include <linux/cpu.h>
  11 #include <linux/module.h>
  12 #include <linux/notifier.h>
  13 #include <linux/pm_runtime.h>
  14 #include <linux/spinlock.h>
  15
  16 #include <asm/set_memory.h>
  17
  18 #include <acpi/video.h>
  19
  20 #include <drm/drm.h>
  21 #include <drm/drm_drv.h>
  22 #include <drm/drm_fb_helper.h>
  23 #include <drm/drm_file.h>
  24 #include <drm/drm_ioctl.h>
  25 #include <drm/drm_irq.h>
  26 #include <drm/drm_pciids.h>
  27 #include <drm/drm_vblank.h>
  28
  29 #include "framebuffer.h"
  30 #include "intel_bios.h"
  31 #include "mid_bios.h"
  32 #include "power.h"
  33 #include "psb_drv.h"
  34 #include "psb_intel_reg.h"
  35 #include "psb_reg.h"
  36
  37 static const struct drm_driver driver;
  38 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  39
  40 /*
  41  * The table below contains a mapping of the PCI vendor ID and the PCI Device ID
  42  * to the different groups of PowerVR 5-series chip designs
  43  *
  44  * 0x8086 = Intel Corporation
  45  *
  46  * PowerVR SGX535    - Poulsbo    - Intel GMA 500, Intel Atom Z5xx
  47  * PowerVR SGX535    - Moorestown - Intel GMA 600
  48  * PowerVR SGX535    - Oaktrail   - Intel GMA 600, Intel Atom Z6xx, E6xx
  49  * PowerVR SGX540    - Medfield   - Intel Atom Z2460
  50  * PowerVR SGX544MP2 - Medfield   -
  51  * PowerVR SGX545    - Cedartrail - Intel GMA 3600, Intel Atom D2500, N2600
  52  * PowerVR SGX545    - Cedartrail - Intel GMA 3650, Intel Atom D2550, D2700,
  53  *                                  N2800
  54  */
  55 static const struct pci_device_id pciidlist[] = {
  56         { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  57         { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
  58 #if defined(CONFIG_DRM_GMA600)
  59         { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  60         { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  61         { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  62         { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  63         { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  64         { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  65         { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  66         { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  67         { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops },
  68 #endif
  69 #if defined(CONFIG_DRM_MEDFIELD)
  70         { 0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  71         { 0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  72         { 0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  73         { 0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  74         { 0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  75         { 0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  76         { 0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  77         { 0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops },
  78 #endif
  79 #if defined(CONFIG_DRM_GMA3600)
  80         { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  81         { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  82         { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  83         { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  84         { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  85         { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  86         { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  87         { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  88         { 0x8086, 0x0be8, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  89         { 0x8086, 0x0be9, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  90         { 0x8086, 0x0bea, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  91         { 0x8086, 0x0beb, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  92         { 0x8086, 0x0bec, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  93         { 0x8086, 0x0bed, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  94         { 0x8086, 0x0bee, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  95         { 0x8086, 0x0bef, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops },
  96 #endif
  97         { 0, }
  98 };
  99 MODULE_DEVICE_TABLE(pci, pciidlist);
 100
 101 /*
 102  * Standard IOCTLs.
 103  */
 104 static const struct drm_ioctl_desc psb_ioctls[] = {
 105 };
 106
 107 static int psb_do_init(struct drm_device *dev)
 108 {
 109         struct drm_psb_private *dev_priv = dev->dev_private;
 110         struct psb_gtt *pg = &dev_priv->gtt;
 111
 112         uint32_t stolen_gtt;
 113
 114         if (pg->mmu_gatt_start & 0x0FFFFFFF) {
 115                 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
 116                 return -EINVAL;
 117         }
 118
 119         stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
 120         stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
 121         stolen_gtt = (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
 122
 123         dev_priv->gatt_free_offset = pg->mmu_gatt_start +
 124             (stolen_gtt << PAGE_SHIFT) * 1024;
 125
 126         spin_lock_init(&dev_priv->irqmask_lock);
 127
 128         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
 129         PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
 130         PSB_RSGX32(PSB_CR_BIF_BANK1);
 131
 132         /* Do not bypass any MMU access, let them pagefault instead */
 133         PSB_WSGX32((PSB_RSGX32(PSB_CR_BIF_CTRL) & ~_PSB_MMU_ER_MASK),
 134                    PSB_CR_BIF_CTRL);
 135         PSB_RSGX32(PSB_CR_BIF_CTRL);
 136
 137         psb_spank(dev_priv);
 138
 139         /* mmu_gatt ?? */
 140         PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
 141         PSB_RSGX32(PSB_CR_BIF_TWOD_REQ_BASE); /* Post */
 142
 143         return 0;
 144 }
 145
 146 static void psb_driver_unload(struct drm_device *dev)
 147 {
 148         struct drm_psb_private *dev_priv = dev->dev_private;
 149
 150         /* TODO: Kill vblank etc here */
 151
 152         if (dev_priv) {
 153                 if (dev_priv->backlight_device)
 154                         gma_backlight_exit(dev);
 155                 psb_modeset_cleanup(dev);
 156
 157                 if (dev_priv->ops->chip_teardown)
 158                         dev_priv->ops->chip_teardown(dev);
 159
 160                 psb_intel_opregion_fini(dev);
 161
 162                 if (dev_priv->pf_pd) {
 163                         psb_mmu_free_pagedir(dev_priv->pf_pd);
 164                         dev_priv->pf_pd = NULL;
 165                 }
 166                 if (dev_priv->mmu) {
 167                         struct psb_gtt *pg = &dev_priv->gtt;
 168
 169                         down_read(&pg->sem);
 170                         psb_mmu_remove_pfn_sequence(
 171                                 psb_mmu_get_default_pd
 172                                 (dev_priv->mmu),
 173                                 pg->mmu_gatt_start,
 174                                 dev_priv->vram_stolen_size >> PAGE_SHIFT);
 175                         up_read(&pg->sem);
 176                         psb_mmu_driver_takedown(dev_priv->mmu);
 177                         dev_priv->mmu = NULL;
 178                 }
 179                 psb_gtt_takedown(dev);
 180                 if (dev_priv->scratch_page) {
 181                         set_pages_wb(dev_priv->scratch_page, 1);
 182                         __free_page(dev_priv->scratch_page);
 183                         dev_priv->scratch_page = NULL;
 184                 }
 185                 if (dev_priv->vdc_reg) {
 186                         iounmap(dev_priv->vdc_reg);
 187                         dev_priv->vdc_reg = NULL;
 188                 }
 189                 if (dev_priv->sgx_reg) {
 190                         iounmap(dev_priv->sgx_reg);
 191                         dev_priv->sgx_reg = NULL;
 192                 }
 193                 if (dev_priv->aux_reg) {
 194                         iounmap(dev_priv->aux_reg);
 195                         dev_priv->aux_reg = NULL;
 196                 }
 197                 pci_dev_put(dev_priv->aux_pdev);
 198                 pci_dev_put(dev_priv->lpc_pdev);
 199
 200                 /* Destroy VBT data */
 201                 psb_intel_destroy_bios(dev);
 202
 203                 kfree(dev_priv);
 204                 dev->dev_private = NULL;
 205         }
 206         gma_power_uninit(dev);
 207 }
 208
 209 static int psb_driver_load(struct drm_device *dev, unsigned long flags)
 210 {
 211         struct drm_psb_private *dev_priv;
 212         unsigned long resource_start, resource_len;
 213         unsigned long irqflags;
 214         int ret = -ENOMEM;
 215         struct drm_connector *connector;
 216         struct gma_encoder *gma_encoder;
 217         struct psb_gtt *pg;
 218
 219         /* allocating and initializing driver private data */
 220         dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
 221         if (dev_priv == NULL)
 222                 return -ENOMEM;
 223
 224         dev_priv->ops = (struct psb_ops *)flags;
 225         dev_priv->dev = dev;
 226         dev->dev_private = (void *) dev_priv;
 227
 228         pg = &dev_priv->gtt;
 229
 230         pci_set_master(dev->pdev);
 231
 232         dev_priv->num_pipe = dev_priv->ops->pipes;
 233
 234         resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
 235
 236         dev_priv->vdc_reg =
 237             ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
 238         if (!dev_priv->vdc_reg)
 239                 goto out_err;
 240
 241         dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
 242                                                         PSB_SGX_SIZE);
 243         if (!dev_priv->sgx_reg)
 244                 goto out_err;
 245
 246         if (IS_MRST(dev)) {
 247                 int domain = pci_domain_nr(dev->pdev->bus);
 248
 249                 dev_priv->aux_pdev =
 250                         pci_get_domain_bus_and_slot(domain, 0,
 251                                                     PCI_DEVFN(3, 0));
 252
 253                 if (dev_priv->aux_pdev) {
 254                         resource_start = pci_resource_start(dev_priv->aux_pdev,
 255                                                             PSB_AUX_RESOURCE);
 256                         resource_len = pci_resource_len(dev_priv->aux_pdev,
 257                                                         PSB_AUX_RESOURCE);
 258                         dev_priv->aux_reg = ioremap(resource_start,
 259                                                             resource_len);
 260                         if (!dev_priv->aux_reg)
 261                                 goto out_err;
 262
 263                         DRM_DEBUG_KMS("Found aux vdc");
 264                 } else {
 265                         /* Couldn't find the aux vdc so map to primary vdc */
 266                         dev_priv->aux_reg = dev_priv->vdc_reg;
 267                         DRM_DEBUG_KMS("Couldn't find aux pci device");
 268                 }
 269                 dev_priv->gmbus_reg = dev_priv->aux_reg;
 270
 271                 dev_priv->lpc_pdev =
 272                         pci_get_domain_bus_and_slot(domain, 0,
 273                                                     PCI_DEVFN(31, 0));
 274                 if (dev_priv->lpc_pdev) {
 275                         pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 276                                 &dev_priv->lpc_gpio_base);
 277                         pci_write_config_dword(dev_priv->lpc_pdev, PSB_LPC_GBA,
 278                                 (u32)dev_priv->lpc_gpio_base | (1L<<31));
 279                         pci_read_config_word(dev_priv->lpc_pdev, PSB_LPC_GBA,
 280                                 &dev_priv->lpc_gpio_base);
 281                         dev_priv->lpc_gpio_base &= 0xffc0;
 282                         if (dev_priv->lpc_gpio_base)
 283                                 DRM_DEBUG_KMS("Found LPC GPIO at 0x%04x\n",
 284                                                 dev_priv->lpc_gpio_base);
 285                         else {
 286                                 pci_dev_put(dev_priv->lpc_pdev);
 287                                 dev_priv->lpc_pdev = NULL;
 288                         }
 289                 }
 290         } else {
 291                 dev_priv->gmbus_reg = dev_priv->vdc_reg;
 292         }
 293
 294         psb_intel_opregion_setup(dev);
 295
 296         ret = dev_priv->ops->chip_setup(dev);
 297         if (ret)
 298                 goto out_err;
 299
 300         /* Init OSPM support */
 301         gma_power_init(dev);
 302
 303         ret = -ENOMEM;
 304
 305         dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
 306         if (!dev_priv->scratch_page)
 307                 goto out_err;
 308
 309         set_pages_uc(dev_priv->scratch_page, 1);
 310
 311         ret = psb_gtt_init(dev, 0);
 312         if (ret)
 313                 goto out_err;
 314
 315         dev_priv->mmu = psb_mmu_driver_init(dev, 1, 0, 0);
 316         if (!dev_priv->mmu)
 317                 goto out_err;
 318
 319         dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
 320         if (!dev_priv->pf_pd)
 321                 goto out_err;
 322
 323         ret = psb_do_init(dev);
 324         if (ret)
 325                 return ret;
 326
 327         /* Add stolen memory to SGX MMU */
 328         down_read(&pg->sem);
 329         ret = psb_mmu_insert_pfn_sequence(psb_mmu_get_default_pd(dev_priv->mmu),
 330                                           dev_priv->stolen_base >> PAGE_SHIFT,
 331                                           pg->gatt_start,
 332                                           pg->stolen_size >> PAGE_SHIFT, 0);
 333         up_read(&pg->sem);
 334
 335         psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
 336         psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
 337
 338         PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
 339         PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
 340
 341         acpi_video_register();
 342
 343         /* Setup vertical blanking handling */
 344         ret = drm_vblank_init(dev, dev_priv->num_pipe);
 345         if (ret)
 346                 goto out_err;
 347
 348         /*
 349          * Install interrupt handlers prior to powering off SGX or else we will
 350          * crash.
 351          */
 352         dev_priv->vdc_irq_mask = 0;
 353         dev_priv->pipestat[0] = 0;
 354         dev_priv->pipestat[1] = 0;
 355         dev_priv->pipestat[2] = 0;
 356         spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
 357         PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
 358         PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
 359         PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
 360         spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
 361
 362         drm_irq_install(dev, dev->pdev->irq);
 363
 364         dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
 365
 366         psb_modeset_init(dev);
 367         psb_fbdev_init(dev);
 368         drm_kms_helper_poll_init(dev);
 369
 370         /* Only add backlight support if we have LVDS output */
 371         list_for_each_entry(connector, &dev->mode_config.connector_list,
 372                             head) {
 373                 gma_encoder = gma_attached_encoder(connector);
 374
 375                 switch (gma_encoder->type) {
 376                 case INTEL_OUTPUT_LVDS:
 377                 case INTEL_OUTPUT_MIPI:
 378                         ret = gma_backlight_init(dev);
 379                         break;
 380                 }
 381         }
 382
 383         if (ret)
 384                 return ret;
 385         psb_intel_opregion_enable_asle(dev);
 386 #if 0
 387         /* Enable runtime pm at last */
 388         pm_runtime_enable(&dev->pdev->dev);
 389         pm_runtime_set_active(&dev->pdev->dev);
 390 #endif
 391         /* Intel drm driver load is done, continue doing pvr load */
 392         return 0;
 393 out_err:
 394         psb_driver_unload(dev);
 395         return ret;
 396 }
 397
 398 static inline void get_brightness(struct backlight_device *bd)
 399 {
 400 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
 401         if (bd) {
 402                 bd->props.brightness = bd->ops->get_brightness(bd);
 403                 backlight_update_status(bd);
 404         }
 405 #endif
 406 }
 407
 408 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
 409                                unsigned long arg)
 410 {
 411         struct drm_file *file_priv = filp->private_data;
 412         struct drm_device *dev = file_priv->minor->dev;
 413         struct drm_psb_private *dev_priv = dev->dev_private;
 414         static unsigned int runtime_allowed;
 415
 416         if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
 417                 runtime_allowed++;
 418                 pm_runtime_allow(&dev->pdev->dev);
 419                 dev_priv->rpm_enabled = 1;
 420         }
 421         return drm_ioctl(filp, cmd, arg);
 422         /* FIXME: do we need to wrap the other side of this */
 423 }
 424
 425 static int psb_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 426 {
 427         struct drm_device *dev;
 428         int ret;
 429
 430         ret = pci_enable_device(pdev);
 431         if (ret)
 432                 return ret;
 433
 434         dev = drm_dev_alloc(&driver, &pdev->dev);
 435         if (IS_ERR(dev)) {
 436                 ret = PTR_ERR(dev);
 437                 goto err_pci_disable_device;
 438         }
 439
 440         dev->pdev = pdev;
 441         pci_set_drvdata(pdev, dev);
 442
 443         ret = psb_driver_load(dev, ent->driver_data);
 444         if (ret)
 445                 goto err_drm_dev_put;
 446
 447         ret = drm_dev_register(dev, ent->driver_data);
 448         if (ret)
 449                 goto err_psb_driver_unload;
 450
 451         return 0;
 452
 453 err_psb_driver_unload:
 454         psb_driver_unload(dev);
 455 err_drm_dev_put:
 456         drm_dev_put(dev);
 457 err_pci_disable_device:
 458         pci_disable_device(pdev);
 459         return ret;
 460 }
 461
 462 static void psb_pci_remove(struct pci_dev *pdev)
 463 {
 464         struct drm_device *dev = pci_get_drvdata(pdev);
 465
 466         drm_dev_unregister(dev);
 467         psb_driver_unload(dev);
 468         drm_dev_put(dev);
 469 }
 470
 471 static const struct dev_pm_ops psb_pm_ops = {
 472         .resume = gma_power_resume,
 473         .suspend = gma_power_suspend,
 474         .thaw = gma_power_thaw,
 475         .freeze = gma_power_freeze,
 476         .restore = gma_power_restore,
 477         .runtime_suspend = psb_runtime_suspend,
 478         .runtime_resume = psb_runtime_resume,
 479         .runtime_idle = psb_runtime_idle,
 480 };
 481
 482 static const struct file_operations psb_gem_fops = {
 483         .owner = THIS_MODULE,
 484         .open = drm_open,
 485         .release = drm_release,
 486         .unlocked_ioctl = psb_unlocked_ioctl,
 487         .compat_ioctl = drm_compat_ioctl,
 488         .mmap = drm_gem_mmap,
 489         .poll = drm_poll,
 490         .read = drm_read,
 491 };
 492
 493 static const struct drm_driver driver = {
 494         .driver_features = DRIVER_MODESET | DRIVER_GEM,
 495         .lastclose = drm_fb_helper_lastclose,
 496
 497         .num_ioctls = ARRAY_SIZE(psb_ioctls),
 498         .irq_preinstall = psb_irq_preinstall,
 499         .irq_postinstall = psb_irq_postinstall,
 500         .irq_uninstall = psb_irq_uninstall,
 501         .irq_handler = psb_irq_handler,
 502
 503         .dumb_create = psb_gem_dumb_create,
 504         .ioctls = psb_ioctls,
 505         .fops = &psb_gem_fops,
 506         .name = DRIVER_NAME,
 507         .desc = DRIVER_DESC,
 508         .date = DRIVER_DATE,
 509         .major = DRIVER_MAJOR,
 510         .minor = DRIVER_MINOR,
 511         .patchlevel = DRIVER_PATCHLEVEL
 512 };
 513
 514 static struct pci_driver psb_pci_driver = {
 515         .name = DRIVER_NAME,
 516         .id_table = pciidlist,
 517         .probe = psb_pci_probe,
 518         .remove = psb_pci_remove,
 519         .driver.pm = &psb_pm_ops,
 520 };
 521
 522 static int __init psb_init(void)
 523 {
 524         return pci_register_driver(&psb_pci_driver);
 525 }
 526
 527 static void __exit psb_exit(void)
 528 {
 529         pci_unregister_driver(&psb_pci_driver);
 530 }
 531
 532 late_initcall(psb_init);
 533 module_exit(psb_exit);
 534
 535 MODULE_AUTHOR(DRIVER_AUTHOR);
 536 MODULE_DESCRIPTION(DRIVER_DESC);
 537 MODULE_LICENSE("GPL");