1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 Linus Walleij <linus.walleij@linaro.org>
4 * Parts of this file were based on the MCDE driver by Marcus Lorentzon
5 * (C) ST-Ericsson SA 2013
9 * DOC: ST-Ericsson MCDE Driver
11 * The MCDE (short for multi-channel display engine) is a graphics
12 * controller found in the Ux500 chipsets, such as NovaThor U8500.
13 * It was initially conceptualized by ST Microelectronics for the
14 * successor of the Nomadik line, STn8500 but productified in the
15 * ST-Ericsson U8500 where is was used for mass-market deployments
16 * in Android phones from Samsung and Sony Ericsson.
18 * It can do 1080p30 on SDTV CCIR656, DPI-2, DBI-2 or DSI for
19 * panels with or without frame buffering and can convert most
20 * input formats including most variants of RGB and YUV.
22 * The hardware has four display pipes, and the layout is a little
25 * Memory -> Overlay -> Channel -> FIFO -> 8 formatters -> DSI/DPI
26 * External 0..5 0..3 A,B, 6 x DSI bridge
27 * source 0..9 C0,C1 2 x DPI
29 * FIFOs A and B are for LCD and HDMI while FIFO CO/C1 are for
30 * panels with embedded buffer.
31 * 6 of the formatters are for DSI, 3 pairs for VID/CMD respectively.
32 * 2 of the formatters are for DPI.
34 * Behind the formatters are the DSI or DPI ports that route to
35 * the external pins of the chip. As there are 3 DSI ports and one
36 * DPI port, it is possible to configure up to 4 display pipelines
37 * (effectively using channels 0..3) for concurrent use.
39 * In the current DRM/KMS setup, we use one external source, one overlay,
40 * one FIFO and one formatter which we connect to the simple CMA framebuffer
41 * helpers. We then provide a bridge to the DSI port, and on the DSI port
42 * bridge we connect hang a panel bridge or other bridge. This may be subject
43 * to change as we exploit more of the hardware capabilities.
47 * - Enabled damaged rectangles using drm_plane_enable_fb_damage_clips()
48 * so we can selectively just transmit the damaged area to a
49 * command-only display.
50 * - Enable mixing of more planes, possibly at the cost of moving away
51 * from using the simple framebuffer pipeline.
52 * - Enable output to bridges such as the AV8100 HDMI encoder from
56 #include <linux/clk.h>
57 #include <linux/component.h>
58 #include <linux/dma-buf.h>
59 #include <linux/irq.h>
61 #include <linux/module.h>
62 #include <linux/of_platform.h>
63 #include <linux/platform_device.h>
64 #include <linux/regulator/consumer.h>
65 #include <linux/slab.h>
66 #include <linux/delay.h>
68 #include <drm/drm_atomic_helper.h>
69 #include <drm/drm_bridge.h>
70 #include <drm/drm_drv.h>
71 #include <drm/drm_fb_cma_helper.h>
72 #include <drm/drm_fb_helper.h>
73 #include <drm/drm_gem.h>
74 #include <drm/drm_gem_cma_helper.h>
75 #include <drm/drm_gem_framebuffer_helper.h>
76 #include <drm/drm_managed.h>
77 #include <drm/drm_of.h>
78 #include <drm/drm_probe_helper.h>
79 #include <drm/drm_panel.h>
80 #include <drm/drm_vblank.h>
84 #define DRIVER_DESC "DRM module for MCDE"
86 #define MCDE_PID 0x000001FC
87 #define MCDE_PID_METALFIX_VERSION_SHIFT 0
88 #define MCDE_PID_METALFIX_VERSION_MASK 0x000000FF
89 #define MCDE_PID_DEVELOPMENT_VERSION_SHIFT 8
90 #define MCDE_PID_DEVELOPMENT_VERSION_MASK 0x0000FF00
91 #define MCDE_PID_MINOR_VERSION_SHIFT 16
92 #define MCDE_PID_MINOR_VERSION_MASK 0x00FF0000
93 #define MCDE_PID_MAJOR_VERSION_SHIFT 24
94 #define MCDE_PID_MAJOR_VERSION_MASK 0xFF000000
96 static const struct drm_mode_config_funcs mcde_mode_config_funcs
= {
97 .fb_create
= drm_gem_fb_create_with_dirty
,
98 .atomic_check
= drm_atomic_helper_check
,
99 .atomic_commit
= drm_atomic_helper_commit
,
102 static const struct drm_mode_config_helper_funcs mcde_mode_config_helpers
= {
104 * Using this function is necessary to commit atomic updates
105 * that need the CRTC to be enabled before a commit, as is
106 * the case with e.g. DSI displays.
108 .atomic_commit_tail
= drm_atomic_helper_commit_tail_rpm
,
111 static irqreturn_t
mcde_irq(int irq
, void *data
)
113 struct mcde
*mcde
= data
;
116 val
= readl(mcde
->regs
+ MCDE_MISERR
);
118 mcde_display_irq(mcde
);
121 dev_info(mcde
->dev
, "some error IRQ\n");
122 writel(val
, mcde
->regs
+ MCDE_RISERR
);
127 static int mcde_modeset_init(struct drm_device
*drm
)
129 struct drm_mode_config
*mode_config
;
130 struct mcde
*mcde
= to_mcde(drm
);
134 * If no other bridge was found, check if we have a DPI panel or
135 * any other bridge connected directly to the MCDE DPI output.
136 * If a DSI bridge is found, DSI will take precedence.
138 * TODO: more elaborate bridge selection if we have more than one
139 * thing attached to the system.
142 struct drm_panel
*panel
;
143 struct drm_bridge
*bridge
;
145 ret
= drm_of_find_panel_or_bridge(drm
->dev
->of_node
,
146 0, 0, &panel
, &bridge
);
149 "Could not locate any output bridge or panel\n");
153 bridge
= drm_panel_bridge_add_typed(panel
,
154 DRM_MODE_CONNECTOR_DPI
);
155 if (IS_ERR(bridge
)) {
157 "Could not connect panel bridge\n");
158 return PTR_ERR(bridge
);
161 mcde
->dpi_output
= true;
162 mcde
->bridge
= bridge
;
163 mcde
->flow_mode
= MCDE_DPI_FORMATTER_FLOW
;
166 mode_config
= &drm
->mode_config
;
167 mode_config
->funcs
= &mcde_mode_config_funcs
;
168 mode_config
->helper_private
= &mcde_mode_config_helpers
;
169 /* This hardware can do 1080p */
170 mode_config
->min_width
= 1;
171 mode_config
->max_width
= 1920;
172 mode_config
->min_height
= 1;
173 mode_config
->max_height
= 1080;
175 ret
= drm_vblank_init(drm
, 1);
177 dev_err(drm
->dev
, "failed to init vblank\n");
181 ret
= mcde_display_init(drm
);
183 dev_err(drm
->dev
, "failed to init display\n");
187 /* Attach the bridge. */
188 ret
= drm_simple_display_pipe_attach_bridge(&mcde
->pipe
,
191 dev_err(drm
->dev
, "failed to attach display output bridge\n");
195 drm_mode_config_reset(drm
);
196 drm_kms_helper_poll_init(drm
);
201 DEFINE_DRM_GEM_CMA_FOPS(drm_fops
);
203 static const struct drm_driver mcde_drm_driver
= {
205 DRIVER_MODESET
| DRIVER_GEM
| DRIVER_ATOMIC
,
206 .lastclose
= drm_fb_helper_lastclose
,
215 DRM_GEM_CMA_DRIVER_OPS
,
218 static int mcde_drm_bind(struct device
*dev
)
220 struct drm_device
*drm
= dev_get_drvdata(dev
);
223 ret
= drmm_mode_config_init(drm
);
227 ret
= component_bind_all(drm
->dev
, drm
);
229 dev_err(dev
, "can't bind component devices\n");
233 ret
= mcde_modeset_init(drm
);
237 ret
= drm_dev_register(drm
, 0);
241 drm_fbdev_generic_setup(drm
, 32);
246 component_unbind_all(drm
->dev
, drm
);
250 static void mcde_drm_unbind(struct device
*dev
)
252 struct drm_device
*drm
= dev_get_drvdata(dev
);
254 drm_dev_unregister(drm
);
255 drm_atomic_helper_shutdown(drm
);
256 component_unbind_all(drm
->dev
, drm
);
259 static const struct component_master_ops mcde_drm_comp_ops
= {
260 .bind
= mcde_drm_bind
,
261 .unbind
= mcde_drm_unbind
,
264 static struct platform_driver
*const mcde_component_drivers
[] = {
268 static int mcde_compare_dev(struct device
*dev
, void *data
)
273 static int mcde_probe(struct platform_device
*pdev
)
275 struct device
*dev
= &pdev
->dev
;
276 struct drm_device
*drm
;
278 struct component_match
*match
= NULL
;
279 struct resource
*res
;
285 mcde
= devm_drm_dev_alloc(dev
, &mcde_drm_driver
, struct mcde
, drm
);
287 return PTR_ERR(mcde
);
290 platform_set_drvdata(pdev
, drm
);
292 /* First obtain and turn on the main power */
293 mcde
->epod
= devm_regulator_get(dev
, "epod");
294 if (IS_ERR(mcde
->epod
)) {
295 ret
= PTR_ERR(mcde
->epod
);
296 dev_err(dev
, "can't get EPOD regulator\n");
299 ret
= regulator_enable(mcde
->epod
);
301 dev_err(dev
, "can't enable EPOD regulator\n");
304 mcde
->vana
= devm_regulator_get(dev
, "vana");
305 if (IS_ERR(mcde
->vana
)) {
306 ret
= PTR_ERR(mcde
->vana
);
307 dev_err(dev
, "can't get VANA regulator\n");
308 goto regulator_epod_off
;
310 ret
= regulator_enable(mcde
->vana
);
312 dev_err(dev
, "can't enable VANA regulator\n");
313 goto regulator_epod_off
;
316 * The vendor code uses ESRAM (onchip RAM) and need to activate
317 * the v-esram34 regulator, but we don't use that yet
320 /* Clock the silicon so we can access the registers */
321 mcde
->mcde_clk
= devm_clk_get(dev
, "mcde");
322 if (IS_ERR(mcde
->mcde_clk
)) {
323 dev_err(dev
, "unable to get MCDE main clock\n");
324 ret
= PTR_ERR(mcde
->mcde_clk
);
327 ret
= clk_prepare_enable(mcde
->mcde_clk
);
329 dev_err(dev
, "failed to enable MCDE main clock\n");
332 dev_info(dev
, "MCDE clk rate %lu Hz\n", clk_get_rate(mcde
->mcde_clk
));
334 mcde
->lcd_clk
= devm_clk_get(dev
, "lcd");
335 if (IS_ERR(mcde
->lcd_clk
)) {
336 dev_err(dev
, "unable to get LCD clock\n");
337 ret
= PTR_ERR(mcde
->lcd_clk
);
340 mcde
->hdmi_clk
= devm_clk_get(dev
, "hdmi");
341 if (IS_ERR(mcde
->hdmi_clk
)) {
342 dev_err(dev
, "unable to get HDMI clock\n");
343 ret
= PTR_ERR(mcde
->hdmi_clk
);
347 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
348 mcde
->regs
= devm_ioremap_resource(dev
, res
);
349 if (IS_ERR(mcde
->regs
)) {
350 dev_err(dev
, "no MCDE regs\n");
355 irq
= platform_get_irq(pdev
, 0);
361 ret
= devm_request_irq(dev
, irq
, mcde_irq
, 0, "mcde", mcde
);
363 dev_err(dev
, "failed to request irq %d\n", ret
);
368 * Check hardware revision, we only support U8500v2 version
369 * as this was the only version used for mass market deployment,
370 * but surely you can add more versions if you have them and
373 pid
= readl(mcde
->regs
+ MCDE_PID
);
374 dev_info(dev
, "found MCDE HW revision %d.%d (dev %d, metal fix %d)\n",
375 (pid
& MCDE_PID_MAJOR_VERSION_MASK
)
376 >> MCDE_PID_MAJOR_VERSION_SHIFT
,
377 (pid
& MCDE_PID_MINOR_VERSION_MASK
)
378 >> MCDE_PID_MINOR_VERSION_SHIFT
,
379 (pid
& MCDE_PID_DEVELOPMENT_VERSION_MASK
)
380 >> MCDE_PID_DEVELOPMENT_VERSION_SHIFT
,
381 (pid
& MCDE_PID_METALFIX_VERSION_MASK
)
382 >> MCDE_PID_METALFIX_VERSION_SHIFT
);
383 if (pid
!= 0x03000800) {
384 dev_err(dev
, "unsupported hardware revision\n");
389 /* Disable and clear any pending interrupts */
390 mcde_display_disable_irqs(mcde
);
391 writel(0, mcde
->regs
+ MCDE_IMSCERR
);
392 writel(0xFFFFFFFF, mcde
->regs
+ MCDE_RISERR
);
394 /* Spawn child devices for the DSI ports */
395 devm_of_platform_populate(dev
);
397 /* Create something that will match the subdrivers when we bind */
398 for (i
= 0; i
< ARRAY_SIZE(mcde_component_drivers
); i
++) {
399 struct device_driver
*drv
= &mcde_component_drivers
[i
]->driver
;
400 struct device
*p
= NULL
, *d
;
402 while ((d
= platform_find_device_by_driver(p
, drv
))) {
404 component_match_add(dev
, &match
, mcde_compare_dev
, d
);
410 dev_err(dev
, "no matching components\n");
415 dev_err(dev
, "could not create component match\n");
416 ret
= PTR_ERR(match
);
421 * Perform an invasive reset of the MCDE and all blocks by
422 * cutting the power to the subsystem, then bring it back up
423 * later when we enable the display as a result of
424 * component_master_add_with_match().
426 ret
= regulator_disable(mcde
->epod
);
428 dev_err(dev
, "can't disable EPOD regulator\n");
431 /* Wait 50 ms so we are sure we cut the power */
432 usleep_range(50000, 70000);
434 ret
= component_master_add_with_match(&pdev
->dev
, &mcde_drm_comp_ops
,
437 dev_err(dev
, "failed to add component master\n");
439 * The EPOD regulator is already disabled at this point so some
440 * special errorpath code is needed
442 clk_disable_unprepare(mcde
->mcde_clk
);
443 regulator_disable(mcde
->vana
);
450 clk_disable_unprepare(mcde
->mcde_clk
);
452 regulator_disable(mcde
->vana
);
454 regulator_disable(mcde
->epod
);
459 static int mcde_remove(struct platform_device
*pdev
)
461 struct drm_device
*drm
= platform_get_drvdata(pdev
);
462 struct mcde
*mcde
= to_mcde(drm
);
464 component_master_del(&pdev
->dev
, &mcde_drm_comp_ops
);
465 clk_disable_unprepare(mcde
->mcde_clk
);
466 regulator_disable(mcde
->vana
);
467 regulator_disable(mcde
->epod
);
472 static const struct of_device_id mcde_of_match
[] = {
474 .compatible
= "ste,mcde",
479 static struct platform_driver mcde_driver
= {
482 .of_match_table
= of_match_ptr(mcde_of_match
),
485 .remove
= mcde_remove
,
488 static struct platform_driver
*const component_drivers
[] = {
492 static int __init
mcde_drm_register(void)
496 ret
= platform_register_drivers(component_drivers
,
497 ARRAY_SIZE(component_drivers
));
501 return platform_driver_register(&mcde_driver
);
504 static void __exit
mcde_drm_unregister(void)
506 platform_unregister_drivers(component_drivers
,
507 ARRAY_SIZE(component_drivers
));
508 platform_driver_unregister(&mcde_driver
);
511 module_init(mcde_drm_register
);
512 module_exit(mcde_drm_unregister
);
514 MODULE_ALIAS("platform:mcde-drm");
515 MODULE_DESCRIPTION(DRIVER_DESC
);
516 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
517 MODULE_LICENSE("GPL");