drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dspp.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
   3  */
   4
   5 #ifndef _DPU_HW_DSPP_H
   6 #define _DPU_HW_DSPP_H
   7
   8 #include "dpu_hw_blk.h"
   9
  10 struct dpu_hw_dspp;
  11
  12 /**
  13  * struct dpu_hw_pcc_coeff - PCC coefficient structure for each color
  14  *                            component.
  15  * @r: red coefficient.
  16  * @g: green coefficient.
  17  * @b: blue coefficient.
  18  */
  19
  20 struct dpu_hw_pcc_coeff {
  21         __u32 r;
  22         __u32 g;
  23         __u32 b;
  24 };
  25
  26 /**
  27  * struct dpu_hw_pcc - pcc feature structure
  28  * @r: red coefficients.
  29  * @g: green coefficients.
  30  * @b: blue coefficients.
  31  */
  32 struct dpu_hw_pcc_cfg {
  33         struct dpu_hw_pcc_coeff r;
  34         struct dpu_hw_pcc_coeff g;
  35         struct dpu_hw_pcc_coeff b;
  36 };
  37
  38 /**
  39  * struct dpu_hw_dspp_ops - interface to the dspp hardware driver functions
  40  * Caller must call the init function to get the dspp context for each dspp
  41  * Assumption is these functions will be called after clocks are enabled
  42  */
  43 struct dpu_hw_dspp_ops {
  44         /**
  45          * setup_pcc - setup dspp pcc
  46          * @ctx: Pointer to dspp context
  47          * @cfg: Pointer to configuration
  48          */
  49         void (*setup_pcc)(struct dpu_hw_dspp *ctx, struct dpu_hw_pcc_cfg *cfg);
  50
  51 };
  52
  53 /**
  54  * struct dpu_hw_dspp - dspp description
  55  * @base: Hardware block base structure
  56  * @hw: Block hardware details
  57  * @idx: DSPP index
  58  * @cap: Pointer to layer_cfg
  59  * @ops: Pointer to operations possible for this DSPP
  60  */
  61 struct dpu_hw_dspp {
  62         struct dpu_hw_blk base;
  63         struct dpu_hw_blk_reg_map hw;
  64
  65         /* dspp */
  66         int idx;
  67         const struct dpu_dspp_cfg *cap;
  68
  69         /* Ops */
  70         struct dpu_hw_dspp_ops ops;
  71 };
  72
  73 /**
  74  * dpu_hw_dspp - convert base object dpu_hw_base to container
  75  * @hw: Pointer to base hardware block
  76  * return: Pointer to hardware block container
  77  */
  78 static inline struct dpu_hw_dspp *to_dpu_hw_dspp(struct dpu_hw_blk *hw)
  79 {
  80         return container_of(hw, struct dpu_hw_dspp, base);
  81 }
  82
  83 /**
  84  * dpu_hw_dspp_init - initializes the dspp hw driver object.
  85  * should be called once before accessing every dspp.
  86  * @idx:  DSPP index for which driver object is required
  87  * @addr: Mapped register io address of MDP
  88  * @Return: pointer to structure or ERR_PTR
  89  */
  90 struct dpu_hw_dspp *dpu_hw_dspp_init(enum dpu_dspp idx,
  91         void __iomem *addr, const struct dpu_mdss_cfg *m);
  92
  93 /**
  94  * dpu_hw_dspp_destroy(): Destroys DSPP driver context
  95  * @dspp: Pointer to DSPP driver context
  96  */
  97 void dpu_hw_dspp_destroy(struct dpu_hw_dspp *dspp);
  98
  99 #endif /*_DPU_HW_DSPP_H */
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