drivers/gpu/drm/nouveau/dispnv50/base827c.c

   1 /*
   2  * Copyright 2018 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "base.h"
  23
  24 #include <nvif/push507c.h>
  25
  26 #include <nvhw/class/cl827c.h>
  27
  28 static int
  29 base827c_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
  30 {
  31         struct nvif_push *push = wndw->wndw.push;
  32         int ret;
  33
  34         if ((ret = PUSH_WAIT(push, 13)))
  35                 return ret;
  36
  37         PUSH_MTHD(push, NV827C, SET_PRESENT_CONTROL,
  38                   NVVAL(NV827C, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
  39                   NVVAL(NV827C, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval));
  40
  41         PUSH_MTHD(push, NV827C, SET_CONTEXT_DMAS_ISO(0), asyw->image.handle, 1);
  42
  43         if (asyw->image.format == NV827C_SURFACE_SET_PARAMS_FORMAT_RF16_GF16_BF16_AF16) {
  44                 PUSH_MTHD(push, NV827C, SET_PROCESSING,
  45                           NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, ENABLE),
  46
  47                                         SET_CONVERSION,
  48                           NVVAL(NV827C, SET_CONVERSION, GAIN, 0) |
  49                           NVVAL(NV827C, SET_CONVERSION, OFS, 0x64));
  50         } else {
  51                 PUSH_MTHD(push, NV827C, SET_PROCESSING,
  52                           NVDEF(NV827C, SET_PROCESSING, USE_GAIN_OFS, DISABLE));
  53         }
  54
  55         PUSH_MTHD(push, NV827C, SURFACE_SET_OFFSET(0, 0), asyw->image.offset[0] >> 8,
  56                                 SURFACE_SET_OFFSET(0, 1), 0x00000000,
  57
  58                                 SURFACE_SET_SIZE(0),
  59                   NVVAL(NV827C, SURFACE_SET_SIZE, WIDTH, asyw->image.w) |
  60                   NVVAL(NV827C, SURFACE_SET_SIZE, HEIGHT, asyw->image.h),
  61
  62                                 SURFACE_SET_STORAGE(0),
  63                   NVVAL(NV827C, SURFACE_SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
  64                   NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.pitch[0] >> 8) |
  65                   NVVAL(NV827C, SURFACE_SET_STORAGE, PITCH, asyw->image.blocks[0]) |
  66                   NVVAL(NV827C, SURFACE_SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
  67
  68                                 SURFACE_SET_PARAMS(0),
  69                   NVVAL(NV827C, SURFACE_SET_PARAMS, FORMAT, asyw->image.format) |
  70                   NVDEF(NV827C, SURFACE_SET_PARAMS, SUPER_SAMPLE, X1_AA) |
  71                   NVDEF(NV827C, SURFACE_SET_PARAMS, GAMMA, LINEAR) |
  72                   NVDEF(NV827C, SURFACE_SET_PARAMS, LAYOUT, FRM));
  73         return 0;
  74 }
  75
  76 static const struct nv50_wndw_func
  77 base827c = {
  78         .acquire = base507c_acquire,
  79         .release = base507c_release,
  80         .sema_set = base507c_sema_set,
  81         .sema_clr = base507c_sema_clr,
  82         .ntfy_reset = base507c_ntfy_reset,
  83         .ntfy_set = base507c_ntfy_set,
  84         .ntfy_clr = base507c_ntfy_clr,
  85         .ntfy_wait_begun = base507c_ntfy_wait_begun,
  86         .olut_core = 1,
  87         .xlut_set = base507c_xlut_set,
  88         .xlut_clr = base507c_xlut_clr,
  89         .image_set = base827c_image_set,
  90         .image_clr = base507c_image_clr,
  91         .update = base507c_update,
  92 };
  93
  94 int
  95 base827c_new(struct nouveau_drm *drm, int head, s32 oclass,
  96              struct nv50_wndw **pwndw)
  97 {
  98         return base507c_new_(&base827c, base507c_format, drm, head, oclass,
  99                              0x00000002 << (head * 8), pwndw);
 100 }