Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / dispnv50 / curs507a.c
blob54fbd6fe751df4a4f6914d906256f4649c0313db
1 /*
2 * Copyright 2018 Red Hat Inc.
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
22 #include "curs.h"
23 #include "core.h"
24 #include "head.h"
26 #include <nvif/cl507a.h>
27 #include <nvif/timer.h>
29 #include <nvhw/class/cl507a.h>
31 #include <drm/drm_atomic_helper.h>
32 #include <drm/drm_plane_helper.h>
34 bool
35 curs507a_space(struct nv50_wndw *wndw)
37 nvif_msec(&nouveau_drm(wndw->plane.dev)->client.device, 100,
38 if (NVIF_TV32(&wndw->wimm.base.user, NV507A, FREE, COUNT, >=, 4))
39 return true;
42 WARN_ON(1);
43 return false;
46 static int
47 curs507a_update(struct nv50_wndw *wndw, u32 *interlock)
49 struct nvif_object *user = &wndw->wimm.base.user;
50 int ret = nvif_chan_wait(&wndw->wimm, 1);
51 if (ret == 0) {
52 NVIF_WR32(user, NV507A, UPDATE,
53 NVDEF(NV507A, UPDATE, INTERLOCK_WITH_CORE, DISABLE));
55 return ret;
58 static int
59 curs507a_point(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
61 struct nvif_object *user = &wndw->wimm.base.user;
62 int ret = nvif_chan_wait(&wndw->wimm, 1);
63 if (ret == 0) {
64 NVIF_WR32(user, NV507A, SET_CURSOR_HOT_SPOT_POINT_OUT,
65 NVVAL(NV507A, SET_CURSOR_HOT_SPOT_POINT_OUT, X, asyw->point.x) |
66 NVVAL(NV507A, SET_CURSOR_HOT_SPOT_POINT_OUT, Y, asyw->point.y));
68 return ret;
71 const struct nv50_wimm_func
72 curs507a = {
73 .point = curs507a_point,
74 .update = curs507a_update,
77 static void
78 curs507a_prepare(struct nv50_wndw *wndw, struct nv50_head_atom *asyh,
79 struct nv50_wndw_atom *asyw)
81 u32 handle = nv50_disp(wndw->plane.dev)->core->chan.vram.handle;
82 u32 offset = asyw->image.offset[0];
83 if (asyh->curs.handle != handle || asyh->curs.offset != offset) {
84 asyh->curs.handle = handle;
85 asyh->curs.offset = offset;
86 asyh->set.curs = asyh->curs.visible;
90 static void
91 curs507a_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
92 struct nv50_head_atom *asyh)
94 asyh->curs.visible = false;
97 static int
98 curs507a_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
99 struct nv50_head_atom *asyh)
101 struct nv50_head *head = nv50_head(asyw->state.crtc);
102 int ret;
104 ret = drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,
105 DRM_PLANE_HELPER_NO_SCALING,
106 DRM_PLANE_HELPER_NO_SCALING,
107 true, true);
108 asyh->curs.visible = asyw->state.visible;
109 if (ret || !asyh->curs.visible)
110 return ret;
112 if (asyw->image.w != asyw->image.h)
113 return -EINVAL;
115 ret = head->func->curs_layout(head, asyw, asyh);
116 if (ret)
117 return ret;
119 return head->func->curs_format(head, asyw, asyh);
122 static const u32
123 curs507a_format[] = {
124 DRM_FORMAT_ARGB8888,
128 static const struct nv50_wndw_func
129 curs507a_wndw = {
130 .acquire = curs507a_acquire,
131 .release = curs507a_release,
132 .prepare = curs507a_prepare,
136 curs507a_new_(const struct nv50_wimm_func *func, struct nouveau_drm *drm,
137 int head, s32 oclass, u32 interlock_data,
138 struct nv50_wndw **pwndw)
140 struct nv50_disp_cursor_v0 args = {
141 .head = head,
143 struct nv50_disp *disp = nv50_disp(drm->dev);
144 struct nv50_wndw *wndw;
145 int ret;
147 ret = nv50_wndw_new_(&curs507a_wndw, drm->dev, DRM_PLANE_TYPE_CURSOR,
148 "curs", head, curs507a_format, BIT(head),
149 NV50_DISP_INTERLOCK_CURS, interlock_data, &wndw);
150 if (*pwndw = wndw, ret)
151 return ret;
153 ret = nvif_object_ctor(&disp->disp->object, "kmsCurs", 0, oclass,
154 &args, sizeof(args), &wndw->wimm.base.user);
155 if (ret) {
156 NV_ERROR(drm, "curs%04x allocation failed: %d\n", oclass, ret);
157 return ret;
160 nvif_object_map(&wndw->wimm.base.user, NULL, 0);
161 wndw->immd = func;
162 wndw->ctxdma.parent = NULL;
163 return 0;
167 curs507a_new(struct nouveau_drm *drm, int head, s32 oclass,
168 struct nv50_wndw **pwndw)
170 return curs507a_new_(&curs507a, drm, head, oclass,
171 0x00000001 << (head * 8), pwndw);