drivers/gpu/drm/nouveau/include/nvkm/engine/falcon.h

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NVKM_FLCNEN_H__
   3 #define __NVKM_FLCNEN_H__
   4 #define nvkm_falcon(p) container_of((p), struct nvkm_falcon, engine)
   5 #include <core/engine.h>
   6 struct nvkm_fifo_chan;
   7 struct nvkm_gpuobj;
   8
   9 enum nvkm_falcon_dmaidx {
  10         FALCON_DMAIDX_UCODE             = 0,
  11         FALCON_DMAIDX_VIRT              = 1,
  12         FALCON_DMAIDX_PHYS_VID          = 2,
  13         FALCON_DMAIDX_PHYS_SYS_COH      = 3,
  14         FALCON_DMAIDX_PHYS_SYS_NCOH     = 4,
  15         FALCON_SEC2_DMAIDX_UCODE        = 6,
  16 };
  17
  18 struct nvkm_falcon {
  19         const struct nvkm_falcon_func *func;
  20         const struct nvkm_subdev *owner;
  21         const char *name;
  22         u32 addr;
  23
  24         struct mutex mutex;
  25         struct mutex dmem_mutex;
  26         bool oneinit;
  27
  28         const struct nvkm_subdev *user;
  29
  30         u8 version;
  31         u8 secret;
  32         bool debug;
  33
  34         struct nvkm_memory *core;
  35         bool external;
  36
  37         struct {
  38                 u32 limit;
  39                 u32 *data;
  40                 u32  size;
  41                 u8 ports;
  42         } code;
  43
  44         struct {
  45                 u32 limit;
  46                 u32 *data;
  47                 u32  size;
  48                 u8 ports;
  49         } data;
  50
  51         struct nvkm_engine engine;
  52 };
  53
  54 /* This constructor must be called from the owner's oneinit() hook and
  55  * *not* its constructor.  This is to ensure that DEVINIT has been
  56  * completed, and that the device is correctly enabled before we touch
  57  * falcon registers.
  58  */
  59 int nvkm_falcon_v1_new(struct nvkm_subdev *owner, const char *name, u32 addr,
  60                        struct nvkm_falcon **);
  61
  62 void nvkm_falcon_del(struct nvkm_falcon **);
  63 int nvkm_falcon_get(struct nvkm_falcon *, const struct nvkm_subdev *);
  64 void nvkm_falcon_put(struct nvkm_falcon *, const struct nvkm_subdev *);
  65
  66 int nvkm_falcon_new_(const struct nvkm_falcon_func *, struct nvkm_device *,
  67                      int index, bool enable, u32 addr, struct nvkm_engine **);
  68
  69 struct nvkm_falcon_func {
  70         struct {
  71                 u32 *data;
  72                 u32  size;
  73         } code;
  74         struct {
  75                 u32 *data;
  76                 u32  size;
  77         } data;
  78         void (*init)(struct nvkm_falcon *);
  79         void (*intr)(struct nvkm_falcon *, struct nvkm_fifo_chan *);
  80
  81         u32 debug;
  82         u32 fbif;
  83
  84         void (*load_imem)(struct nvkm_falcon *, void *, u32, u32, u16, u8, bool);
  85         void (*load_dmem)(struct nvkm_falcon *, void *, u32, u32, u8);
  86         void (*read_dmem)(struct nvkm_falcon *, u32, u32, u8, void *);
  87         u32 emem_addr;
  88         void (*bind_context)(struct nvkm_falcon *, struct nvkm_memory *);
  89         int (*wait_for_halt)(struct nvkm_falcon *, u32);
  90         int (*clear_interrupt)(struct nvkm_falcon *, u32);
  91         void (*set_start_addr)(struct nvkm_falcon *, u32 start_addr);
  92         void (*start)(struct nvkm_falcon *);
  93         int (*enable)(struct nvkm_falcon *falcon);
  94         void (*disable)(struct nvkm_falcon *falcon);
  95         int (*reset)(struct nvkm_falcon *);
  96
  97         struct {
  98                 u32 head;
  99                 u32 tail;
 100                 u32 stride;
 101         } cmdq, msgq;
 102
 103         struct nvkm_sclass sclass[];
 104 };
 105
 106 static inline u32
 107 nvkm_falcon_rd32(struct nvkm_falcon *falcon, u32 addr)
 108 {
 109         return nvkm_rd32(falcon->owner->device, falcon->addr + addr);
 110 }
 111
 112 static inline void
 113 nvkm_falcon_wr32(struct nvkm_falcon *falcon, u32 addr, u32 data)
 114 {
 115         nvkm_wr32(falcon->owner->device, falcon->addr + addr, data);
 116 }
 117
 118 static inline u32
 119 nvkm_falcon_mask(struct nvkm_falcon *falcon, u32 addr, u32 mask, u32 val)
 120 {
 121         struct nvkm_device *device = falcon->owner->device;
 122
 123         return nvkm_mask(device, falcon->addr + addr, mask, val);
 124 }
 125
 126 void nvkm_falcon_load_imem(struct nvkm_falcon *, void *, u32, u32, u16, u8,
 127                            bool);
 128 void nvkm_falcon_load_dmem(struct nvkm_falcon *, void *, u32, u32, u8);
 129 void nvkm_falcon_read_dmem(struct nvkm_falcon *, u32, u32, u8, void *);
 130 void nvkm_falcon_bind_context(struct nvkm_falcon *, struct nvkm_memory *);
 131 void nvkm_falcon_set_start_addr(struct nvkm_falcon *, u32);
 132 void nvkm_falcon_start(struct nvkm_falcon *);
 133 int nvkm_falcon_wait_for_halt(struct nvkm_falcon *, u32);
 134 int nvkm_falcon_clear_interrupt(struct nvkm_falcon *, u32);
 135 int nvkm_falcon_enable(struct nvkm_falcon *);
 136 void nvkm_falcon_disable(struct nvkm_falcon *);
 137 int nvkm_falcon_reset(struct nvkm_falcon *);
 138 #endif