Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / gpu / drm / nouveau / nvkm / engine / gr / regs.h
blobfd1b7d35c62b841030de40a0099338b21cd11485
1 /* SPDX-License-Identifier: MIT */
2 #ifndef __NVKM_GR_REGS_H__
3 #define __NVKM_GR_REGS_H__
5 #define NV04_PGRAPH_DEBUG_0 0x00400080
6 #define NV04_PGRAPH_DEBUG_1 0x00400084
7 #define NV04_PGRAPH_DEBUG_2 0x00400088
8 #define NV04_PGRAPH_DEBUG_3 0x0040008c
9 #define NV10_PGRAPH_DEBUG_4 0x00400090
10 #define NV03_PGRAPH_INTR 0x00400100
11 #define NV03_PGRAPH_NSTATUS 0x00400104
12 # define NV04_PGRAPH_NSTATUS_STATE_IN_USE (1<<11)
13 # define NV04_PGRAPH_NSTATUS_INVALID_STATE (1<<12)
14 # define NV04_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<13)
15 # define NV04_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<14)
16 # define NV10_PGRAPH_NSTATUS_STATE_IN_USE (1<<23)
17 # define NV10_PGRAPH_NSTATUS_INVALID_STATE (1<<24)
18 # define NV10_PGRAPH_NSTATUS_BAD_ARGUMENT (1<<25)
19 # define NV10_PGRAPH_NSTATUS_PROTECTION_FAULT (1<<26)
20 #define NV03_PGRAPH_NSOURCE 0x00400108
21 # define NV03_PGRAPH_NSOURCE_NOTIFICATION (1<<0)
22 # define NV03_PGRAPH_NSOURCE_DATA_ERROR (1<<1)
23 # define NV03_PGRAPH_NSOURCE_PROTECTION_ERROR (1<<2)
24 # define NV03_PGRAPH_NSOURCE_RANGE_EXCEPTION (1<<3)
25 # define NV03_PGRAPH_NSOURCE_LIMIT_COLOR (1<<4)
26 # define NV03_PGRAPH_NSOURCE_LIMIT_ZETA (1<<5)
27 # define NV03_PGRAPH_NSOURCE_ILLEGAL_MTHD (1<<6)
28 # define NV03_PGRAPH_NSOURCE_DMA_R_PROTECTION (1<<7)
29 # define NV03_PGRAPH_NSOURCE_DMA_W_PROTECTION (1<<8)
30 # define NV03_PGRAPH_NSOURCE_FORMAT_EXCEPTION (1<<9)
31 # define NV03_PGRAPH_NSOURCE_PATCH_EXCEPTION (1<<10)
32 # define NV03_PGRAPH_NSOURCE_STATE_INVALID (1<<11)
33 # define NV03_PGRAPH_NSOURCE_DOUBLE_NOTIFY (1<<12)
34 # define NV03_PGRAPH_NSOURCE_NOTIFY_IN_USE (1<<13)
35 # define NV03_PGRAPH_NSOURCE_METHOD_CNT (1<<14)
36 # define NV03_PGRAPH_NSOURCE_BFR_NOTIFICATION (1<<15)
37 # define NV03_PGRAPH_NSOURCE_DMA_VTX_PROTECTION (1<<16)
38 # define NV03_PGRAPH_NSOURCE_DMA_WIDTH_A (1<<17)
39 # define NV03_PGRAPH_NSOURCE_DMA_WIDTH_B (1<<18)
40 #define NV03_PGRAPH_INTR_EN 0x00400140
41 #define NV40_PGRAPH_INTR_EN 0x0040013C
42 # define NV_PGRAPH_INTR_NOTIFY (1<<0)
43 # define NV_PGRAPH_INTR_MISSING_HW (1<<4)
44 # define NV_PGRAPH_INTR_CONTEXT_SWITCH (1<<12)
45 # define NV_PGRAPH_INTR_BUFFER_NOTIFY (1<<16)
46 # define NV_PGRAPH_INTR_ERROR (1<<20)
47 #define NV10_PGRAPH_CTX_CONTROL 0x00400144
48 #define NV10_PGRAPH_CTX_USER 0x00400148
49 #define NV10_PGRAPH_CTX_SWITCH(i) (0x0040014C + 0x4*(i))
50 #define NV04_PGRAPH_CTX_SWITCH1 0x00400160
51 #define NV10_PGRAPH_CTX_CACHE(i, j) (0x00400160 \
52 + 0x4*(i) + 0x20*(j))
53 #define NV04_PGRAPH_CTX_SWITCH2 0x00400164
54 #define NV04_PGRAPH_CTX_SWITCH3 0x00400168
55 #define NV04_PGRAPH_CTX_SWITCH4 0x0040016C
56 #define NV04_PGRAPH_CTX_CONTROL 0x00400170
57 #define NV04_PGRAPH_CTX_USER 0x00400174
58 #define NV04_PGRAPH_CTX_CACHE1 0x00400180
59 #define NV03_PGRAPH_CTX_CONTROL 0x00400190
60 #define NV03_PGRAPH_CTX_USER 0x00400194
61 #define NV04_PGRAPH_CTX_CACHE2 0x004001A0
62 #define NV04_PGRAPH_CTX_CACHE3 0x004001C0
63 #define NV04_PGRAPH_CTX_CACHE4 0x004001E0
64 #define NV40_PGRAPH_CTXCTL_0304 0x00400304
65 #define NV40_PGRAPH_CTXCTL_0304_XFER_CTX 0x00000001
66 #define NV40_PGRAPH_CTXCTL_UCODE_STAT 0x00400308
67 #define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_MASK 0xff000000
68 #define NV40_PGRAPH_CTXCTL_UCODE_STAT_IP_SHIFT 24
69 #define NV40_PGRAPH_CTXCTL_UCODE_STAT_OP_MASK 0x00ffffff
70 #define NV40_PGRAPH_CTXCTL_0310 0x00400310
71 #define NV40_PGRAPH_CTXCTL_0310_XFER_SAVE 0x00000020
72 #define NV40_PGRAPH_CTXCTL_0310_XFER_LOAD 0x00000040
73 #define NV40_PGRAPH_CTXCTL_030C 0x0040030c
74 #define NV40_PGRAPH_CTXCTL_UCODE_INDEX 0x00400324
75 #define NV40_PGRAPH_CTXCTL_UCODE_DATA 0x00400328
76 #define NV40_PGRAPH_CTXCTL_CUR 0x0040032c
77 #define NV40_PGRAPH_CTXCTL_CUR_LOADED 0x01000000
78 #define NV40_PGRAPH_CTXCTL_CUR_INSTANCE 0x000FFFFF
79 #define NV40_PGRAPH_CTXCTL_NEXT 0x00400330
80 #define NV40_PGRAPH_CTXCTL_NEXT_INSTANCE 0x000fffff
81 #define NV50_PGRAPH_CTXCTL_CUR 0x0040032c
82 #define NV50_PGRAPH_CTXCTL_CUR_LOADED 0x80000000
83 #define NV50_PGRAPH_CTXCTL_CUR_INSTANCE 0x00ffffff
84 #define NV50_PGRAPH_CTXCTL_NEXT 0x00400330
85 #define NV50_PGRAPH_CTXCTL_NEXT_INSTANCE 0x00ffffff
86 #define NV03_PGRAPH_ABS_X_RAM 0x00400400
87 #define NV03_PGRAPH_ABS_Y_RAM 0x00400480
88 #define NV03_PGRAPH_X_MISC 0x00400500
89 #define NV03_PGRAPH_Y_MISC 0x00400504
90 #define NV04_PGRAPH_VALID1 0x00400508
91 #define NV04_PGRAPH_SOURCE_COLOR 0x0040050C
92 #define NV04_PGRAPH_MISC24_0 0x00400510
93 #define NV03_PGRAPH_XY_LOGIC_MISC0 0x00400514
94 #define NV03_PGRAPH_XY_LOGIC_MISC1 0x00400518
95 #define NV03_PGRAPH_XY_LOGIC_MISC2 0x0040051C
96 #define NV03_PGRAPH_XY_LOGIC_MISC3 0x00400520
97 #define NV03_PGRAPH_CLIPX_0 0x00400524
98 #define NV03_PGRAPH_CLIPX_1 0x00400528
99 #define NV03_PGRAPH_CLIPY_0 0x0040052C
100 #define NV03_PGRAPH_CLIPY_1 0x00400530
101 #define NV03_PGRAPH_ABS_ICLIP_XMAX 0x00400534
102 #define NV03_PGRAPH_ABS_ICLIP_YMAX 0x00400538
103 #define NV03_PGRAPH_ABS_UCLIP_XMIN 0x0040053C
104 #define NV03_PGRAPH_ABS_UCLIP_YMIN 0x00400540
105 #define NV03_PGRAPH_ABS_UCLIP_XMAX 0x00400544
106 #define NV03_PGRAPH_ABS_UCLIP_YMAX 0x00400548
107 #define NV03_PGRAPH_ABS_UCLIPA_XMIN 0x00400560
108 #define NV03_PGRAPH_ABS_UCLIPA_YMIN 0x00400564
109 #define NV03_PGRAPH_ABS_UCLIPA_XMAX 0x00400568
110 #define NV03_PGRAPH_ABS_UCLIPA_YMAX 0x0040056C
111 #define NV04_PGRAPH_MISC24_1 0x00400570
112 #define NV04_PGRAPH_MISC24_2 0x00400574
113 #define NV04_PGRAPH_VALID2 0x00400578
114 #define NV04_PGRAPH_PASSTHRU_0 0x0040057C
115 #define NV04_PGRAPH_PASSTHRU_1 0x00400580
116 #define NV04_PGRAPH_PASSTHRU_2 0x00400584
117 #define NV10_PGRAPH_DIMX_TEXTURE 0x00400588
118 #define NV10_PGRAPH_WDIMX_TEXTURE 0x0040058C
119 #define NV04_PGRAPH_COMBINE_0_ALPHA 0x00400590
120 #define NV04_PGRAPH_COMBINE_0_COLOR 0x00400594
121 #define NV04_PGRAPH_COMBINE_1_ALPHA 0x00400598
122 #define NV04_PGRAPH_COMBINE_1_COLOR 0x0040059C
123 #define NV04_PGRAPH_FORMAT_0 0x004005A8
124 #define NV04_PGRAPH_FORMAT_1 0x004005AC
125 #define NV04_PGRAPH_FILTER_0 0x004005B0
126 #define NV04_PGRAPH_FILTER_1 0x004005B4
127 #define NV03_PGRAPH_MONO_COLOR0 0x00400600
128 #define NV04_PGRAPH_ROP3 0x00400604
129 #define NV04_PGRAPH_BETA_AND 0x00400608
130 #define NV04_PGRAPH_BETA_PREMULT 0x0040060C
131 #define NV04_PGRAPH_LIMIT_VIOL_PIX 0x00400610
132 #define NV04_PGRAPH_FORMATS 0x00400618
133 #define NV10_PGRAPH_DEBUG_2 0x00400620
134 #define NV04_PGRAPH_BOFFSET0 0x00400640
135 #define NV04_PGRAPH_BOFFSET1 0x00400644
136 #define NV04_PGRAPH_BOFFSET2 0x00400648
137 #define NV04_PGRAPH_BOFFSET3 0x0040064C
138 #define NV04_PGRAPH_BOFFSET4 0x00400650
139 #define NV04_PGRAPH_BOFFSET5 0x00400654
140 #define NV04_PGRAPH_BBASE0 0x00400658
141 #define NV04_PGRAPH_BBASE1 0x0040065C
142 #define NV04_PGRAPH_BBASE2 0x00400660
143 #define NV04_PGRAPH_BBASE3 0x00400664
144 #define NV04_PGRAPH_BBASE4 0x00400668
145 #define NV04_PGRAPH_BBASE5 0x0040066C
146 #define NV04_PGRAPH_BPITCH0 0x00400670
147 #define NV04_PGRAPH_BPITCH1 0x00400674
148 #define NV04_PGRAPH_BPITCH2 0x00400678
149 #define NV04_PGRAPH_BPITCH3 0x0040067C
150 #define NV04_PGRAPH_BPITCH4 0x00400680
151 #define NV04_PGRAPH_BLIMIT0 0x00400684
152 #define NV04_PGRAPH_BLIMIT1 0x00400688
153 #define NV04_PGRAPH_BLIMIT2 0x0040068C
154 #define NV04_PGRAPH_BLIMIT3 0x00400690
155 #define NV04_PGRAPH_BLIMIT4 0x00400694
156 #define NV04_PGRAPH_BLIMIT5 0x00400698
157 #define NV04_PGRAPH_BSWIZZLE2 0x0040069C
158 #define NV04_PGRAPH_BSWIZZLE5 0x004006A0
159 #define NV03_PGRAPH_STATUS 0x004006B0
160 #define NV04_PGRAPH_STATUS 0x00400700
161 # define NV40_PGRAPH_STATUS_SYNC_STALL 0x00004000
162 #define NV04_PGRAPH_TRAPPED_ADDR 0x00400704
163 #define NV04_PGRAPH_TRAPPED_DATA 0x00400708
164 #define NV04_PGRAPH_SURFACE 0x0040070C
165 #define NV10_PGRAPH_TRAPPED_DATA_HIGH 0x0040070C
166 #define NV04_PGRAPH_STATE 0x00400710
167 #define NV10_PGRAPH_SURFACE 0x00400710
168 #define NV04_PGRAPH_NOTIFY 0x00400714
169 #define NV10_PGRAPH_STATE 0x00400714
170 #define NV10_PGRAPH_NOTIFY 0x00400718
172 #define NV04_PGRAPH_FIFO 0x00400720
174 #define NV04_PGRAPH_BPIXEL 0x00400724
175 #define NV10_PGRAPH_RDI_INDEX 0x00400750
176 #define NV04_PGRAPH_FFINTFC_ST2 0x00400754
177 #define NV10_PGRAPH_RDI_DATA 0x00400754
178 #define NV04_PGRAPH_DMA_PITCH 0x00400760
179 #define NV10_PGRAPH_FFINTFC_FIFO_PTR 0x00400760
180 #define NV04_PGRAPH_DVD_COLORFMT 0x00400764
181 #define NV10_PGRAPH_FFINTFC_ST2 0x00400764
182 #define NV04_PGRAPH_SCALED_FORMAT 0x00400768
183 #define NV10_PGRAPH_FFINTFC_ST2_DL 0x00400768
184 #define NV10_PGRAPH_FFINTFC_ST2_DH 0x0040076c
185 #define NV10_PGRAPH_DMA_PITCH 0x00400770
186 #define NV10_PGRAPH_DVD_COLORFMT 0x00400774
187 #define NV10_PGRAPH_SCALED_FORMAT 0x00400778
188 #define NV20_PGRAPH_CHANNEL_CTX_TABLE 0x00400780
189 #define NV20_PGRAPH_CHANNEL_CTX_POINTER 0x00400784
190 #define NV20_PGRAPH_CHANNEL_CTX_XFER 0x00400788
191 #define NV20_PGRAPH_CHANNEL_CTX_XFER_LOAD 0x00000001
192 #define NV20_PGRAPH_CHANNEL_CTX_XFER_SAVE 0x00000002
193 #define NV04_PGRAPH_PATT_COLOR0 0x00400800
194 #define NV04_PGRAPH_PATT_COLOR1 0x00400804
195 #define NV04_PGRAPH_PATTERN 0x00400808
196 #define NV04_PGRAPH_PATTERN_SHAPE 0x00400810
197 #define NV04_PGRAPH_CHROMA 0x00400814
198 #define NV04_PGRAPH_CONTROL0 0x00400818
199 #define NV04_PGRAPH_CONTROL1 0x0040081C
200 #define NV04_PGRAPH_CONTROL2 0x00400820
201 #define NV04_PGRAPH_BLEND 0x00400824
202 #define NV04_PGRAPH_STORED_FMT 0x00400830
203 #define NV04_PGRAPH_PATT_COLORRAM 0x00400900
204 #define NV20_PGRAPH_TILE(i) (0x00400900 + (i*16))
205 #define NV20_PGRAPH_TLIMIT(i) (0x00400904 + (i*16))
206 #define NV20_PGRAPH_TSIZE(i) (0x00400908 + (i*16))
207 #define NV20_PGRAPH_TSTATUS(i) (0x0040090C + (i*16))
208 #define NV20_PGRAPH_ZCOMP(i) (0x00400980 + 4*(i))
209 #define NV41_PGRAPH_ZCOMP0(i) (0x004009c0 + 4*(i))
210 #define NV10_PGRAPH_TILE(i) (0x00400B00 + (i*16))
211 #define NV10_PGRAPH_TLIMIT(i) (0x00400B04 + (i*16))
212 #define NV10_PGRAPH_TSIZE(i) (0x00400B08 + (i*16))
213 #define NV10_PGRAPH_TSTATUS(i) (0x00400B0C + (i*16))
214 #define NV04_PGRAPH_U_RAM 0x00400D00
215 #define NV47_PGRAPH_TILE(i) (0x00400D00 + (i*16))
216 #define NV47_PGRAPH_TLIMIT(i) (0x00400D04 + (i*16))
217 #define NV47_PGRAPH_TSIZE(i) (0x00400D08 + (i*16))
218 #define NV47_PGRAPH_TSTATUS(i) (0x00400D0C + (i*16))
219 #define NV04_PGRAPH_V_RAM 0x00400D40
220 #define NV04_PGRAPH_W_RAM 0x00400D80
221 #define NV47_PGRAPH_ZCOMP0(i) (0x00400e00 + 4*(i))
222 #define NV10_PGRAPH_COMBINER0_IN_ALPHA 0x00400E40
223 #define NV10_PGRAPH_COMBINER1_IN_ALPHA 0x00400E44
224 #define NV10_PGRAPH_COMBINER0_IN_RGB 0x00400E48
225 #define NV10_PGRAPH_COMBINER1_IN_RGB 0x00400E4C
226 #define NV10_PGRAPH_COMBINER_COLOR0 0x00400E50
227 #define NV10_PGRAPH_COMBINER_COLOR1 0x00400E54
228 #define NV10_PGRAPH_COMBINER0_OUT_ALPHA 0x00400E58
229 #define NV10_PGRAPH_COMBINER1_OUT_ALPHA 0x00400E5C
230 #define NV10_PGRAPH_COMBINER0_OUT_RGB 0x00400E60
231 #define NV10_PGRAPH_COMBINER1_OUT_RGB 0x00400E64
232 #define NV10_PGRAPH_COMBINER_FINAL0 0x00400E68
233 #define NV10_PGRAPH_COMBINER_FINAL1 0x00400E6C
234 #define NV10_PGRAPH_WINDOWCLIP_HORIZONTAL 0x00400F00
235 #define NV10_PGRAPH_WINDOWCLIP_VERTICAL 0x00400F20
236 #define NV10_PGRAPH_XFMODE0 0x00400F40
237 #define NV10_PGRAPH_XFMODE1 0x00400F44
238 #define NV10_PGRAPH_GLOBALSTATE0 0x00400F48
239 #define NV10_PGRAPH_GLOBALSTATE1 0x00400F4C
240 #define NV10_PGRAPH_PIPE_ADDRESS 0x00400F50
241 #define NV10_PGRAPH_PIPE_DATA 0x00400F54
242 #define NV04_PGRAPH_DMA_START_0 0x00401000
243 #define NV04_PGRAPH_DMA_START_1 0x00401004
244 #define NV04_PGRAPH_DMA_LENGTH 0x00401008
245 #define NV04_PGRAPH_DMA_MISC 0x0040100C
246 #define NV04_PGRAPH_DMA_DATA_0 0x00401020
247 #define NV04_PGRAPH_DMA_DATA_1 0x00401024
248 #define NV04_PGRAPH_DMA_RM 0x00401030
249 #define NV04_PGRAPH_DMA_A_XLATE_INST 0x00401040
250 #define NV04_PGRAPH_DMA_A_CONTROL 0x00401044
251 #define NV04_PGRAPH_DMA_A_LIMIT 0x00401048
252 #define NV04_PGRAPH_DMA_A_TLB_PTE 0x0040104C
253 #define NV04_PGRAPH_DMA_A_TLB_TAG 0x00401050
254 #define NV04_PGRAPH_DMA_A_ADJ_OFFSET 0x00401054
255 #define NV04_PGRAPH_DMA_A_OFFSET 0x00401058
256 #define NV04_PGRAPH_DMA_A_SIZE 0x0040105C
257 #define NV04_PGRAPH_DMA_A_Y_SIZE 0x00401060
258 #define NV04_PGRAPH_DMA_B_XLATE_INST 0x00401080
259 #define NV04_PGRAPH_DMA_B_CONTROL 0x00401084
260 #define NV04_PGRAPH_DMA_B_LIMIT 0x00401088
261 #define NV04_PGRAPH_DMA_B_TLB_PTE 0x0040108C
262 #define NV04_PGRAPH_DMA_B_TLB_TAG 0x00401090
263 #define NV04_PGRAPH_DMA_B_ADJ_OFFSET 0x00401094
264 #define NV04_PGRAPH_DMA_B_OFFSET 0x00401098
265 #define NV04_PGRAPH_DMA_B_SIZE 0x0040109C
266 #define NV04_PGRAPH_DMA_B_Y_SIZE 0x004010A0
267 #define NV47_PGRAPH_ZCOMP1(i) (0x004068c0 + 4*(i))
268 #define NV40_PGRAPH_TILE1(i) (0x00406900 + (i*16))
269 #define NV40_PGRAPH_TLIMIT1(i) (0x00406904 + (i*16))
270 #define NV40_PGRAPH_TSIZE1(i) (0x00406908 + (i*16))
271 #define NV40_PGRAPH_TSTATUS1(i) (0x0040690C + (i*16))
272 #define NV40_PGRAPH_ZCOMP1(i) (0x00406980 + 4*(i))
273 #define NV41_PGRAPH_ZCOMP1(i) (0x004069c0 + 4*(i))
275 #endif