Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / hwtracing / coresight / coresight-tpiu.c
blobd5dfee9ee55698b8606da6ad107e9618f1614631
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
5 * Description: CoreSight Trace Port Interface Unit driver
6 */
8 #include <linux/atomic.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/device.h>
12 #include <linux/io.h>
13 #include <linux/err.h>
14 #include <linux/slab.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/coresight.h>
17 #include <linux/amba/bus.h>
18 #include <linux/clk.h>
20 #include "coresight-priv.h"
22 #define TPIU_SUPP_PORTSZ 0x000
23 #define TPIU_CURR_PORTSZ 0x004
24 #define TPIU_SUPP_TRIGMODES 0x100
25 #define TPIU_TRIG_CNTRVAL 0x104
26 #define TPIU_TRIG_MULT 0x108
27 #define TPIU_SUPP_TESTPATM 0x200
28 #define TPIU_CURR_TESTPATM 0x204
29 #define TPIU_TEST_PATREPCNTR 0x208
30 #define TPIU_FFSR 0x300
31 #define TPIU_FFCR 0x304
32 #define TPIU_FSYNC_CNTR 0x308
33 #define TPIU_EXTCTL_INPORT 0x400
34 #define TPIU_EXTCTL_OUTPORT 0x404
35 #define TPIU_ITTRFLINACK 0xee4
36 #define TPIU_ITTRFLIN 0xee8
37 #define TPIU_ITATBDATA0 0xeec
38 #define TPIU_ITATBCTR2 0xef0
39 #define TPIU_ITATBCTR1 0xef4
40 #define TPIU_ITATBCTR0 0xef8
42 /** register definition **/
43 /* FFSR - 0x300 */
44 #define FFSR_FT_STOPPED_BIT 1
45 /* FFCR - 0x304 */
46 #define FFCR_FON_MAN_BIT 6
47 #define FFCR_FON_MAN BIT(6)
48 #define FFCR_STOP_FI BIT(12)
50 DEFINE_CORESIGHT_DEVLIST(tpiu_devs, "tpiu");
53 * @base: memory mapped base address for this component.
54 * @atclk: optional clock for the core parts of the TPIU.
55 * @csdev: component vitals needed by the framework.
57 struct tpiu_drvdata {
58 void __iomem *base;
59 struct clk *atclk;
60 struct coresight_device *csdev;
63 static void tpiu_enable_hw(struct tpiu_drvdata *drvdata)
65 CS_UNLOCK(drvdata->base);
67 /* TODO: fill this up */
69 CS_LOCK(drvdata->base);
72 static int tpiu_enable(struct coresight_device *csdev, u32 mode, void *__unused)
74 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
76 tpiu_enable_hw(drvdata);
77 atomic_inc(csdev->refcnt);
78 dev_dbg(&csdev->dev, "TPIU enabled\n");
79 return 0;
82 static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
84 CS_UNLOCK(drvdata->base);
86 /* Clear formatter and stop on flush */
87 writel_relaxed(FFCR_STOP_FI, drvdata->base + TPIU_FFCR);
88 /* Generate manual flush */
89 writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
90 /* Wait for flush to complete */
91 coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
92 /* Wait for formatter to stop */
93 coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
95 CS_LOCK(drvdata->base);
98 static int tpiu_disable(struct coresight_device *csdev)
100 struct tpiu_drvdata *drvdata = dev_get_drvdata(csdev->dev.parent);
102 if (atomic_dec_return(csdev->refcnt))
103 return -EBUSY;
105 tpiu_disable_hw(drvdata);
107 dev_dbg(&csdev->dev, "TPIU disabled\n");
108 return 0;
111 static const struct coresight_ops_sink tpiu_sink_ops = {
112 .enable = tpiu_enable,
113 .disable = tpiu_disable,
116 static const struct coresight_ops tpiu_cs_ops = {
117 .sink_ops = &tpiu_sink_ops,
120 static int tpiu_probe(struct amba_device *adev, const struct amba_id *id)
122 int ret;
123 void __iomem *base;
124 struct device *dev = &adev->dev;
125 struct coresight_platform_data *pdata = NULL;
126 struct tpiu_drvdata *drvdata;
127 struct resource *res = &adev->res;
128 struct coresight_desc desc = { 0 };
130 desc.name = coresight_alloc_device_name(&tpiu_devs, dev);
131 if (!desc.name)
132 return -ENOMEM;
134 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
135 if (!drvdata)
136 return -ENOMEM;
138 drvdata->atclk = devm_clk_get(&adev->dev, "atclk"); /* optional */
139 if (!IS_ERR(drvdata->atclk)) {
140 ret = clk_prepare_enable(drvdata->atclk);
141 if (ret)
142 return ret;
144 dev_set_drvdata(dev, drvdata);
146 /* Validity for the resource is already checked by the AMBA core */
147 base = devm_ioremap_resource(dev, res);
148 if (IS_ERR(base))
149 return PTR_ERR(base);
151 drvdata->base = base;
153 /* Disable tpiu to support older devices */
154 tpiu_disable_hw(drvdata);
156 pdata = coresight_get_platform_data(dev);
157 if (IS_ERR(pdata))
158 return PTR_ERR(pdata);
159 dev->platform_data = pdata;
161 desc.type = CORESIGHT_DEV_TYPE_SINK;
162 desc.subtype.sink_subtype = CORESIGHT_DEV_SUBTYPE_SINK_PORT;
163 desc.ops = &tpiu_cs_ops;
164 desc.pdata = pdata;
165 desc.dev = dev;
166 drvdata->csdev = coresight_register(&desc);
168 if (!IS_ERR(drvdata->csdev)) {
169 pm_runtime_put(&adev->dev);
170 return 0;
173 return PTR_ERR(drvdata->csdev);
176 static int tpiu_remove(struct amba_device *adev)
178 struct tpiu_drvdata *drvdata = dev_get_drvdata(&adev->dev);
180 coresight_unregister(drvdata->csdev);
182 return 0;
185 #ifdef CONFIG_PM
186 static int tpiu_runtime_suspend(struct device *dev)
188 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
190 if (drvdata && !IS_ERR(drvdata->atclk))
191 clk_disable_unprepare(drvdata->atclk);
193 return 0;
196 static int tpiu_runtime_resume(struct device *dev)
198 struct tpiu_drvdata *drvdata = dev_get_drvdata(dev);
200 if (drvdata && !IS_ERR(drvdata->atclk))
201 clk_prepare_enable(drvdata->atclk);
203 return 0;
205 #endif
207 static const struct dev_pm_ops tpiu_dev_pm_ops = {
208 SET_RUNTIME_PM_OPS(tpiu_runtime_suspend, tpiu_runtime_resume, NULL)
211 static const struct amba_id tpiu_ids[] = {
213 .id = 0x000bb912,
214 .mask = 0x000fffff,
217 .id = 0x0004b912,
218 .mask = 0x0007ffff,
221 /* Coresight SoC-600 */
222 .id = 0x000bb9e7,
223 .mask = 0x000fffff,
225 { 0, 0},
228 MODULE_DEVICE_TABLE(amba, tpiu_ids);
230 static struct amba_driver tpiu_driver = {
231 .drv = {
232 .name = "coresight-tpiu",
233 .owner = THIS_MODULE,
234 .pm = &tpiu_dev_pm_ops,
235 .suppress_bind_attrs = true,
237 .probe = tpiu_probe,
238 .remove = tpiu_remove,
239 .id_table = tpiu_ids,
242 module_amba_driver(tpiu_driver);
244 MODULE_AUTHOR("Pratik Patel <pratikp@codeaurora.org>");
245 MODULE_AUTHOR("Mathieu Poirier <mathieu.poirier@linaro.org>");
246 MODULE_DESCRIPTION("Arm CoreSight TPIU (Trace Port Interface Unit) driver");
247 MODULE_LICENSE("GPL v2");