?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / iio / adc / ad7298.c
blob689ecd5dd563e8d4365c22c3109125a0bc7a7cf8
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD7298 SPI ADC driver
4 *
5 * Copyright 2011 Analog Devices Inc.
6 */
7
8 #include <linux/device.h>
9 #include <linux/kernel.h>
10 #include <linux/slab.h>
11 #include <linux/sysfs.h>
12 #include <linux/spi/spi.h>
13 #include <linux/regulator/consumer.h>
14 #include <linux/err.h>
15 #include <linux/delay.h>
16 #include <linux/module.h>
17 #include <linux/interrupt.h>
18 #include <linux/bitops.h>
19
20 #include <linux/iio/iio.h>
21 #include <linux/iio/sysfs.h>
22 #include <linux/iio/buffer.h>
23 #include <linux/iio/trigger_consumer.h>
24 #include <linux/iio/triggered_buffer.h>
25
26 #define AD7298_WRITE BIT(15) /* write to the control register */
27 #define AD7298_REPEAT BIT(14) /* repeated conversion enable */
28 #define AD7298_CH(x) BIT(13 - (x)) /* channel select */
29 #define AD7298_TSENSE BIT(5) /* temperature conversion enable */
30 #define AD7298_EXTREF BIT(2) /* external reference enable */
31 #define AD7298_TAVG BIT(1) /* temperature sensor averaging enable */
32 #define AD7298_PDD BIT(0) /* partial power down enable */
33
34 #define AD7298_MAX_CHAN 8
35 #define AD7298_INTREF_mV 2500
36
37 #define AD7298_CH_TEMP 9
38
39 struct ad7298_state {
40 struct spi_device *spi;
41 struct regulator *reg;
42 unsigned ext_ref;
43 struct spi_transfer ring_xfer[10];
44 struct spi_transfer scan_single_xfer[3];
45 struct spi_message ring_msg;
46 struct spi_message scan_single_msg;
47 /*
48 * DMA (thus cache coherency maintenance) requires the
49 * transfer buffers to live in their own cache lines.
50 */
51 __be16 rx_buf[12] ____cacheline_aligned;
52 __be16 tx_buf[2];
53 };
54
55 #define AD7298_V_CHAN(index) \
56 { \
57 .type = IIO_VOLTAGE, \
58 .indexed = 1, \
59 .channel = index, \
60 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
61 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
62 .address = index, \
63 .scan_index = index, \
64 .scan_type = { \
65 .sign = 'u', \
66 .realbits = 12, \
67 .storagebits = 16, \
68 .endianness = IIO_BE, \
69 }, \
70 }
71
72 static const struct iio_chan_spec ad7298_channels[] = {
73 {
74 .type = IIO_TEMP,
75 .indexed = 1,
76 .channel = 0,
77 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
78 BIT(IIO_CHAN_INFO_SCALE) |
79 BIT(IIO_CHAN_INFO_OFFSET),
80 .address = AD7298_CH_TEMP,
81 .scan_index = -1,
82 .scan_type = {
83 .sign = 's',
84 .realbits = 32,
85 .storagebits = 32,
86 },
87 },
88 AD7298_V_CHAN(0),
89 AD7298_V_CHAN(1),
90 AD7298_V_CHAN(2),
91 AD7298_V_CHAN(3),
92 AD7298_V_CHAN(4),
93 AD7298_V_CHAN(5),
94 AD7298_V_CHAN(6),
95 AD7298_V_CHAN(7),
96 IIO_CHAN_SOFT_TIMESTAMP(8),
97 };
98
99 /*
100 * ad7298_update_scan_mode() setup the spi transfer buffer for the new scan mask
101 */
102 static int ad7298_update_scan_mode(struct iio_dev *indio_dev,
103 const unsigned long *active_scan_mask)
104 {
105 struct ad7298_state *st = iio_priv(indio_dev);
106 int i, m;
107 unsigned short command;
108 int scan_count;
109
110 /* Now compute overall size */
111 scan_count = bitmap_weight(active_scan_mask, indio_dev->masklength);
112
113 command = AD7298_WRITE | st->ext_ref;
114
115 for (i = 0, m = AD7298_CH(0); i < AD7298_MAX_CHAN; i++, m >>= 1)
116 if (test_bit(i, active_scan_mask))
117 command |= m;
118
119 st->tx_buf[0] = cpu_to_be16(command);
120
121 /* build spi ring message */
122 st->ring_xfer[0].tx_buf = &st->tx_buf[0];
123 st->ring_xfer[0].len = 2;
124 st->ring_xfer[0].cs_change = 1;
125 st->ring_xfer[1].tx_buf = &st->tx_buf[1];
126 st->ring_xfer[1].len = 2;
127 st->ring_xfer[1].cs_change = 1;
128
129 spi_message_init(&st->ring_msg);
130 spi_message_add_tail(&st->ring_xfer[0], &st->ring_msg);
131 spi_message_add_tail(&st->ring_xfer[1], &st->ring_msg);
132
133 for (i = 0; i < scan_count; i++) {
134 st->ring_xfer[i + 2].rx_buf = &st->rx_buf[i];
135 st->ring_xfer[i + 2].len = 2;
136 st->ring_xfer[i + 2].cs_change = 1;
137 spi_message_add_tail(&st->ring_xfer[i + 2], &st->ring_msg);
138 }
139 /* make sure last transfer cs_change is not set */
140 st->ring_xfer[i + 1].cs_change = 0;
141
142 return 0;
143 }
144
145 /*
146 * ad7298_trigger_handler() bh of trigger launched polling to ring buffer
147 *
148 * Currently there is no option in this driver to disable the saving of
149 * timestamps within the ring.
150 */
151 static irqreturn_t ad7298_trigger_handler(int irq, void *p)
152 {
153 struct iio_poll_func *pf = p;
154 struct iio_dev *indio_dev = pf->indio_dev;
155 struct ad7298_state *st = iio_priv(indio_dev);
156 int b_sent;
157
158 b_sent = spi_sync(st->spi, &st->ring_msg);
159 if (b_sent)
160 goto done;
161
162 iio_push_to_buffers_with_timestamp(indio_dev, st->rx_buf,
163 iio_get_time_ns(indio_dev));
164
165 done:
166 iio_trigger_notify_done(indio_dev->trig);
167
168 return IRQ_HANDLED;
169 }
170
171 static int ad7298_scan_direct(struct ad7298_state *st, unsigned ch)
172 {
173 int ret;
174 st->tx_buf[0] = cpu_to_be16(AD7298_WRITE | st->ext_ref |
175 (AD7298_CH(0) >> ch));
176
177 ret = spi_sync(st->spi, &st->scan_single_msg);
178 if (ret)
179 return ret;
180
181 return be16_to_cpu(st->rx_buf[0]);
182 }
183
184 static int ad7298_scan_temp(struct ad7298_state *st, int *val)
185 {
186 int ret;
187 __be16 buf;
188
189 buf = cpu_to_be16(AD7298_WRITE | AD7298_TSENSE |
190 AD7298_TAVG | st->ext_ref);
191
192 ret = spi_write(st->spi, (u8 *)&buf, 2);
193 if (ret)
194 return ret;
195
196 buf = cpu_to_be16(0);
197
198 ret = spi_write(st->spi, (u8 *)&buf, 2);
199 if (ret)
200 return ret;
201
202 usleep_range(101, 1000); /* sleep > 100us */
203
204 ret = spi_read(st->spi, (u8 *)&buf, 2);
205 if (ret)
206 return ret;
207
208 *val = sign_extend32(be16_to_cpu(buf), 11);
209
210 return 0;
211 }
212
213 static int ad7298_get_ref_voltage(struct ad7298_state *st)
214 {
215 int vref;
216
217 if (st->reg) {
218 vref = regulator_get_voltage(st->reg);
219 if (vref < 0)
220 return vref;
221
222 return vref / 1000;
223 } else {
224 return AD7298_INTREF_mV;
225 }
226 }
227
228 static int ad7298_read_raw(struct iio_dev *indio_dev,
229 struct iio_chan_spec const *chan,
230 int *val,
231 int *val2,
232 long m)
233 {
234 int ret;
235 struct ad7298_state *st = iio_priv(indio_dev);
236
237 switch (m) {
238 case IIO_CHAN_INFO_RAW:
239 ret = iio_device_claim_direct_mode(indio_dev);
240 if (ret)
241 return ret;
242
243 if (chan->address == AD7298_CH_TEMP)
244 ret = ad7298_scan_temp(st, val);
245 else
246 ret = ad7298_scan_direct(st, chan->address);
247
248 iio_device_release_direct_mode(indio_dev);
249
250 if (ret < 0)
251 return ret;
252
253 if (chan->address != AD7298_CH_TEMP)
254 *val = ret & GENMASK(chan->scan_type.realbits - 1, 0);
255
256 return IIO_VAL_INT;
257 case IIO_CHAN_INFO_SCALE:
258 switch (chan->type) {
259 case IIO_VOLTAGE:
260 *val = ad7298_get_ref_voltage(st);
261 *val2 = chan->scan_type.realbits;
262 return IIO_VAL_FRACTIONAL_LOG2;
263 case IIO_TEMP:
264 *val = ad7298_get_ref_voltage(st);
265 *val2 = 10;
266 return IIO_VAL_FRACTIONAL;
267 default:
268 return -EINVAL;
269 }
270 case IIO_CHAN_INFO_OFFSET:
271 *val = 1093 - 2732500 / ad7298_get_ref_voltage(st);
272 return IIO_VAL_INT;
273 }
274 return -EINVAL;
275 }
276
277 static const struct iio_info ad7298_info = {
278 .read_raw = &ad7298_read_raw,
279 .update_scan_mode = ad7298_update_scan_mode,
280 };
281
282 static void ad7298_reg_disable(void *data)
283 {
284 struct regulator *reg = data;
285
286 regulator_disable(reg);
287 }
288
289 static int ad7298_probe(struct spi_device *spi)
290 {
291 struct ad7298_state *st;
292 struct iio_dev *indio_dev;
293 int ret;
294
295 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
296 if (indio_dev == NULL)
297 return -ENOMEM;
298
299 st = iio_priv(indio_dev);
300
301 st->reg = devm_regulator_get_optional(&spi->dev, "vref");
302 if (!IS_ERR(st->reg)) {
303 st->ext_ref = AD7298_EXTREF;
304 } else {
305 ret = PTR_ERR(st->reg);
306 if (ret != -ENODEV)
307 return ret;
308
309 st->reg = NULL;
310 }
311
312 if (st->reg) {
313 ret = regulator_enable(st->reg);
314 if (ret)
315 return ret;
316
317 ret = devm_add_action_or_reset(&spi->dev, ad7298_reg_disable,
318 st->reg);
319 if (ret)
320 return ret;
321 }
322
323 st->spi = spi;
324
325 indio_dev->name = spi_get_device_id(spi)->name;
326 indio_dev->modes = INDIO_DIRECT_MODE;
327 indio_dev->channels = ad7298_channels;
328 indio_dev->num_channels = ARRAY_SIZE(ad7298_channels);
329 indio_dev->info = &ad7298_info;
330
331 /* Setup default message */
332
333 st->scan_single_xfer[0].tx_buf = &st->tx_buf[0];
334 st->scan_single_xfer[0].len = 2;
335 st->scan_single_xfer[0].cs_change = 1;
336 st->scan_single_xfer[1].tx_buf = &st->tx_buf[1];
337 st->scan_single_xfer[1].len = 2;
338 st->scan_single_xfer[1].cs_change = 1;
339 st->scan_single_xfer[2].rx_buf = &st->rx_buf[0];
340 st->scan_single_xfer[2].len = 2;
341
342 spi_message_init(&st->scan_single_msg);
343 spi_message_add_tail(&st->scan_single_xfer[0], &st->scan_single_msg);
344 spi_message_add_tail(&st->scan_single_xfer[1], &st->scan_single_msg);
345 spi_message_add_tail(&st->scan_single_xfer[2], &st->scan_single_msg);
346
347 ret = devm_iio_triggered_buffer_setup(&spi->dev, indio_dev, NULL,
348 &ad7298_trigger_handler, NULL);
349 if (ret)
350 return ret;
351
352 return devm_iio_device_register(&spi->dev, indio_dev);
353 }
354
355 static const struct spi_device_id ad7298_id[] = {
356 {"ad7298", 0},
357 {}
358 };
359 MODULE_DEVICE_TABLE(spi, ad7298_id);
360
361 static struct spi_driver ad7298_driver = {
362 .driver = {
363 .name = "ad7298",
364 },
365 .probe = ad7298_probe,
366 .id_table = ad7298_id,
367 };
368 module_spi_driver(ad7298_driver);
369
370 MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
371 MODULE_DESCRIPTION("Analog Devices AD7298 ADC");
372 MODULE_LICENSE("GPL v2");
Linux with added FPC-III support