1 /*******************************************************************************
3 * Copyright (c) 2015-2016 Intel Corporation. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenFabrics.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
33 *******************************************************************************/
35 #include "i40iw_osdep.h"
36 #include "i40iw_register.h"
37 #include "i40iw_status.h"
38 #include "i40iw_hmc.h"
40 #include "i40iw_type.h"
45 * i40iw_manage_vf_pble_bp - manage vf pble
46 * @cqp: cqp for cqp' sq wqe
48 * @scratch: pointer for completion
49 * @post_sq: to post and ring
51 enum i40iw_status_code
i40iw_manage_vf_pble_bp(struct i40iw_sc_cqp
*cqp
,
52 struct i40iw_manage_vf_pble_info
*info
,
57 u64 temp
, header
, pd_pl_pba
= 0;
59 wqe
= i40iw_sc_cqp_get_next_send_wqe(cqp
, scratch
);
61 return I40IW_ERR_RING_FULL
;
63 temp
= LS_64(info
->pd_entry_cnt
, I40IW_CQPSQ_MVPBP_PD_ENTRY_CNT
) |
64 LS_64(info
->first_pd_index
, I40IW_CQPSQ_MVPBP_FIRST_PD_INX
) |
65 LS_64(info
->sd_index
, I40IW_CQPSQ_MVPBP_SD_INX
);
66 set_64bit_val(wqe
, 16, temp
);
68 header
= LS_64((info
->inv_pd_ent
? 1 : 0), I40IW_CQPSQ_MVPBP_INV_PD_ENT
) |
69 LS_64(I40IW_CQP_OP_MANAGE_VF_PBLE_BP
, I40IW_CQPSQ_OPCODE
) |
70 LS_64(cqp
->polarity
, I40IW_CQPSQ_WQEVALID
);
71 set_64bit_val(wqe
, 24, header
);
73 pd_pl_pba
= LS_64(info
->pd_pl_pba
>> 3, I40IW_CQPSQ_MVPBP_PD_PLPBA
);
74 set_64bit_val(wqe
, 32, pd_pl_pba
);
76 i40iw_debug_buf(cqp
->dev
, I40IW_DEBUG_WQE
, "MANAGE VF_PBLE_BP WQE", wqe
, I40IW_CQP_WQE_SIZE
* 8);
79 i40iw_sc_cqp_post_sq(cqp
);
83 const struct i40iw_vf_cqp_ops iw_vf_cqp_ops
= {
84 i40iw_manage_vf_pble_bp