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Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / media / pci / ddbridge / ddbridge-core.c
blob92fe051c672f603606e4d9abcc2d451683d0cbdc
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ddbridge-core.c: Digital Devices bridge core functions
4 *
5 * Copyright (C) 2010-2017 Digital Devices GmbH
6 * Marcus Metzler <mocm@metzlerbros.de>
7 * Ralph Metzler <rjkm@metzlerbros.de>
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * version 2 only, as published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 */
18
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/interrupt.h>
22 #include <linux/delay.h>
23 #include <linux/slab.h>
24 #include <linux/poll.h>
25 #include <linux/io.h>
26 #include <linux/pci.h>
27 #include <linux/pci_ids.h>
28 #include <linux/timer.h>
29 #include <linux/i2c.h>
30 #include <linux/swab.h>
31 #include <linux/vmalloc.h>
32
33 #include "ddbridge.h"
34 #include "ddbridge-i2c.h"
35 #include "ddbridge-regs.h"
36 #include "ddbridge-max.h"
37 #include "ddbridge-ci.h"
38 #include "ddbridge-io.h"
39
40 #include "tda18271c2dd.h"
41 #include "stv6110x.h"
42 #include "stv090x.h"
43 #include "lnbh24.h"
44 #include "drxk.h"
45 #include "stv0367.h"
46 #include "stv0367_priv.h"
47 #include "cxd2841er.h"
48 #include "tda18212.h"
49 #include "stv0910.h"
50 #include "stv6111.h"
51 #include "lnbh25.h"
52 #include "cxd2099.h"
53 #include "ddbridge-dummy-fe.h"
54
55 /****************************************************************************/
56
57 #define DDB_MAX_ADAPTER 64
58
59 /****************************************************************************/
60
61 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
62
63 static int adapter_alloc;
64 module_param(adapter_alloc, int, 0444);
65 MODULE_PARM_DESC(adapter_alloc,
66 "0-one adapter per io, 1-one per tab with io, 2-one per tab, 3-one for all");
67
68 static int ci_bitrate = 70000;
69 module_param(ci_bitrate, int, 0444);
70 MODULE_PARM_DESC(ci_bitrate, " Bitrate in KHz for output to CI.");
71
72 static int ts_loop = -1;
73 module_param(ts_loop, int, 0444);
74 MODULE_PARM_DESC(ts_loop, "TS in/out test loop on port ts_loop");
75
76 static int xo2_speed = 2;
77 module_param(xo2_speed, int, 0444);
78 MODULE_PARM_DESC(xo2_speed, "default transfer speed for xo2 based duoflex, 0=55,1=75,2=90,3=104 MBit/s, default=2, use attribute to change for individual cards");
79
80 #ifdef __arm__
81 static int alt_dma = 1;
82 #else
83 static int alt_dma;
84 #endif
85 module_param(alt_dma, int, 0444);
86 MODULE_PARM_DESC(alt_dma, "use alternative DMA buffer handling");
87
88 static int no_init;
89 module_param(no_init, int, 0444);
90 MODULE_PARM_DESC(no_init, "do not initialize most devices");
91
92 static int stv0910_single;
93 module_param(stv0910_single, int, 0444);
94 MODULE_PARM_DESC(stv0910_single, "use stv0910 cards as single demods");
95
96 static int dma_buf_num = 8;
97 module_param(dma_buf_num, int, 0444);
98 MODULE_PARM_DESC(dma_buf_num, "Number of DMA buffers, possible values: 8-32");
99
100 static int dma_buf_size = 21;
101 module_param(dma_buf_size, int, 0444);
102 MODULE_PARM_DESC(dma_buf_size,
103 "DMA buffer size as multiple of 128*47, possible values: 1-43");
104
105 static int dummy_tuner;
106 module_param(dummy_tuner, int, 0444);
107 MODULE_PARM_DESC(dummy_tuner,
108 "attach dummy tuner to port 0 on Octopus V3 or Octopus Mini cards");
109
110 /****************************************************************************/
111
112 static DEFINE_MUTEX(redirect_lock);
113
114 static struct workqueue_struct *ddb_wq;
115
116 static struct ddb *ddbs[DDB_MAX_ADAPTER];
117
118 /****************************************************************************/
119 /****************************************************************************/
120 /****************************************************************************/
121
122 struct ddb_irq *ddb_irq_set(struct ddb *dev, u32 link, u32 nr,
123 void (*handler)(void *), void *data)
124 {
125 struct ddb_irq *irq = &dev->link[link].irq[nr];
126
127 irq->handler = handler;
128 irq->data = data;
129 return irq;
130 }
131
132 static void ddb_set_dma_table(struct ddb_io *io)
133 {
134 struct ddb *dev = io->port->dev;
135 struct ddb_dma *dma = io->dma;
136 u32 i;
137 u64 mem;
138
139 if (!dma)
140 return;
141 for (i = 0; i < dma->num; i++) {
142 mem = dma->pbuf[i];
143 ddbwritel(dev, mem & 0xffffffff, dma->bufregs + i * 8);
144 ddbwritel(dev, mem >> 32, dma->bufregs + i * 8 + 4);
145 }
146 dma->bufval = ((dma->div & 0x0f) << 16) |
147 ((dma->num & 0x1f) << 11) |
148 ((dma->size >> 7) & 0x7ff);
149 }
150
151 static void ddb_set_dma_tables(struct ddb *dev)
152 {
153 u32 i;
154
155 for (i = 0; i < DDB_MAX_PORT; i++) {
156 if (dev->port[i].input[0])
157 ddb_set_dma_table(dev->port[i].input[0]);
158 if (dev->port[i].input[1])
159 ddb_set_dma_table(dev->port[i].input[1]);
160 if (dev->port[i].output)
161 ddb_set_dma_table(dev->port[i].output);
162 }
163 }
164
165 /****************************************************************************/
166 /****************************************************************************/
167 /****************************************************************************/
168
169 static void ddb_redirect_dma(struct ddb *dev,
170 struct ddb_dma *sdma,
171 struct ddb_dma *ddma)
172 {
173 u32 i, base;
174 u64 mem;
175
176 sdma->bufval = ddma->bufval;
177 base = sdma->bufregs;
178 for (i = 0; i < ddma->num; i++) {
179 mem = ddma->pbuf[i];
180 ddbwritel(dev, mem & 0xffffffff, base + i * 8);
181 ddbwritel(dev, mem >> 32, base + i * 8 + 4);
182 }
183 }
184
185 static int ddb_unredirect(struct ddb_port *port)
186 {
187 struct ddb_input *oredi, *iredi = NULL;
188 struct ddb_output *iredo = NULL;
189
190 /* dev_info(port->dev->dev,
191 * "unredirect %d.%d\n", port->dev->nr, port->nr);
192 */
193 mutex_lock(&redirect_lock);
194 if (port->output->dma->running) {
195 mutex_unlock(&redirect_lock);
196 return -EBUSY;
197 }
198 oredi = port->output->redi;
199 if (!oredi)
200 goto done;
201 if (port->input[0]) {
202 iredi = port->input[0]->redi;
203 iredo = port->input[0]->redo;
204
205 if (iredo) {
206 iredo->port->output->redi = oredi;
207 if (iredo->port->input[0]) {
208 iredo->port->input[0]->redi = iredi;
209 ddb_redirect_dma(oredi->port->dev,
210 oredi->dma, iredo->dma);
211 }
212 port->input[0]->redo = NULL;
213 ddb_set_dma_table(port->input[0]);
214 }
215 oredi->redi = iredi;
216 port->input[0]->redi = NULL;
217 }
218 oredi->redo = NULL;
219 port->output->redi = NULL;
220
221 ddb_set_dma_table(oredi);
222 done:
223 mutex_unlock(&redirect_lock);
224 return 0;
225 }
226
227 static int ddb_redirect(u32 i, u32 p)
228 {
229 struct ddb *idev = ddbs[(i >> 4) & 0x3f];
230 struct ddb_input *input, *input2;
231 struct ddb *pdev = ddbs[(p >> 4) & 0x3f];
232 struct ddb_port *port;
233
234 if (!idev || !pdev)
235 return -EINVAL;
236 if (!idev->has_dma || !pdev->has_dma)
237 return -EINVAL;
238
239 port = &pdev->port[p & 0x0f];
240 if (!port->output)
241 return -EINVAL;
242 if (ddb_unredirect(port))
243 return -EBUSY;
244
245 if (i == 8)
246 return 0;
247
248 input = &idev->input[i & 7];
249 if (!input)
250 return -EINVAL;
251
252 mutex_lock(&redirect_lock);
253 if (port->output->dma->running || input->dma->running) {
254 mutex_unlock(&redirect_lock);
255 return -EBUSY;
256 }
257 input2 = port->input[0];
258 if (input2) {
259 if (input->redi) {
260 input2->redi = input->redi;
261 input->redi = NULL;
262 } else {
263 input2->redi = input;
264 }
265 }
266 input->redo = port->output;
267 port->output->redi = input;
268
269 ddb_redirect_dma(input->port->dev, input->dma, port->output->dma);
270 mutex_unlock(&redirect_lock);
271 return 0;
272 }
273
274 /****************************************************************************/
275 /****************************************************************************/
276 /****************************************************************************/
277
278 static void dma_free(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
279 {
280 int i;
281
282 if (!dma)
283 return;
284 for (i = 0; i < dma->num; i++) {
285 if (dma->vbuf[i]) {
286 if (alt_dma) {
287 dma_unmap_single(&pdev->dev, dma->pbuf[i],
288 dma->size,
289 dir ? DMA_TO_DEVICE :
290 DMA_FROM_DEVICE);
291 kfree(dma->vbuf[i]);
292 dma->vbuf[i] = NULL;
293 } else {
294 dma_free_coherent(&pdev->dev, dma->size,
295 dma->vbuf[i], dma->pbuf[i]);
296 }
297
298 dma->vbuf[i] = NULL;
299 }
300 }
301 }
302
303 static int dma_alloc(struct pci_dev *pdev, struct ddb_dma *dma, int dir)
304 {
305 int i;
306
307 if (!dma)
308 return 0;
309 for (i = 0; i < dma->num; i++) {
310 if (alt_dma) {
311 dma->vbuf[i] = kmalloc(dma->size, __GFP_RETRY_MAYFAIL);
312 if (!dma->vbuf[i])
313 return -ENOMEM;
314 dma->pbuf[i] = dma_map_single(&pdev->dev,
315 dma->vbuf[i],
316 dma->size,
317 dir ? DMA_TO_DEVICE :
318 DMA_FROM_DEVICE);
319 if (dma_mapping_error(&pdev->dev, dma->pbuf[i])) {
320 kfree(dma->vbuf[i]);
321 dma->vbuf[i] = NULL;
322 return -ENOMEM;
323 }
324 } else {
325 dma->vbuf[i] = dma_alloc_coherent(&pdev->dev,
326 dma->size,
327 &dma->pbuf[i],
328 GFP_KERNEL);
329 if (!dma->vbuf[i])
330 return -ENOMEM;
331 }
332 }
333 return 0;
334 }
335
336 int ddb_buffers_alloc(struct ddb *dev)
337 {
338 int i;
339 struct ddb_port *port;
340
341 for (i = 0; i < dev->port_num; i++) {
342 port = &dev->port[i];
343 switch (port->class) {
344 case DDB_PORT_TUNER:
345 if (port->input[0]->dma)
346 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
347 < 0)
348 return -1;
349 if (port->input[1]->dma)
350 if (dma_alloc(dev->pdev, port->input[1]->dma, 0)
351 < 0)
352 return -1;
353 break;
354 case DDB_PORT_CI:
355 case DDB_PORT_LOOP:
356 if (port->input[0]->dma)
357 if (dma_alloc(dev->pdev, port->input[0]->dma, 0)
358 < 0)
359 return -1;
360 if (port->output->dma)
361 if (dma_alloc(dev->pdev, port->output->dma, 1)
362 < 0)
363 return -1;
364 break;
365 default:
366 break;
367 }
368 }
369 ddb_set_dma_tables(dev);
370 return 0;
371 }
372
373 void ddb_buffers_free(struct ddb *dev)
374 {
375 int i;
376 struct ddb_port *port;
377
378 for (i = 0; i < dev->port_num; i++) {
379 port = &dev->port[i];
380
381 if (port->input[0] && port->input[0]->dma)
382 dma_free(dev->pdev, port->input[0]->dma, 0);
383 if (port->input[1] && port->input[1]->dma)
384 dma_free(dev->pdev, port->input[1]->dma, 0);
385 if (port->output && port->output->dma)
386 dma_free(dev->pdev, port->output->dma, 1);
387 }
388 }
389
390 static void calc_con(struct ddb_output *output, u32 *con, u32 *con2, u32 flags)
391 {
392 struct ddb *dev = output->port->dev;
393 u32 bitrate = output->port->obr, max_bitrate = 72000;
394 u32 gap = 4, nco = 0;
395
396 *con = 0x1c;
397 if (output->port->gap != 0xffffffff) {
398 flags |= 1;
399 gap = output->port->gap;
400 max_bitrate = 0;
401 }
402 if (dev->link[0].info->type == DDB_OCTOPUS_CI && output->port->nr > 1) {
403 *con = 0x10c;
404 if (dev->link[0].ids.regmapid >= 0x10003 && !(flags & 1)) {
405 if (!(flags & 2)) {
406 /* NCO */
407 max_bitrate = 0;
408 gap = 0;
409 if (bitrate != 72000) {
410 if (bitrate >= 96000) {
411 *con |= 0x800;
412 } else {
413 *con |= 0x1000;
414 nco = (bitrate * 8192 + 71999)
415 / 72000;
416 }
417 }
418 } else {
419 /* Divider and gap */
420 *con |= 0x1810;
421 if (bitrate <= 64000) {
422 max_bitrate = 64000;
423 nco = 8;
424 } else if (bitrate <= 72000) {
425 max_bitrate = 72000;
426 nco = 7;
427 } else {
428 max_bitrate = 96000;
429 nco = 5;
430 }
431 }
432 } else {
433 if (bitrate > 72000) {
434 *con |= 0x810; /* 96 MBit/s and gap */
435 max_bitrate = 96000;
436 }
437 *con |= 0x10; /* enable gap */
438 }
439 }
440 if (max_bitrate > 0) {
441 if (bitrate > max_bitrate)
442 bitrate = max_bitrate;
443 if (bitrate < 31000)
444 bitrate = 31000;
445 gap = ((max_bitrate - bitrate) * 94) / bitrate;
446 if (gap < 2)
447 *con &= ~0x10; /* Disable gap */
448 else
449 gap -= 2;
450 if (gap > 127)
451 gap = 127;
452 }
453
454 *con2 = (nco << 16) | gap;
455 }
456
457 static void ddb_output_start(struct ddb_output *output)
458 {
459 struct ddb *dev = output->port->dev;
460 u32 con = 0x11c, con2 = 0;
461
462 spin_lock_irq(&output->dma->lock);
463 output->dma->cbuf = 0;
464 output->dma->coff = 0;
465 output->dma->stat = 0;
466 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
467
468 if (output->port->input[0]->port->class == DDB_PORT_LOOP)
469 con = (1UL << 13) | 0x14;
470 else
471 calc_con(output, &con, &con2, 0);
472
473 ddbwritel(dev, 0, TS_CONTROL(output));
474 ddbwritel(dev, 2, TS_CONTROL(output));
475 ddbwritel(dev, 0, TS_CONTROL(output));
476 ddbwritel(dev, con, TS_CONTROL(output));
477 ddbwritel(dev, con2, TS_CONTROL2(output));
478
479 ddbwritel(dev, output->dma->bufval,
480 DMA_BUFFER_SIZE(output->dma));
481 ddbwritel(dev, 0, DMA_BUFFER_ACK(output->dma));
482 ddbwritel(dev, 1, DMA_BASE_READ);
483 ddbwritel(dev, 7, DMA_BUFFER_CONTROL(output->dma));
484
485 ddbwritel(dev, con | 1, TS_CONTROL(output));
486
487 output->dma->running = 1;
488 spin_unlock_irq(&output->dma->lock);
489 }
490
491 static void ddb_output_stop(struct ddb_output *output)
492 {
493 struct ddb *dev = output->port->dev;
494
495 spin_lock_irq(&output->dma->lock);
496
497 ddbwritel(dev, 0, TS_CONTROL(output));
498
499 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(output->dma));
500 output->dma->running = 0;
501 spin_unlock_irq(&output->dma->lock);
502 }
503
504 static void ddb_input_stop(struct ddb_input *input)
505 {
506 struct ddb *dev = input->port->dev;
507 u32 tag = DDB_LINK_TAG(input->port->lnr);
508
509 spin_lock_irq(&input->dma->lock);
510
511 ddbwritel(dev, 0, tag | TS_CONTROL(input));
512
513 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
514 input->dma->running = 0;
515 spin_unlock_irq(&input->dma->lock);
516 }
517
518 static void ddb_input_start(struct ddb_input *input)
519 {
520 struct ddb *dev = input->port->dev;
521
522 spin_lock_irq(&input->dma->lock);
523 input->dma->cbuf = 0;
524 input->dma->coff = 0;
525 input->dma->stat = 0;
526 ddbwritel(dev, 0, DMA_BUFFER_CONTROL(input->dma));
527
528 ddbwritel(dev, 0, TS_CONTROL(input));
529 ddbwritel(dev, 2, TS_CONTROL(input));
530 ddbwritel(dev, 0, TS_CONTROL(input));
531
532 ddbwritel(dev, input->dma->bufval,
533 DMA_BUFFER_SIZE(input->dma));
534 ddbwritel(dev, 0, DMA_BUFFER_ACK(input->dma));
535 ddbwritel(dev, 1, DMA_BASE_WRITE);
536 ddbwritel(dev, 3, DMA_BUFFER_CONTROL(input->dma));
537
538 ddbwritel(dev, 0x09, TS_CONTROL(input));
539
540 if (input->port->type == DDB_TUNER_DUMMY)
541 ddbwritel(dev, 0x000fff01, TS_CONTROL2(input));
542
543 input->dma->running = 1;
544 spin_unlock_irq(&input->dma->lock);
545 }
546
547 static void ddb_input_start_all(struct ddb_input *input)
548 {
549 struct ddb_input *i = input;
550 struct ddb_output *o;
551
552 mutex_lock(&redirect_lock);
553 while (i && (o = i->redo)) {
554 ddb_output_start(o);
555 i = o->port->input[0];
556 if (i)
557 ddb_input_start(i);
558 }
559 ddb_input_start(input);
560 mutex_unlock(&redirect_lock);
561 }
562
563 static void ddb_input_stop_all(struct ddb_input *input)
564 {
565 struct ddb_input *i = input;
566 struct ddb_output *o;
567
568 mutex_lock(&redirect_lock);
569 ddb_input_stop(input);
570 while (i && (o = i->redo)) {
571 ddb_output_stop(o);
572 i = o->port->input[0];
573 if (i)
574 ddb_input_stop(i);
575 }
576 mutex_unlock(&redirect_lock);
577 }
578
579 static u32 ddb_output_free(struct ddb_output *output)
580 {
581 u32 idx, off, stat = output->dma->stat;
582 s32 diff;
583
584 idx = (stat >> 11) & 0x1f;
585 off = (stat & 0x7ff) << 7;
586
587 if (output->dma->cbuf != idx) {
588 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
589 (output->dma->size - output->dma->coff <= (2 * 188)))
590 return 0;
591 return 188;
592 }
593 diff = off - output->dma->coff;
594 if (diff <= 0 || diff > (2 * 188))
595 return 188;
596 return 0;
597 }
598
599 static ssize_t ddb_output_write(struct ddb_output *output,
600 const __user u8 *buf, size_t count)
601 {
602 struct ddb *dev = output->port->dev;
603 u32 idx, off, stat = output->dma->stat;
604 u32 left = count, len;
605
606 idx = (stat >> 11) & 0x1f;
607 off = (stat & 0x7ff) << 7;
608
609 while (left) {
610 len = output->dma->size - output->dma->coff;
611 if ((((output->dma->cbuf + 1) % output->dma->num) == idx) &&
612 off == 0) {
613 if (len <= 188)
614 break;
615 len -= 188;
616 }
617 if (output->dma->cbuf == idx) {
618 if (off > output->dma->coff) {
619 len = off - output->dma->coff;
620 len -= (len % 188);
621 if (len <= 188)
622 break;
623 len -= 188;
624 }
625 }
626 if (len > left)
627 len = left;
628 if (copy_from_user(output->dma->vbuf[output->dma->cbuf] +
629 output->dma->coff,
630 buf, len))
631 return -EIO;
632 if (alt_dma)
633 dma_sync_single_for_device(
634 dev->dev,
635 output->dma->pbuf[output->dma->cbuf],
636 output->dma->size, DMA_TO_DEVICE);
637 left -= len;
638 buf += len;
639 output->dma->coff += len;
640 if (output->dma->coff == output->dma->size) {
641 output->dma->coff = 0;
642 output->dma->cbuf = ((output->dma->cbuf + 1) %
643 output->dma->num);
644 }
645 ddbwritel(dev,
646 (output->dma->cbuf << 11) |
647 (output->dma->coff >> 7),
648 DMA_BUFFER_ACK(output->dma));
649 }
650 return count - left;
651 }
652
653 static u32 ddb_input_avail(struct ddb_input *input)
654 {
655 struct ddb *dev = input->port->dev;
656 u32 idx, off, stat = input->dma->stat;
657 u32 ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(input->dma));
658
659 idx = (stat >> 11) & 0x1f;
660 off = (stat & 0x7ff) << 7;
661
662 if (ctrl & 4) {
663 dev_err(dev->dev, "IA %d %d %08x\n", idx, off, ctrl);
664 ddbwritel(dev, stat, DMA_BUFFER_ACK(input->dma));
665 return 0;
666 }
667 if (input->dma->cbuf != idx)
668 return 188;
669 return 0;
670 }
671
672 static ssize_t ddb_input_read(struct ddb_input *input,
673 __user u8 *buf, size_t count)
674 {
675 struct ddb *dev = input->port->dev;
676 u32 left = count;
677 u32 idx, free, stat = input->dma->stat;
678 int ret;
679
680 idx = (stat >> 11) & 0x1f;
681
682 while (left) {
683 if (input->dma->cbuf == idx)
684 return count - left;
685 free = input->dma->size - input->dma->coff;
686 if (free > left)
687 free = left;
688 if (alt_dma)
689 dma_sync_single_for_cpu(
690 dev->dev,
691 input->dma->pbuf[input->dma->cbuf],
692 input->dma->size, DMA_FROM_DEVICE);
693 ret = copy_to_user(buf, input->dma->vbuf[input->dma->cbuf] +
694 input->dma->coff, free);
695 if (ret)
696 return -EFAULT;
697 input->dma->coff += free;
698 if (input->dma->coff == input->dma->size) {
699 input->dma->coff = 0;
700 input->dma->cbuf = (input->dma->cbuf + 1) %
701 input->dma->num;
702 }
703 left -= free;
704 buf += free;
705 ddbwritel(dev,
706 (input->dma->cbuf << 11) | (input->dma->coff >> 7),
707 DMA_BUFFER_ACK(input->dma));
708 }
709 return count;
710 }
711
712 /****************************************************************************/
713 /****************************************************************************/
714
715 static ssize_t ts_write(struct file *file, const __user char *buf,
716 size_t count, loff_t *ppos)
717 {
718 struct dvb_device *dvbdev = file->private_data;
719 struct ddb_output *output = dvbdev->priv;
720 struct ddb *dev = output->port->dev;
721 size_t left = count;
722 int stat;
723
724 if (!dev->has_dma)
725 return -EINVAL;
726 while (left) {
727 if (ddb_output_free(output) < 188) {
728 if (file->f_flags & O_NONBLOCK)
729 break;
730 if (wait_event_interruptible(
731 output->dma->wq,
732 ddb_output_free(output) >= 188) < 0)
733 break;
734 }
735 stat = ddb_output_write(output, buf, left);
736 if (stat < 0)
737 return stat;
738 buf += stat;
739 left -= stat;
740 }
741 return (left == count) ? -EAGAIN : (count - left);
742 }
743
744 static ssize_t ts_read(struct file *file, __user char *buf,
745 size_t count, loff_t *ppos)
746 {
747 struct dvb_device *dvbdev = file->private_data;
748 struct ddb_output *output = dvbdev->priv;
749 struct ddb_input *input = output->port->input[0];
750 struct ddb *dev = output->port->dev;
751 size_t left = count;
752 int stat;
753
754 if (!dev->has_dma)
755 return -EINVAL;
756 while (left) {
757 if (ddb_input_avail(input) < 188) {
758 if (file->f_flags & O_NONBLOCK)
759 break;
760 if (wait_event_interruptible(
761 input->dma->wq,
762 ddb_input_avail(input) >= 188) < 0)
763 break;
764 }
765 stat = ddb_input_read(input, buf, left);
766 if (stat < 0)
767 return stat;
768 left -= stat;
769 buf += stat;
770 }
771 return (count && (left == count)) ? -EAGAIN : (count - left);
772 }
773
774 static __poll_t ts_poll(struct file *file, poll_table *wait)
775 {
776 struct dvb_device *dvbdev = file->private_data;
777 struct ddb_output *output = dvbdev->priv;
778 struct ddb_input *input = output->port->input[0];
779
780 __poll_t mask = 0;
781
782 poll_wait(file, &input->dma->wq, wait);
783 poll_wait(file, &output->dma->wq, wait);
784 if (ddb_input_avail(input) >= 188)
785 mask |= EPOLLIN | EPOLLRDNORM;
786 if (ddb_output_free(output) >= 188)
787 mask |= EPOLLOUT | EPOLLWRNORM;
788 return mask;
789 }
790
791 static int ts_release(struct inode *inode, struct file *file)
792 {
793 struct dvb_device *dvbdev = file->private_data;
794 struct ddb_output *output = NULL;
795 struct ddb_input *input = NULL;
796
797 if (dvbdev) {
798 output = dvbdev->priv;
799 input = output->port->input[0];
800 }
801
802 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
803 if (!input)
804 return -EINVAL;
805 ddb_input_stop(input);
806 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
807 if (!output)
808 return -EINVAL;
809 ddb_output_stop(output);
810 }
811 return dvb_generic_release(inode, file);
812 }
813
814 static int ts_open(struct inode *inode, struct file *file)
815 {
816 int err;
817 struct dvb_device *dvbdev = file->private_data;
818 struct ddb_output *output = NULL;
819 struct ddb_input *input = NULL;
820
821 if (dvbdev) {
822 output = dvbdev->priv;
823 input = output->port->input[0];
824 }
825
826 if ((file->f_flags & O_ACCMODE) == O_RDONLY) {
827 if (!input)
828 return -EINVAL;
829 if (input->redo || input->redi)
830 return -EBUSY;
831 } else if ((file->f_flags & O_ACCMODE) == O_WRONLY) {
832 if (!output)
833 return -EINVAL;
834 } else {
835 return -EINVAL;
836 }
837
838 err = dvb_generic_open(inode, file);
839 if (err < 0)
840 return err;
841 if ((file->f_flags & O_ACCMODE) == O_RDONLY)
842 ddb_input_start(input);
843 else if ((file->f_flags & O_ACCMODE) == O_WRONLY)
844 ddb_output_start(output);
845 return err;
846 }
847
848 static const struct file_operations ci_fops = {
849 .owner = THIS_MODULE,
850 .read = ts_read,
851 .write = ts_write,
852 .open = ts_open,
853 .release = ts_release,
854 .poll = ts_poll,
855 .mmap = NULL,
856 };
857
858 static struct dvb_device dvbdev_ci = {
859 .priv = NULL,
860 .readers = 1,
861 .writers = 1,
862 .users = 2,
863 .fops = &ci_fops,
864 };
865
866 /****************************************************************************/
867 /****************************************************************************/
868
869 static int locked_gate_ctrl(struct dvb_frontend *fe, int enable)
870 {
871 struct ddb_input *input = fe->sec_priv;
872 struct ddb_port *port = input->port;
873 struct ddb_dvb *dvb = &port->dvb[input->nr & 1];
874 int status;
875
876 if (enable) {
877 mutex_lock(&port->i2c_gate_lock);
878 status = dvb->i2c_gate_ctrl(fe, 1);
879 } else {
880 status = dvb->i2c_gate_ctrl(fe, 0);
881 mutex_unlock(&port->i2c_gate_lock);
882 }
883 return status;
884 }
885
886 static int demod_attach_drxk(struct ddb_input *input)
887 {
888 struct i2c_adapter *i2c = &input->port->i2c->adap;
889 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
890 struct device *dev = input->port->dev->dev;
891 struct drxk_config config;
892
893 memset(&config, 0, sizeof(config));
894 config.adr = 0x29 + (input->nr & 1);
895 config.microcode_name = "drxk_a3.mc";
896
897 dvb->fe = dvb_attach(drxk_attach, &config, i2c);
898 if (!dvb->fe) {
899 dev_err(dev, "No DRXK found!\n");
900 return -ENODEV;
901 }
902 dvb->fe->sec_priv = input;
903 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
904 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
905 return 0;
906 }
907
908 static int tuner_attach_tda18271(struct ddb_input *input)
909 {
910 struct i2c_adapter *i2c = &input->port->i2c->adap;
911 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
912 struct device *dev = input->port->dev->dev;
913 struct dvb_frontend *fe;
914
915 if (dvb->fe->ops.i2c_gate_ctrl)
916 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
917 fe = dvb_attach(tda18271c2dd_attach, dvb->fe, i2c, 0x60);
918 if (dvb->fe->ops.i2c_gate_ctrl)
919 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
920 if (!fe) {
921 dev_err(dev, "No TDA18271 found!\n");
922 return -ENODEV;
923 }
924 return 0;
925 }
926
927 /******************************************************************************/
928 /******************************************************************************/
929 /******************************************************************************/
930
931 static struct stv0367_config ddb_stv0367_config[] = {
932 {
933 .demod_address = 0x1f,
934 .xtal = 27000000,
935 .if_khz = 0,
936 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
937 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
938 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
939 }, {
940 .demod_address = 0x1e,
941 .xtal = 27000000,
942 .if_khz = 0,
943 .if_iq_mode = FE_TER_NORMAL_IF_TUNER,
944 .ts_mode = STV0367_SERIAL_PUNCT_CLOCK,
945 .clk_pol = STV0367_CLOCKPOLARITY_DEFAULT,
946 },
947 };
948
949 static int demod_attach_stv0367(struct ddb_input *input)
950 {
951 struct i2c_adapter *i2c = &input->port->i2c->adap;
952 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
953 struct device *dev = input->port->dev->dev;
954
955 /* attach frontend */
956 dvb->fe = dvb_attach(stv0367ddb_attach,
957 &ddb_stv0367_config[(input->nr & 1)], i2c);
958
959 if (!dvb->fe) {
960 dev_err(dev, "No stv0367 found!\n");
961 return -ENODEV;
962 }
963 dvb->fe->sec_priv = input;
964 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
965 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
966 return 0;
967 }
968
969 static int tuner_tda18212_ping(struct ddb_input *input, unsigned short adr)
970 {
971 struct i2c_adapter *adapter = &input->port->i2c->adap;
972 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
973 struct device *dev = input->port->dev->dev;
974 u8 tda_id[2];
975 u8 subaddr = 0x00;
976
977 dev_dbg(dev, "stv0367-tda18212 tuner ping\n");
978 if (dvb->fe->ops.i2c_gate_ctrl)
979 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 1);
980
981 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
982 dev_dbg(dev, "tda18212 ping 1 fail\n");
983 if (i2c_read_regs(adapter, adr, subaddr, tda_id, sizeof(tda_id)) < 0)
984 dev_warn(dev, "tda18212 ping failed, expect problems\n");
985
986 if (dvb->fe->ops.i2c_gate_ctrl)
987 dvb->fe->ops.i2c_gate_ctrl(dvb->fe, 0);
988
989 return 0;
990 }
991
992 static int demod_attach_cxd28xx(struct ddb_input *input, int par, int osc24)
993 {
994 struct i2c_adapter *i2c = &input->port->i2c->adap;
995 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
996 struct device *dev = input->port->dev->dev;
997 struct cxd2841er_config cfg;
998
999 /* the cxd2841er driver expects 8bit/shifted I2C addresses */
1000 cfg.i2c_addr = ((input->nr & 1) ? 0x6d : 0x6c) << 1;
1001
1002 cfg.xtal = osc24 ? SONY_XTAL_24000 : SONY_XTAL_20500;
1003 cfg.flags = CXD2841ER_AUTO_IFHZ | CXD2841ER_EARLY_TUNE |
1004 CXD2841ER_NO_WAIT_LOCK | CXD2841ER_NO_AGCNEG |
1005 CXD2841ER_TSBITS;
1006
1007 if (!par)
1008 cfg.flags |= CXD2841ER_TS_SERIAL;
1009
1010 /* attach frontend */
1011 dvb->fe = dvb_attach(cxd2841er_attach_t_c, &cfg, i2c);
1012
1013 if (!dvb->fe) {
1014 dev_err(dev, "No cxd2837/38/43/54 found!\n");
1015 return -ENODEV;
1016 }
1017 dvb->fe->sec_priv = input;
1018 dvb->i2c_gate_ctrl = dvb->fe->ops.i2c_gate_ctrl;
1019 dvb->fe->ops.i2c_gate_ctrl = locked_gate_ctrl;
1020 return 0;
1021 }
1022
1023 static int tuner_attach_tda18212(struct ddb_input *input, u32 porttype)
1024 {
1025 struct i2c_adapter *adapter = &input->port->i2c->adap;
1026 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1027 struct device *dev = input->port->dev->dev;
1028 struct i2c_client *client;
1029 struct tda18212_config config = {
1030 .fe = dvb->fe,
1031 .if_dvbt_6 = 3550,
1032 .if_dvbt_7 = 3700,
1033 .if_dvbt_8 = 4150,
1034 .if_dvbt2_6 = 3250,
1035 .if_dvbt2_7 = 4000,
1036 .if_dvbt2_8 = 4000,
1037 .if_dvbc = 5000,
1038 };
1039 u8 addr = (input->nr & 1) ? 0x63 : 0x60;
1040
1041 /* due to a hardware quirk with the I2C gate on the stv0367+tda18212
1042 * combo, the tda18212 must be probed by reading it's id _twice_ when
1043 * cold started, or it very likely will fail.
1044 */
1045 if (porttype == DDB_TUNER_DVBCT_ST)
1046 tuner_tda18212_ping(input, addr);
1047
1048 /* perform tuner probe/init/attach */
1049 client = dvb_module_probe("tda18212", NULL, adapter, addr, &config);
1050 if (!client)
1051 goto err;
1052
1053 dvb->i2c_client[0] = client;
1054 return 0;
1055 err:
1056 dev_err(dev, "TDA18212 tuner not found. Device is not fully operational.\n");
1057 return -ENODEV;
1058 }
1059
1060 /****************************************************************************/
1061 /****************************************************************************/
1062 /****************************************************************************/
1063
1064 static struct stv090x_config stv0900 = {
1065 .device = STV0900,
1066 .demod_mode = STV090x_DUAL,
1067 .clk_mode = STV090x_CLK_EXT,
1068
1069 .xtal = 27000000,
1070 .address = 0x69,
1071
1072 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1073 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1074
1075 .ts1_tei = 1,
1076 .ts2_tei = 1,
1077
1078 .repeater_level = STV090x_RPTLEVEL_16,
1079
1080 .adc1_range = STV090x_ADC_1Vpp,
1081 .adc2_range = STV090x_ADC_1Vpp,
1082
1083 .diseqc_envelope_mode = true,
1084 };
1085
1086 static struct stv090x_config stv0900_aa = {
1087 .device = STV0900,
1088 .demod_mode = STV090x_DUAL,
1089 .clk_mode = STV090x_CLK_EXT,
1090
1091 .xtal = 27000000,
1092 .address = 0x68,
1093
1094 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1095 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
1096
1097 .ts1_tei = 1,
1098 .ts2_tei = 1,
1099
1100 .repeater_level = STV090x_RPTLEVEL_16,
1101
1102 .adc1_range = STV090x_ADC_1Vpp,
1103 .adc2_range = STV090x_ADC_1Vpp,
1104
1105 .diseqc_envelope_mode = true,
1106 };
1107
1108 static struct stv6110x_config stv6110a = {
1109 .addr = 0x60,
1110 .refclk = 27000000,
1111 .clk_div = 1,
1112 };
1113
1114 static struct stv6110x_config stv6110b = {
1115 .addr = 0x63,
1116 .refclk = 27000000,
1117 .clk_div = 1,
1118 };
1119
1120 static int demod_attach_stv0900(struct ddb_input *input, int type)
1121 {
1122 struct i2c_adapter *i2c = &input->port->i2c->adap;
1123 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1124 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1125 struct device *dev = input->port->dev->dev;
1126
1127 dvb->fe = dvb_attach(stv090x_attach, feconf, i2c,
1128 (input->nr & 1) ? STV090x_DEMODULATOR_1
1129 : STV090x_DEMODULATOR_0);
1130 if (!dvb->fe) {
1131 dev_err(dev, "No STV0900 found!\n");
1132 return -ENODEV;
1133 }
1134 if (!dvb_attach(lnbh24_attach, dvb->fe, i2c, 0,
1135 0, (input->nr & 1) ?
1136 (0x09 - type) : (0x0b - type))) {
1137 dev_err(dev, "No LNBH24 found!\n");
1138 dvb_frontend_detach(dvb->fe);
1139 return -ENODEV;
1140 }
1141 return 0;
1142 }
1143
1144 static int tuner_attach_stv6110(struct ddb_input *input, int type)
1145 {
1146 struct i2c_adapter *i2c = &input->port->i2c->adap;
1147 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1148 struct device *dev = input->port->dev->dev;
1149 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
1150 struct stv6110x_config *tunerconf = (input->nr & 1) ?
1151 &stv6110b : &stv6110a;
1152 const struct stv6110x_devctl *ctl;
1153
1154 ctl = dvb_attach(stv6110x_attach, dvb->fe, tunerconf, i2c);
1155 if (!ctl) {
1156 dev_err(dev, "No STV6110X found!\n");
1157 return -ENODEV;
1158 }
1159 dev_info(dev, "attach tuner input %d adr %02x\n",
1160 input->nr, tunerconf->addr);
1161
1162 feconf->tuner_init = ctl->tuner_init;
1163 feconf->tuner_sleep = ctl->tuner_sleep;
1164 feconf->tuner_set_mode = ctl->tuner_set_mode;
1165 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
1166 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
1167 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
1168 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
1169 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
1170 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
1171 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
1172 feconf->tuner_get_status = ctl->tuner_get_status;
1173
1174 return 0;
1175 }
1176
1177 static const struct stv0910_cfg stv0910_p = {
1178 .adr = 0x68,
1179 .parallel = 1,
1180 .rptlvl = 4,
1181 .clk = 30000000,
1182 .tsspeed = 0x28,
1183 };
1184
1185 static const struct lnbh25_config lnbh25_cfg = {
1186 .i2c_address = 0x0c << 1,
1187 .data2_config = LNBH25_TEN
1188 };
1189
1190 static int has_lnbh25(struct i2c_adapter *i2c, u8 adr)
1191 {
1192 u8 val;
1193
1194 return i2c_read_reg(i2c, adr, 0, &val) ? 0 : 1;
1195 }
1196
1197 static int demod_attach_stv0910(struct ddb_input *input, int type, int tsfast)
1198 {
1199 struct i2c_adapter *i2c = &input->port->i2c->adap;
1200 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1201 struct device *dev = input->port->dev->dev;
1202 struct stv0910_cfg cfg = stv0910_p;
1203 struct lnbh25_config lnbcfg = lnbh25_cfg;
1204
1205 if (stv0910_single)
1206 cfg.single = 1;
1207
1208 if (type)
1209 cfg.parallel = 2;
1210
1211 if (tsfast) {
1212 dev_info(dev, "Enabling stv0910 higher speed TS\n");
1213 cfg.tsspeed = 0x10;
1214 }
1215
1216 dvb->fe = dvb_attach(stv0910_attach, i2c, &cfg, (input->nr & 1));
1217 if (!dvb->fe) {
1218 cfg.adr = 0x6c;
1219 dvb->fe = dvb_attach(stv0910_attach, i2c,
1220 &cfg, (input->nr & 1));
1221 }
1222 if (!dvb->fe) {
1223 dev_err(dev, "No STV0910 found!\n");
1224 return -ENODEV;
1225 }
1226
1227 /* attach lnbh25 - leftshift by one as the lnbh25 driver expects 8bit
1228 * i2c addresses
1229 */
1230 if (has_lnbh25(i2c, 0x0d))
1231 lnbcfg.i2c_address = (((input->nr & 1) ? 0x0d : 0x0c) << 1);
1232 else
1233 lnbcfg.i2c_address = (((input->nr & 1) ? 0x09 : 0x08) << 1);
1234
1235 if (!dvb_attach(lnbh25_attach, dvb->fe, &lnbcfg, i2c)) {
1236 dev_err(dev, "No LNBH25 found!\n");
1237 dvb_frontend_detach(dvb->fe);
1238 return -ENODEV;
1239 }
1240
1241 return 0;
1242 }
1243
1244 static int tuner_attach_stv6111(struct ddb_input *input, int type)
1245 {
1246 struct i2c_adapter *i2c = &input->port->i2c->adap;
1247 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1248 struct device *dev = input->port->dev->dev;
1249 struct dvb_frontend *fe;
1250 u8 adr = (type ? 0 : 4) + ((input->nr & 1) ? 0x63 : 0x60);
1251
1252 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr);
1253 if (!fe) {
1254 fe = dvb_attach(stv6111_attach, dvb->fe, i2c, adr & ~4);
1255 if (!fe) {
1256 dev_err(dev, "No STV6111 found at 0x%02x!\n", adr);
1257 return -ENODEV;
1258 }
1259 }
1260 return 0;
1261 }
1262
1263 static int demod_attach_dummy(struct ddb_input *input)
1264 {
1265 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1266 struct device *dev = input->port->dev->dev;
1267
1268 dvb->fe = dvb_attach(ddbridge_dummy_fe_qam_attach);
1269 if (!dvb->fe) {
1270 dev_err(dev, "QAM dummy attach failed!\n");
1271 return -ENODEV;
1272 }
1273
1274 return 0;
1275 }
1276
1277 static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
1278 {
1279 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1280 struct ddb_input *input = dvbdmx->priv;
1281 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1282
1283 if (!dvb->users)
1284 ddb_input_start_all(input);
1285
1286 return ++dvb->users;
1287 }
1288
1289 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
1290 {
1291 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
1292 struct ddb_input *input = dvbdmx->priv;
1293 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1294
1295 if (--dvb->users)
1296 return dvb->users;
1297
1298 ddb_input_stop_all(input);
1299 return 0;
1300 }
1301
1302 static void dvb_input_detach(struct ddb_input *input)
1303 {
1304 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1305 struct dvb_demux *dvbdemux = &dvb->demux;
1306
1307 switch (dvb->attached) {
1308 case 0x31:
1309 if (dvb->fe2)
1310 dvb_unregister_frontend(dvb->fe2);
1311 if (dvb->fe)
1312 dvb_unregister_frontend(dvb->fe);
1313 fallthrough;
1314 case 0x30:
1315 dvb_module_release(dvb->i2c_client[0]);
1316 dvb->i2c_client[0] = NULL;
1317
1318 if (dvb->fe2)
1319 dvb_frontend_detach(dvb->fe2);
1320 if (dvb->fe)
1321 dvb_frontend_detach(dvb->fe);
1322 dvb->fe = NULL;
1323 dvb->fe2 = NULL;
1324 fallthrough;
1325 case 0x20:
1326 dvb_net_release(&dvb->dvbnet);
1327 fallthrough;
1328 case 0x12:
1329 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1330 &dvb->hw_frontend);
1331 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
1332 &dvb->mem_frontend);
1333 fallthrough;
1334 case 0x11:
1335 dvb_dmxdev_release(&dvb->dmxdev);
1336 fallthrough;
1337 case 0x10:
1338 dvb_dmx_release(&dvb->demux);
1339 fallthrough;
1340 case 0x01:
1341 break;
1342 }
1343 dvb->attached = 0x00;
1344 }
1345
1346 static int dvb_register_adapters(struct ddb *dev)
1347 {
1348 int i, ret = 0;
1349 struct ddb_port *port;
1350 struct dvb_adapter *adap;
1351
1352 if (adapter_alloc == 3) {
1353 port = &dev->port[0];
1354 adap = port->dvb[0].adap;
1355 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
1356 port->dev->dev,
1357 adapter_nr);
1358 if (ret < 0)
1359 return ret;
1360 port->dvb[0].adap_registered = 1;
1361 for (i = 0; i < dev->port_num; i++) {
1362 port = &dev->port[i];
1363 port->dvb[0].adap = adap;
1364 port->dvb[1].adap = adap;
1365 }
1366 return 0;
1367 }
1368
1369 for (i = 0; i < dev->port_num; i++) {
1370 port = &dev->port[i];
1371 switch (port->class) {
1372 case DDB_PORT_TUNER:
1373 adap = port->dvb[0].adap;
1374 ret = dvb_register_adapter(adap, "DDBridge",
1375 THIS_MODULE,
1376 port->dev->dev,
1377 adapter_nr);
1378 if (ret < 0)
1379 return ret;
1380 port->dvb[0].adap_registered = 1;
1381
1382 if (adapter_alloc > 0) {
1383 port->dvb[1].adap = port->dvb[0].adap;
1384 break;
1385 }
1386 adap = port->dvb[1].adap;
1387 ret = dvb_register_adapter(adap, "DDBridge",
1388 THIS_MODULE,
1389 port->dev->dev,
1390 adapter_nr);
1391 if (ret < 0)
1392 return ret;
1393 port->dvb[1].adap_registered = 1;
1394 break;
1395
1396 case DDB_PORT_CI:
1397 case DDB_PORT_LOOP:
1398 adap = port->dvb[0].adap;
1399 ret = dvb_register_adapter(adap, "DDBridge",
1400 THIS_MODULE,
1401 port->dev->dev,
1402 adapter_nr);
1403 if (ret < 0)
1404 return ret;
1405 port->dvb[0].adap_registered = 1;
1406 break;
1407 default:
1408 if (adapter_alloc < 2)
1409 break;
1410 adap = port->dvb[0].adap;
1411 ret = dvb_register_adapter(adap, "DDBridge",
1412 THIS_MODULE,
1413 port->dev->dev,
1414 adapter_nr);
1415 if (ret < 0)
1416 return ret;
1417 port->dvb[0].adap_registered = 1;
1418 break;
1419 }
1420 }
1421 return ret;
1422 }
1423
1424 static void dvb_unregister_adapters(struct ddb *dev)
1425 {
1426 int i;
1427 struct ddb_port *port;
1428 struct ddb_dvb *dvb;
1429
1430 for (i = 0; i < dev->link[0].info->port_num; i++) {
1431 port = &dev->port[i];
1432
1433 dvb = &port->dvb[0];
1434 if (dvb->adap_registered)
1435 dvb_unregister_adapter(dvb->adap);
1436 dvb->adap_registered = 0;
1437
1438 dvb = &port->dvb[1];
1439 if (dvb->adap_registered)
1440 dvb_unregister_adapter(dvb->adap);
1441 dvb->adap_registered = 0;
1442 }
1443 }
1444
1445 static int dvb_input_attach(struct ddb_input *input)
1446 {
1447 int ret = 0;
1448 struct ddb_dvb *dvb = &input->port->dvb[input->nr & 1];
1449 struct ddb_port *port = input->port;
1450 struct dvb_adapter *adap = dvb->adap;
1451 struct dvb_demux *dvbdemux = &dvb->demux;
1452 struct ddb_ids *devids = &input->port->dev->link[input->port->lnr].ids;
1453 int par = 0, osc24 = 0, tsfast = 0;
1454
1455 /*
1456 * Determine if bridges with stv0910 demods can run with fast TS and
1457 * thus support high bandwidth transponders.
1458 * STV0910_PR and STV0910_P tuner types covers all relevant bridges,
1459 * namely the CineS2 V7(A) and the Octopus CI S2 Pro/Advanced. All
1460 * DuoFlex S2 V4(A) have type=DDB_TUNER_DVBS_STV0910 without any suffix
1461 * and are limited by the serial link to the bridge, thus won't work
1462 * in fast TS mode.
1463 */
1464 if (port->nr == 0 &&
1465 (port->type == DDB_TUNER_DVBS_STV0910_PR ||
1466 port->type == DDB_TUNER_DVBS_STV0910_P)) {
1467 /* fast TS on port 0 requires FPGA version >= 1.7 */
1468 if ((devids->hwid & 0x00ffffff) >= 0x00010007)
1469 tsfast = 1;
1470 }
1471
1472 dvb->attached = 0x01;
1473
1474 dvbdemux->priv = input;
1475 dvbdemux->dmx.capabilities = DMX_TS_FILTERING |
1476 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
1477 dvbdemux->start_feed = start_feed;
1478 dvbdemux->stop_feed = stop_feed;
1479 dvbdemux->filternum = 256;
1480 dvbdemux->feednum = 256;
1481 ret = dvb_dmx_init(dvbdemux);
1482 if (ret < 0)
1483 return ret;
1484 dvb->attached = 0x10;
1485
1486 dvb->dmxdev.filternum = 256;
1487 dvb->dmxdev.demux = &dvbdemux->dmx;
1488 ret = dvb_dmxdev_init(&dvb->dmxdev, adap);
1489 if (ret < 0)
1490 goto err_detach;
1491 dvb->attached = 0x11;
1492
1493 dvb->mem_frontend.source = DMX_MEMORY_FE;
1494 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->mem_frontend);
1495 dvb->hw_frontend.source = DMX_FRONTEND_0;
1496 dvb->demux.dmx.add_frontend(&dvb->demux.dmx, &dvb->hw_frontend);
1497 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, &dvb->hw_frontend);
1498 if (ret < 0)
1499 goto err_detach;
1500 dvb->attached = 0x12;
1501
1502 ret = dvb_net_init(adap, &dvb->dvbnet, dvb->dmxdev.demux);
1503 if (ret < 0)
1504 goto err_detach;
1505 dvb->attached = 0x20;
1506
1507 dvb->fe = NULL;
1508 dvb->fe2 = NULL;
1509 switch (port->type) {
1510 case DDB_TUNER_MXL5XX:
1511 if (ddb_fe_attach_mxl5xx(input) < 0)
1512 goto err_detach;
1513 break;
1514 case DDB_TUNER_DVBS_ST:
1515 if (demod_attach_stv0900(input, 0) < 0)
1516 goto err_detach;
1517 if (tuner_attach_stv6110(input, 0) < 0)
1518 goto err_tuner;
1519 break;
1520 case DDB_TUNER_DVBS_ST_AA:
1521 if (demod_attach_stv0900(input, 1) < 0)
1522 goto err_detach;
1523 if (tuner_attach_stv6110(input, 1) < 0)
1524 goto err_tuner;
1525 break;
1526 case DDB_TUNER_DVBS_STV0910:
1527 if (demod_attach_stv0910(input, 0, tsfast) < 0)
1528 goto err_detach;
1529 if (tuner_attach_stv6111(input, 0) < 0)
1530 goto err_tuner;
1531 break;
1532 case DDB_TUNER_DVBS_STV0910_PR:
1533 if (demod_attach_stv0910(input, 1, tsfast) < 0)
1534 goto err_detach;
1535 if (tuner_attach_stv6111(input, 1) < 0)
1536 goto err_tuner;
1537 break;
1538 case DDB_TUNER_DVBS_STV0910_P:
1539 if (demod_attach_stv0910(input, 0, tsfast) < 0)
1540 goto err_detach;
1541 if (tuner_attach_stv6111(input, 1) < 0)
1542 goto err_tuner;
1543 break;
1544 case DDB_TUNER_DVBCT_TR:
1545 if (demod_attach_drxk(input) < 0)
1546 goto err_detach;
1547 if (tuner_attach_tda18271(input) < 0)
1548 goto err_tuner;
1549 break;
1550 case DDB_TUNER_DVBCT_ST:
1551 if (demod_attach_stv0367(input) < 0)
1552 goto err_detach;
1553 if (tuner_attach_tda18212(input, port->type) < 0)
1554 goto err_tuner;
1555 break;
1556 case DDB_TUNER_DVBC2T2I_SONY_P:
1557 if (input->port->dev->link[input->port->lnr].info->ts_quirks &
1558 TS_QUIRK_ALT_OSC)
1559 osc24 = 0;
1560 else
1561 osc24 = 1;
1562 fallthrough;
1563 case DDB_TUNER_DVBCT2_SONY_P:
1564 case DDB_TUNER_DVBC2T2_SONY_P:
1565 case DDB_TUNER_ISDBT_SONY_P:
1566 if (input->port->dev->link[input->port->lnr].info->ts_quirks
1567 & TS_QUIRK_SERIAL)
1568 par = 0;
1569 else
1570 par = 1;
1571 if (demod_attach_cxd28xx(input, par, osc24) < 0)
1572 goto err_detach;
1573 if (tuner_attach_tda18212(input, port->type) < 0)
1574 goto err_tuner;
1575 break;
1576 case DDB_TUNER_DVBC2T2I_SONY:
1577 osc24 = 1;
1578 fallthrough;
1579 case DDB_TUNER_DVBCT2_SONY:
1580 case DDB_TUNER_DVBC2T2_SONY:
1581 case DDB_TUNER_ISDBT_SONY:
1582 if (demod_attach_cxd28xx(input, 0, osc24) < 0)
1583 goto err_detach;
1584 if (tuner_attach_tda18212(input, port->type) < 0)
1585 goto err_tuner;
1586 break;
1587 case DDB_TUNER_DUMMY:
1588 if (demod_attach_dummy(input) < 0)
1589 goto err_detach;
1590 break;
1591 case DDB_TUNER_MCI_SX8:
1592 if (ddb_fe_attach_mci(input, port->type) < 0)
1593 goto err_detach;
1594 break;
1595 default:
1596 return 0;
1597 }
1598 dvb->attached = 0x30;
1599
1600 if (dvb->fe) {
1601 if (dvb_register_frontend(adap, dvb->fe) < 0)
1602 goto err_detach;
1603
1604 if (dvb->fe2) {
1605 if (dvb_register_frontend(adap, dvb->fe2) < 0) {
1606 dvb_unregister_frontend(dvb->fe);
1607 goto err_detach;
1608 }
1609 dvb->fe2->tuner_priv = dvb->fe->tuner_priv;
1610 memcpy(&dvb->fe2->ops.tuner_ops,
1611 &dvb->fe->ops.tuner_ops,
1612 sizeof(struct dvb_tuner_ops));
1613 }
1614 }
1615
1616 dvb->attached = 0x31;
1617 return 0;
1618
1619 err_tuner:
1620 dev_err(port->dev->dev, "tuner attach failed!\n");
1621
1622 if (dvb->fe2)
1623 dvb_frontend_detach(dvb->fe2);
1624 if (dvb->fe)
1625 dvb_frontend_detach(dvb->fe);
1626 err_detach:
1627 dvb_input_detach(input);
1628
1629 /* return error from ret if set */
1630 if (ret < 0)
1631 return ret;
1632
1633 return -ENODEV;
1634 }
1635
1636 static int port_has_encti(struct ddb_port *port)
1637 {
1638 struct device *dev = port->dev->dev;
1639 u8 val;
1640 int ret = i2c_read_reg(&port->i2c->adap, 0x20, 0, &val);
1641
1642 if (!ret)
1643 dev_info(dev, "[0x20]=0x%02x\n", val);
1644 return ret ? 0 : 1;
1645 }
1646
1647 static int port_has_cxd(struct ddb_port *port, u8 *type)
1648 {
1649 u8 val;
1650 u8 probe[4] = { 0xe0, 0x00, 0x00, 0x00 }, data[4];
1651 struct i2c_msg msgs[2] = {{ .addr = 0x40, .flags = 0,
1652 .buf = probe, .len = 4 },
1653 { .addr = 0x40, .flags = I2C_M_RD,
1654 .buf = data, .len = 4 } };
1655 val = i2c_transfer(&port->i2c->adap, msgs, 2);
1656 if (val != 2)
1657 return 0;
1658
1659 if (data[0] == 0x02 && data[1] == 0x2b && data[3] == 0x43)
1660 *type = 2;
1661 else
1662 *type = 1;
1663 return 1;
1664 }
1665
1666 static int port_has_xo2(struct ddb_port *port, u8 *type, u8 *id)
1667 {
1668 u8 probe[1] = { 0x00 }, data[4];
1669
1670 if (i2c_io(&port->i2c->adap, 0x10, probe, 1, data, 4))
1671 return 0;
1672 if (data[0] == 'D' && data[1] == 'F') {
1673 *id = data[2];
1674 *type = 1;
1675 return 1;
1676 }
1677 if (data[0] == 'C' && data[1] == 'I') {
1678 *id = data[2];
1679 *type = 2;
1680 return 1;
1681 }
1682 return 0;
1683 }
1684
1685 static int port_has_stv0900(struct ddb_port *port)
1686 {
1687 u8 val;
1688
1689 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1690 return 0;
1691 return 1;
1692 }
1693
1694 static int port_has_stv0900_aa(struct ddb_port *port, u8 *id)
1695 {
1696 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, id) < 0)
1697 return 0;
1698 return 1;
1699 }
1700
1701 static int port_has_drxks(struct ddb_port *port)
1702 {
1703 u8 val;
1704
1705 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1706 return 0;
1707 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1708 return 0;
1709 return 1;
1710 }
1711
1712 static int port_has_stv0367(struct ddb_port *port)
1713 {
1714 u8 val;
1715
1716 if (i2c_read_reg16(&port->i2c->adap, 0x1e, 0xf000, &val) < 0)
1717 return 0;
1718 if (val != 0x60)
1719 return 0;
1720 if (i2c_read_reg16(&port->i2c->adap, 0x1f, 0xf000, &val) < 0)
1721 return 0;
1722 if (val != 0x60)
1723 return 0;
1724 return 1;
1725 }
1726
1727 static int init_xo2(struct ddb_port *port)
1728 {
1729 struct i2c_adapter *i2c = &port->i2c->adap;
1730 struct ddb *dev = port->dev;
1731 u8 val, data[2];
1732 int res;
1733
1734 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1735 if (res < 0)
1736 return res;
1737
1738 if (data[0] != 0x01) {
1739 dev_info(dev->dev, "Port %d: invalid XO2\n", port->nr);
1740 return -1;
1741 }
1742
1743 i2c_read_reg(i2c, 0x10, 0x08, &val);
1744 if (val != 0) {
1745 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1746 msleep(100);
1747 }
1748 /* Enable tuner power, disable pll, reset demods */
1749 i2c_write_reg(i2c, 0x10, 0x08, 0x04);
1750 usleep_range(2000, 3000);
1751 /* Release demod resets */
1752 i2c_write_reg(i2c, 0x10, 0x08, 0x07);
1753
1754 /* speed: 0=55,1=75,2=90,3=104 MBit/s */
1755 i2c_write_reg(i2c, 0x10, 0x09, xo2_speed);
1756
1757 if (dev->link[port->lnr].info->con_clock) {
1758 dev_info(dev->dev, "Setting continuous clock for XO2\n");
1759 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1760 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1761 } else {
1762 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1763 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1764 }
1765
1766 usleep_range(2000, 3000);
1767 /* Start XO2 PLL */
1768 i2c_write_reg(i2c, 0x10, 0x08, 0x87);
1769
1770 return 0;
1771 }
1772
1773 static int init_xo2_ci(struct ddb_port *port)
1774 {
1775 struct i2c_adapter *i2c = &port->i2c->adap;
1776 struct ddb *dev = port->dev;
1777 u8 val, data[2];
1778 int res;
1779
1780 res = i2c_read_regs(i2c, 0x10, 0x04, data, 2);
1781 if (res < 0)
1782 return res;
1783
1784 if (data[0] > 1) {
1785 dev_info(dev->dev, "Port %d: invalid XO2 CI %02x\n",
1786 port->nr, data[0]);
1787 return -1;
1788 }
1789 dev_info(dev->dev, "Port %d: DuoFlex CI %u.%u\n",
1790 port->nr, data[0], data[1]);
1791
1792 i2c_read_reg(i2c, 0x10, 0x08, &val);
1793 if (val != 0) {
1794 i2c_write_reg(i2c, 0x10, 0x08, 0x00);
1795 msleep(100);
1796 }
1797 /* Enable both CI */
1798 i2c_write_reg(i2c, 0x10, 0x08, 3);
1799 usleep_range(2000, 3000);
1800
1801 /* speed: 0=55,1=75,2=90,3=104 MBit/s */
1802 i2c_write_reg(i2c, 0x10, 0x09, 1);
1803
1804 i2c_write_reg(i2c, 0x10, 0x08, 0x83);
1805 usleep_range(2000, 3000);
1806
1807 if (dev->link[port->lnr].info->con_clock) {
1808 dev_info(dev->dev, "Setting continuous clock for DuoFlex CI\n");
1809 i2c_write_reg(i2c, 0x10, 0x0a, 0x03);
1810 i2c_write_reg(i2c, 0x10, 0x0b, 0x03);
1811 } else {
1812 i2c_write_reg(i2c, 0x10, 0x0a, 0x01);
1813 i2c_write_reg(i2c, 0x10, 0x0b, 0x01);
1814 }
1815 return 0;
1816 }
1817
1818 static int port_has_cxd28xx(struct ddb_port *port, u8 *id)
1819 {
1820 struct i2c_adapter *i2c = &port->i2c->adap;
1821 int status;
1822
1823 status = i2c_write_reg(&port->i2c->adap, 0x6e, 0, 0);
1824 if (status)
1825 return 0;
1826 status = i2c_read_reg(i2c, 0x6e, 0xfd, id);
1827 if (status)
1828 return 0;
1829 return 1;
1830 }
1831
1832 static char *xo2names[] = {
1833 "DUAL DVB-S2", "DUAL DVB-C/T/T2",
1834 "DUAL DVB-ISDBT", "DUAL DVB-C/C2/T/T2",
1835 "DUAL ATSC", "DUAL DVB-C/C2/T/T2,ISDB-T",
1836 "", ""
1837 };
1838
1839 static char *xo2types[] = {
1840 "DVBS_ST", "DVBCT2_SONY",
1841 "ISDBT_SONY", "DVBC2T2_SONY",
1842 "ATSC_ST", "DVBC2T2I_SONY"
1843 };
1844
1845 static void ddb_port_probe(struct ddb_port *port)
1846 {
1847 struct ddb *dev = port->dev;
1848 u32 l = port->lnr;
1849 struct ddb_link *link = &dev->link[l];
1850 u8 id, type;
1851
1852 port->name = "NO MODULE";
1853 port->type_name = "NONE";
1854 port->class = DDB_PORT_NONE;
1855
1856 /* Handle missing ports and ports without I2C */
1857
1858 if (dummy_tuner && !port->nr &&
1859 link->ids.device == 0x0005) {
1860 port->name = "DUMMY";
1861 port->class = DDB_PORT_TUNER;
1862 port->type = DDB_TUNER_DUMMY;
1863 port->type_name = "DUMMY";
1864 return;
1865 }
1866
1867 if (port->nr == ts_loop) {
1868 port->name = "TS LOOP";
1869 port->class = DDB_PORT_LOOP;
1870 return;
1871 }
1872
1873 if (port->nr == 1 && link->info->type == DDB_OCTOPUS_CI &&
1874 link->info->i2c_mask == 1) {
1875 port->name = "NO TAB";
1876 port->class = DDB_PORT_NONE;
1877 return;
1878 }
1879
1880 if (link->info->type == DDB_OCTOPUS_MAX) {
1881 port->name = "DUAL DVB-S2 MAX";
1882 port->type_name = "MXL5XX";
1883 port->class = DDB_PORT_TUNER;
1884 port->type = DDB_TUNER_MXL5XX;
1885 if (port->i2c)
1886 ddbwritel(dev, I2C_SPEED_400,
1887 port->i2c->regs + I2C_TIMING);
1888 return;
1889 }
1890
1891 if (link->info->type == DDB_OCTOPUS_MCI) {
1892 if (port->nr >= link->info->mci_ports)
1893 return;
1894 port->name = "DUAL MCI";
1895 port->type_name = "MCI";
1896 port->class = DDB_PORT_TUNER;
1897 port->type = DDB_TUNER_MCI + link->info->mci_type;
1898 return;
1899 }
1900
1901 if (port->nr > 1 && link->info->type == DDB_OCTOPUS_CI) {
1902 port->name = "CI internal";
1903 port->type_name = "INTERNAL";
1904 port->class = DDB_PORT_CI;
1905 port->type = DDB_CI_INTERNAL;
1906 }
1907
1908 if (!port->i2c)
1909 return;
1910
1911 /* Probe ports with I2C */
1912
1913 if (port_has_cxd(port, &id)) {
1914 if (id == 1) {
1915 port->name = "CI";
1916 port->type_name = "CXD2099";
1917 port->class = DDB_PORT_CI;
1918 port->type = DDB_CI_EXTERNAL_SONY;
1919 ddbwritel(dev, I2C_SPEED_400,
1920 port->i2c->regs + I2C_TIMING);
1921 } else {
1922 dev_info(dev->dev, "Port %d: Uninitialized DuoFlex\n",
1923 port->nr);
1924 return;
1925 }
1926 } else if (port_has_xo2(port, &type, &id)) {
1927 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1928 /*dev_info(dev->dev, "XO2 ID %02x\n", id);*/
1929 if (type == 2) {
1930 port->name = "DuoFlex CI";
1931 port->class = DDB_PORT_CI;
1932 port->type = DDB_CI_EXTERNAL_XO2;
1933 port->type_name = "CI_XO2";
1934 init_xo2_ci(port);
1935 return;
1936 }
1937 id >>= 2;
1938 if (id > 5) {
1939 port->name = "unknown XO2 DuoFlex";
1940 port->type_name = "UNKNOWN";
1941 } else {
1942 port->name = xo2names[id];
1943 port->class = DDB_PORT_TUNER;
1944 port->type = DDB_TUNER_XO2 + id;
1945 port->type_name = xo2types[id];
1946 init_xo2(port);
1947 }
1948 } else if (port_has_cxd28xx(port, &id)) {
1949 switch (id) {
1950 case 0xa4:
1951 port->name = "DUAL DVB-C2T2 CXD2843";
1952 port->type = DDB_TUNER_DVBC2T2_SONY_P;
1953 port->type_name = "DVBC2T2_SONY";
1954 break;
1955 case 0xb1:
1956 port->name = "DUAL DVB-CT2 CXD2837";
1957 port->type = DDB_TUNER_DVBCT2_SONY_P;
1958 port->type_name = "DVBCT2_SONY";
1959 break;
1960 case 0xb0:
1961 port->name = "DUAL ISDB-T CXD2838";
1962 port->type = DDB_TUNER_ISDBT_SONY_P;
1963 port->type_name = "ISDBT_SONY";
1964 break;
1965 case 0xc1:
1966 port->name = "DUAL DVB-C2T2 ISDB-T CXD2854";
1967 port->type = DDB_TUNER_DVBC2T2I_SONY_P;
1968 port->type_name = "DVBC2T2I_ISDBT_SONY";
1969 break;
1970 default:
1971 return;
1972 }
1973 port->class = DDB_PORT_TUNER;
1974 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1975 } else if (port_has_stv0900(port)) {
1976 port->name = "DUAL DVB-S2";
1977 port->class = DDB_PORT_TUNER;
1978 port->type = DDB_TUNER_DVBS_ST;
1979 port->type_name = "DVBS_ST";
1980 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1981 } else if (port_has_stv0900_aa(port, &id)) {
1982 port->name = "DUAL DVB-S2";
1983 port->class = DDB_PORT_TUNER;
1984 if (id == 0x51) {
1985 if (port->nr == 0 &&
1986 link->info->ts_quirks & TS_QUIRK_REVERSED)
1987 port->type = DDB_TUNER_DVBS_STV0910_PR;
1988 else
1989 port->type = DDB_TUNER_DVBS_STV0910_P;
1990 port->type_name = "DVBS_ST_0910";
1991 } else {
1992 port->type = DDB_TUNER_DVBS_ST_AA;
1993 port->type_name = "DVBS_ST_AA";
1994 }
1995 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1996 } else if (port_has_drxks(port)) {
1997 port->name = "DUAL DVB-C/T";
1998 port->class = DDB_PORT_TUNER;
1999 port->type = DDB_TUNER_DVBCT_TR;
2000 port->type_name = "DVBCT_TR";
2001 ddbwritel(dev, I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
2002 } else if (port_has_stv0367(port)) {
2003 port->name = "DUAL DVB-C/T";
2004 port->class = DDB_PORT_TUNER;
2005 port->type = DDB_TUNER_DVBCT_ST;
2006 port->type_name = "DVBCT_ST";
2007 ddbwritel(dev, I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
2008 } else if (port_has_encti(port)) {
2009 port->name = "ENCTI";
2010 port->class = DDB_PORT_LOOP;
2011 }
2012 }
2013
2014 /****************************************************************************/
2015 /****************************************************************************/
2016 /****************************************************************************/
2017
2018 static int ddb_port_attach(struct ddb_port *port)
2019 {
2020 int ret = 0;
2021
2022 switch (port->class) {
2023 case DDB_PORT_TUNER:
2024 ret = dvb_input_attach(port->input[0]);
2025 if (ret < 0)
2026 break;
2027 ret = dvb_input_attach(port->input[1]);
2028 if (ret < 0) {
2029 dvb_input_detach(port->input[0]);
2030 break;
2031 }
2032 port->input[0]->redi = port->input[0];
2033 port->input[1]->redi = port->input[1];
2034 break;
2035 case DDB_PORT_CI:
2036 ret = ddb_ci_attach(port, ci_bitrate);
2037 if (ret < 0)
2038 break;
2039 fallthrough;
2040 case DDB_PORT_LOOP:
2041 ret = dvb_register_device(port->dvb[0].adap,
2042 &port->dvb[0].dev,
2043 &dvbdev_ci, (void *)port->output,
2044 DVB_DEVICE_SEC, 0);
2045 break;
2046 default:
2047 break;
2048 }
2049 if (ret < 0)
2050 dev_err(port->dev->dev, "port_attach on port %d failed\n",
2051 port->nr);
2052 return ret;
2053 }
2054
2055 int ddb_ports_attach(struct ddb *dev)
2056 {
2057 int i, numports, err_ports = 0, ret = 0;
2058 struct ddb_port *port;
2059
2060 if (dev->port_num) {
2061 ret = dvb_register_adapters(dev);
2062 if (ret < 0) {
2063 dev_err(dev->dev, "Registering adapters failed. Check DVB_MAX_ADAPTERS in config.\n");
2064 return ret;
2065 }
2066 }
2067
2068 numports = dev->port_num;
2069
2070 for (i = 0; i < dev->port_num; i++) {
2071 port = &dev->port[i];
2072 if (port->class != DDB_PORT_NONE) {
2073 ret = ddb_port_attach(port);
2074 if (ret)
2075 err_ports++;
2076 } else {
2077 numports--;
2078 }
2079 }
2080
2081 if (err_ports) {
2082 if (err_ports == numports) {
2083 dev_err(dev->dev, "All connected ports failed to initialise!\n");
2084 return -ENODEV;
2085 }
2086
2087 dev_warn(dev->dev, "%d of %d connected ports failed to initialise!\n",
2088 err_ports, numports);
2089 }
2090
2091 return 0;
2092 }
2093
2094 void ddb_ports_detach(struct ddb *dev)
2095 {
2096 int i;
2097 struct ddb_port *port;
2098
2099 for (i = 0; i < dev->port_num; i++) {
2100 port = &dev->port[i];
2101
2102 switch (port->class) {
2103 case DDB_PORT_TUNER:
2104 dvb_input_detach(port->input[1]);
2105 dvb_input_detach(port->input[0]);
2106 break;
2107 case DDB_PORT_CI:
2108 case DDB_PORT_LOOP:
2109 ddb_ci_detach(port);
2110 break;
2111 }
2112 }
2113 dvb_unregister_adapters(dev);
2114 }
2115
2116 /* Copy input DMA pointers to output DMA and ACK. */
2117
2118 static void input_write_output(struct ddb_input *input,
2119 struct ddb_output *output)
2120 {
2121 ddbwritel(output->port->dev,
2122 input->dma->stat, DMA_BUFFER_ACK(output->dma));
2123 output->dma->cbuf = (input->dma->stat >> 11) & 0x1f;
2124 output->dma->coff = (input->dma->stat & 0x7ff) << 7;
2125 }
2126
2127 static void output_ack_input(struct ddb_output *output,
2128 struct ddb_input *input)
2129 {
2130 ddbwritel(input->port->dev,
2131 output->dma->stat, DMA_BUFFER_ACK(input->dma));
2132 }
2133
2134 static void input_write_dvb(struct ddb_input *input,
2135 struct ddb_input *input2)
2136 {
2137 struct ddb_dvb *dvb = &input2->port->dvb[input2->nr & 1];
2138 struct ddb_dma *dma, *dma2;
2139 struct ddb *dev = input->port->dev;
2140 int ack = 1;
2141
2142 dma = input->dma;
2143 dma2 = input->dma;
2144 /*
2145 * if there also is an output connected, do not ACK.
2146 * input_write_output will ACK.
2147 */
2148 if (input->redo) {
2149 dma2 = input->redo->dma;
2150 ack = 0;
2151 }
2152 while (dma->cbuf != ((dma->stat >> 11) & 0x1f) ||
2153 (4 & dma->ctrl)) {
2154 if (4 & dma->ctrl) {
2155 /* dev_err(dev->dev, "Overflow dma %d\n", dma->nr); */
2156 ack = 1;
2157 }
2158 if (alt_dma)
2159 dma_sync_single_for_cpu(dev->dev, dma2->pbuf[dma->cbuf],
2160 dma2->size, DMA_FROM_DEVICE);
2161 dvb_dmx_swfilter_packets(&dvb->demux,
2162 dma2->vbuf[dma->cbuf],
2163 dma2->size / 188);
2164 dma->cbuf = (dma->cbuf + 1) % dma2->num;
2165 if (ack)
2166 ddbwritel(dev, (dma->cbuf << 11),
2167 DMA_BUFFER_ACK(dma));
2168 dma->stat = safe_ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2169 dma->ctrl = safe_ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2170 }
2171 }
2172
2173 static void input_work(struct work_struct *work)
2174 {
2175 struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
2176 struct ddb_input *input = (struct ddb_input *)dma->io;
2177 struct ddb *dev = input->port->dev;
2178 unsigned long flags;
2179
2180 spin_lock_irqsave(&dma->lock, flags);
2181 if (!dma->running) {
2182 spin_unlock_irqrestore(&dma->lock, flags);
2183 return;
2184 }
2185 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2186 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2187
2188 if (input->redi)
2189 input_write_dvb(input, input->redi);
2190 if (input->redo)
2191 input_write_output(input, input->redo);
2192 wake_up(&dma->wq);
2193 spin_unlock_irqrestore(&dma->lock, flags);
2194 }
2195
2196 static void input_handler(void *data)
2197 {
2198 struct ddb_input *input = (struct ddb_input *)data;
2199 struct ddb_dma *dma = input->dma;
2200
2201 queue_work(ddb_wq, &dma->work);
2202 }
2203
2204 static void output_work(struct work_struct *work)
2205 {
2206 struct ddb_dma *dma = container_of(work, struct ddb_dma, work);
2207 struct ddb_output *output = (struct ddb_output *)dma->io;
2208 struct ddb *dev = output->port->dev;
2209 unsigned long flags;
2210
2211 spin_lock_irqsave(&dma->lock, flags);
2212 if (!dma->running)
2213 goto unlock_exit;
2214 dma->stat = ddbreadl(dev, DMA_BUFFER_CURRENT(dma));
2215 dma->ctrl = ddbreadl(dev, DMA_BUFFER_CONTROL(dma));
2216 if (output->redi)
2217 output_ack_input(output, output->redi);
2218 wake_up(&dma->wq);
2219 unlock_exit:
2220 spin_unlock_irqrestore(&dma->lock, flags);
2221 }
2222
2223 static void output_handler(void *data)
2224 {
2225 struct ddb_output *output = (struct ddb_output *)data;
2226 struct ddb_dma *dma = output->dma;
2227
2228 queue_work(ddb_wq, &dma->work);
2229 }
2230
2231 /****************************************************************************/
2232 /****************************************************************************/
2233
2234 static const struct ddb_regmap *io_regmap(struct ddb_io *io, int link)
2235 {
2236 const struct ddb_info *info;
2237
2238 if (link)
2239 info = io->port->dev->link[io->port->lnr].info;
2240 else
2241 info = io->port->dev->link[0].info;
2242
2243 if (!info)
2244 return NULL;
2245
2246 return info->regmap;
2247 }
2248
2249 static void ddb_dma_init(struct ddb_io *io, int nr, int out)
2250 {
2251 struct ddb_dma *dma;
2252 const struct ddb_regmap *rm = io_regmap(io, 0);
2253
2254 dma = out ? &io->port->dev->odma[nr] : &io->port->dev->idma[nr];
2255 io->dma = dma;
2256 dma->io = io;
2257
2258 spin_lock_init(&dma->lock);
2259 init_waitqueue_head(&dma->wq);
2260 if (out) {
2261 INIT_WORK(&dma->work, output_work);
2262 dma->regs = rm->odma->base + rm->odma->size * nr;
2263 dma->bufregs = rm->odma_buf->base + rm->odma_buf->size * nr;
2264 dma->num = dma_buf_num;
2265 dma->size = dma_buf_size * 128 * 47;
2266 dma->div = 1;
2267 } else {
2268 INIT_WORK(&dma->work, input_work);
2269 dma->regs = rm->idma->base + rm->idma->size * nr;
2270 dma->bufregs = rm->idma_buf->base + rm->idma_buf->size * nr;
2271 dma->num = dma_buf_num;
2272 dma->size = dma_buf_size * 128 * 47;
2273 dma->div = 1;
2274 }
2275 ddbwritel(io->port->dev, 0, DMA_BUFFER_ACK(dma));
2276 dev_dbg(io->port->dev->dev, "init link %u, io %u, dma %u, dmaregs %08x bufregs %08x\n",
2277 io->port->lnr, io->nr, nr, dma->regs, dma->bufregs);
2278 }
2279
2280 static void ddb_input_init(struct ddb_port *port, int nr, int pnr, int anr)
2281 {
2282 struct ddb *dev = port->dev;
2283 struct ddb_input *input = &dev->input[anr];
2284 const struct ddb_regmap *rm;
2285
2286 port->input[pnr] = input;
2287 input->nr = nr;
2288 input->port = port;
2289 rm = io_regmap(input, 1);
2290 input->regs = DDB_LINK_TAG(port->lnr) |
2291 (rm->input->base + rm->input->size * nr);
2292 dev_dbg(dev->dev, "init link %u, input %u, regs %08x\n",
2293 port->lnr, nr, input->regs);
2294
2295 if (dev->has_dma) {
2296 const struct ddb_regmap *rm0 = io_regmap(input, 0);
2297 u32 base = rm0->irq_base_idma;
2298 u32 dma_nr = nr;
2299
2300 if (port->lnr)
2301 dma_nr += 32 + (port->lnr - 1) * 8;
2302
2303 dev_dbg(dev->dev, "init link %u, input %u, handler %u\n",
2304 port->lnr, nr, dma_nr + base);
2305
2306 ddb_irq_set(dev, 0, dma_nr + base, &input_handler, input);
2307 ddb_dma_init(input, dma_nr, 0);
2308 }
2309 }
2310
2311 static void ddb_output_init(struct ddb_port *port, int nr)
2312 {
2313 struct ddb *dev = port->dev;
2314 struct ddb_output *output = &dev->output[nr];
2315 const struct ddb_regmap *rm;
2316
2317 port->output = output;
2318 output->nr = nr;
2319 output->port = port;
2320 rm = io_regmap(output, 1);
2321 output->regs = DDB_LINK_TAG(port->lnr) |
2322 (rm->output->base + rm->output->size * nr);
2323
2324 dev_dbg(dev->dev, "init link %u, output %u, regs %08x\n",
2325 port->lnr, nr, output->regs);
2326
2327 if (dev->has_dma) {
2328 const struct ddb_regmap *rm0 = io_regmap(output, 0);
2329 u32 base = rm0->irq_base_odma;
2330
2331 ddb_irq_set(dev, 0, nr + base, &output_handler, output);
2332 ddb_dma_init(output, nr, 1);
2333 }
2334 }
2335
2336 static int ddb_port_match_i2c(struct ddb_port *port)
2337 {
2338 struct ddb *dev = port->dev;
2339 u32 i;
2340
2341 for (i = 0; i < dev->i2c_num; i++) {
2342 if (dev->i2c[i].link == port->lnr &&
2343 dev->i2c[i].nr == port->nr) {
2344 port->i2c = &dev->i2c[i];
2345 return 1;
2346 }
2347 }
2348 return 0;
2349 }
2350
2351 static int ddb_port_match_link_i2c(struct ddb_port *port)
2352 {
2353 struct ddb *dev = port->dev;
2354 u32 i;
2355
2356 for (i = 0; i < dev->i2c_num; i++) {
2357 if (dev->i2c[i].link == port->lnr) {
2358 port->i2c = &dev->i2c[i];
2359 return 1;
2360 }
2361 }
2362 return 0;
2363 }
2364
2365 void ddb_ports_init(struct ddb *dev)
2366 {
2367 u32 i, l, p;
2368 struct ddb_port *port;
2369 const struct ddb_info *info;
2370 const struct ddb_regmap *rm;
2371
2372 for (p = l = 0; l < DDB_MAX_LINK; l++) {
2373 info = dev->link[l].info;
2374 if (!info)
2375 continue;
2376 rm = info->regmap;
2377 if (!rm)
2378 continue;
2379 for (i = 0; i < info->port_num; i++, p++) {
2380 port = &dev->port[p];
2381 port->dev = dev;
2382 port->nr = i;
2383 port->lnr = l;
2384 port->pnr = p;
2385 port->gap = 0xffffffff;
2386 port->obr = ci_bitrate;
2387 mutex_init(&port->i2c_gate_lock);
2388
2389 if (!ddb_port_match_i2c(port)) {
2390 if (info->type == DDB_OCTOPUS_MAX)
2391 ddb_port_match_link_i2c(port);
2392 }
2393
2394 ddb_port_probe(port);
2395
2396 port->dvb[0].adap = &dev->adap[2 * p];
2397 port->dvb[1].adap = &dev->adap[2 * p + 1];
2398
2399 if (port->class == DDB_PORT_NONE && i && p &&
2400 dev->port[p - 1].type == DDB_CI_EXTERNAL_XO2) {
2401 port->class = DDB_PORT_CI;
2402 port->type = DDB_CI_EXTERNAL_XO2_B;
2403 port->name = "DuoFlex CI_B";
2404 port->i2c = dev->port[p - 1].i2c;
2405 }
2406
2407 dev_info(dev->dev, "Port %u: Link %u, Link Port %u (TAB %u): %s\n",
2408 port->pnr, port->lnr, port->nr, port->nr + 1,
2409 port->name);
2410
2411 if (port->class == DDB_PORT_CI &&
2412 port->type == DDB_CI_EXTERNAL_XO2) {
2413 ddb_input_init(port, 2 * i, 0, 2 * i);
2414 ddb_output_init(port, i);
2415 continue;
2416 }
2417
2418 if (port->class == DDB_PORT_CI &&
2419 port->type == DDB_CI_EXTERNAL_XO2_B) {
2420 ddb_input_init(port, 2 * i - 1, 0, 2 * i - 1);
2421 ddb_output_init(port, i);
2422 continue;
2423 }
2424
2425 if (port->class == DDB_PORT_NONE)
2426 continue;
2427
2428 switch (dev->link[l].info->type) {
2429 case DDB_OCTOPUS_CI:
2430 if (i >= 2) {
2431 ddb_input_init(port, 2 + i, 0, 2 + i);
2432 ddb_input_init(port, 4 + i, 1, 4 + i);
2433 ddb_output_init(port, i);
2434 break;
2435 }
2436 fallthrough;
2437 case DDB_OCTOPUS:
2438 ddb_input_init(port, 2 * i, 0, 2 * i);
2439 ddb_input_init(port, 2 * i + 1, 1, 2 * i + 1);
2440 ddb_output_init(port, i);
2441 break;
2442 case DDB_OCTOPUS_MAX:
2443 case DDB_OCTOPUS_MAX_CT:
2444 case DDB_OCTOPUS_MCI:
2445 ddb_input_init(port, 2 * i, 0, 2 * p);
2446 ddb_input_init(port, 2 * i + 1, 1, 2 * p + 1);
2447 break;
2448 default:
2449 break;
2450 }
2451 }
2452 }
2453 dev->port_num = p;
2454 }
2455
2456 void ddb_ports_release(struct ddb *dev)
2457 {
2458 int i;
2459 struct ddb_port *port;
2460
2461 for (i = 0; i < dev->port_num; i++) {
2462 port = &dev->port[i];
2463 if (port->input[0] && port->input[0]->dma)
2464 cancel_work_sync(&port->input[0]->dma->work);
2465 if (port->input[1] && port->input[1]->dma)
2466 cancel_work_sync(&port->input[1]->dma->work);
2467 if (port->output && port->output->dma)
2468 cancel_work_sync(&port->output->dma->work);
2469 }
2470 }
2471
2472 /****************************************************************************/
2473 /****************************************************************************/
2474 /****************************************************************************/
2475
2476 #define IRQ_HANDLE(_nr) \
2477 do { if ((s & (1UL << ((_nr) & 0x1f))) && \
2478 dev->link[0].irq[_nr].handler) \
2479 dev->link[0].irq[_nr].handler(dev->link[0].irq[_nr].data); } \
2480 while (0)
2481
2482 #define IRQ_HANDLE_NIBBLE(_shift) { \
2483 if (s & (0x0000000f << ((_shift) & 0x1f))) { \
2484 IRQ_HANDLE(0 + (_shift)); \
2485 IRQ_HANDLE(1 + (_shift)); \
2486 IRQ_HANDLE(2 + (_shift)); \
2487 IRQ_HANDLE(3 + (_shift)); \
2488 } \
2489 }
2490
2491 #define IRQ_HANDLE_BYTE(_shift) { \
2492 if (s & (0x000000ff << ((_shift) & 0x1f))) { \
2493 IRQ_HANDLE(0 + (_shift)); \
2494 IRQ_HANDLE(1 + (_shift)); \
2495 IRQ_HANDLE(2 + (_shift)); \
2496 IRQ_HANDLE(3 + (_shift)); \
2497 IRQ_HANDLE(4 + (_shift)); \
2498 IRQ_HANDLE(5 + (_shift)); \
2499 IRQ_HANDLE(6 + (_shift)); \
2500 IRQ_HANDLE(7 + (_shift)); \
2501 } \
2502 }
2503
2504 static void irq_handle_msg(struct ddb *dev, u32 s)
2505 {
2506 dev->i2c_irq++;
2507 IRQ_HANDLE_NIBBLE(0);
2508 }
2509
2510 static void irq_handle_io(struct ddb *dev, u32 s)
2511 {
2512 dev->ts_irq++;
2513 IRQ_HANDLE_NIBBLE(4);
2514 IRQ_HANDLE_BYTE(8);
2515 IRQ_HANDLE_BYTE(16);
2516 IRQ_HANDLE_BYTE(24);
2517 }
2518
2519 irqreturn_t ddb_irq_handler0(int irq, void *dev_id)
2520 {
2521 struct ddb *dev = (struct ddb *)dev_id;
2522 u32 mask = 0x8fffff00;
2523 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
2524
2525 if (!s)
2526 return IRQ_NONE;
2527 do {
2528 if (s & 0x80000000)
2529 return IRQ_NONE;
2530 ddbwritel(dev, s, INTERRUPT_ACK);
2531 irq_handle_io(dev, s);
2532 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
2533
2534 return IRQ_HANDLED;
2535 }
2536
2537 irqreturn_t ddb_irq_handler1(int irq, void *dev_id)
2538 {
2539 struct ddb *dev = (struct ddb *)dev_id;
2540 u32 mask = 0x8000000f;
2541 u32 s = mask & ddbreadl(dev, INTERRUPT_STATUS);
2542
2543 if (!s)
2544 return IRQ_NONE;
2545 do {
2546 if (s & 0x80000000)
2547 return IRQ_NONE;
2548 ddbwritel(dev, s, INTERRUPT_ACK);
2549 irq_handle_msg(dev, s);
2550 } while ((s = mask & ddbreadl(dev, INTERRUPT_STATUS)));
2551
2552 return IRQ_HANDLED;
2553 }
2554
2555 irqreturn_t ddb_irq_handler(int irq, void *dev_id)
2556 {
2557 struct ddb *dev = (struct ddb *)dev_id;
2558 u32 s = ddbreadl(dev, INTERRUPT_STATUS);
2559 int ret = IRQ_HANDLED;
2560
2561 if (!s)
2562 return IRQ_NONE;
2563 do {
2564 if (s & 0x80000000)
2565 return IRQ_NONE;
2566 ddbwritel(dev, s, INTERRUPT_ACK);
2567
2568 if (s & 0x0000000f)
2569 irq_handle_msg(dev, s);
2570 if (s & 0x0fffff00)
2571 irq_handle_io(dev, s);
2572 } while ((s = ddbreadl(dev, INTERRUPT_STATUS)));
2573
2574 return ret;
2575 }
2576
2577 /****************************************************************************/
2578 /****************************************************************************/
2579 /****************************************************************************/
2580
2581 static int reg_wait(struct ddb *dev, u32 reg, u32 bit)
2582 {
2583 u32 count = 0;
2584
2585 while (safe_ddbreadl(dev, reg) & bit) {
2586 ndelay(10);
2587 if (++count == 100)
2588 return -1;
2589 }
2590 return 0;
2591 }
2592
2593 static int flashio(struct ddb *dev, u32 lnr, u8 *wbuf, u32 wlen, u8 *rbuf,
2594 u32 rlen)
2595 {
2596 u32 data, shift;
2597 u32 tag = DDB_LINK_TAG(lnr);
2598 struct ddb_link *link = &dev->link[lnr];
2599
2600 mutex_lock(&link->flash_mutex);
2601 if (wlen > 4)
2602 ddbwritel(dev, 1, tag | SPI_CONTROL);
2603 while (wlen > 4) {
2604 /* FIXME: check for big-endian */
2605 data = swab32(*(u32 *)wbuf);
2606 wbuf += 4;
2607 wlen -= 4;
2608 ddbwritel(dev, data, tag | SPI_DATA);
2609 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2610 goto fail;
2611 }
2612 if (rlen)
2613 ddbwritel(dev, 0x0001 | ((wlen << (8 + 3)) & 0x1f00),
2614 tag | SPI_CONTROL);
2615 else
2616 ddbwritel(dev, 0x0003 | ((wlen << (8 + 3)) & 0x1f00),
2617 tag | SPI_CONTROL);
2618
2619 data = 0;
2620 shift = ((4 - wlen) * 8);
2621 while (wlen) {
2622 data <<= 8;
2623 data |= *wbuf;
2624 wlen--;
2625 wbuf++;
2626 }
2627 if (shift)
2628 data <<= shift;
2629 ddbwritel(dev, data, tag | SPI_DATA);
2630 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2631 goto fail;
2632
2633 if (!rlen) {
2634 ddbwritel(dev, 0, tag | SPI_CONTROL);
2635 goto exit;
2636 }
2637 if (rlen > 4)
2638 ddbwritel(dev, 1, tag | SPI_CONTROL);
2639
2640 while (rlen > 4) {
2641 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2642 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2643 goto fail;
2644 data = ddbreadl(dev, tag | SPI_DATA);
2645 *(u32 *)rbuf = swab32(data);
2646 rbuf += 4;
2647 rlen -= 4;
2648 }
2649 ddbwritel(dev, 0x0003 | ((rlen << (8 + 3)) & 0x1F00),
2650 tag | SPI_CONTROL);
2651 ddbwritel(dev, 0xffffffff, tag | SPI_DATA);
2652 if (reg_wait(dev, tag | SPI_CONTROL, 4))
2653 goto fail;
2654
2655 data = ddbreadl(dev, tag | SPI_DATA);
2656 ddbwritel(dev, 0, tag | SPI_CONTROL);
2657
2658 if (rlen < 4)
2659 data <<= ((4 - rlen) * 8);
2660
2661 while (rlen > 0) {
2662 *rbuf = ((data >> 24) & 0xff);
2663 data <<= 8;
2664 rbuf++;
2665 rlen--;
2666 }
2667 exit:
2668 mutex_unlock(&link->flash_mutex);
2669 return 0;
2670 fail:
2671 mutex_unlock(&link->flash_mutex);
2672 return -1;
2673 }
2674
2675 int ddbridge_flashread(struct ddb *dev, u32 link, u8 *buf, u32 addr, u32 len)
2676 {
2677 u8 cmd[4] = {0x03, (addr >> 16) & 0xff,
2678 (addr >> 8) & 0xff, addr & 0xff};
2679
2680 return flashio(dev, link, cmd, 4, buf, len);
2681 }
2682
2683 /*
2684 * TODO/FIXME: add/implement IOCTLs from upstream driver
2685 */
2686
2687 #define DDB_NAME "ddbridge"
2688
2689 static u32 ddb_num;
2690 static int ddb_major;
2691 static DEFINE_MUTEX(ddb_mutex);
2692
2693 static int ddb_release(struct inode *inode, struct file *file)
2694 {
2695 struct ddb *dev = file->private_data;
2696
2697 dev->ddb_dev_users--;
2698 return 0;
2699 }
2700
2701 static int ddb_open(struct inode *inode, struct file *file)
2702 {
2703 struct ddb *dev = ddbs[iminor(inode)];
2704
2705 if (dev->ddb_dev_users)
2706 return -EBUSY;
2707 dev->ddb_dev_users++;
2708 file->private_data = dev;
2709 return 0;
2710 }
2711
2712 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
2713 {
2714 struct ddb *dev = file->private_data;
2715
2716 dev_warn(dev->dev, "DDB IOCTLs unsupported (cmd: %d, arg: %lu)\n",
2717 cmd, arg);
2718
2719 return -ENOTTY;
2720 }
2721
2722 static const struct file_operations ddb_fops = {
2723 .unlocked_ioctl = ddb_ioctl,
2724 .open = ddb_open,
2725 .release = ddb_release,
2726 };
2727
2728 static char *ddb_devnode(struct device *device, umode_t *mode)
2729 {
2730 struct ddb *dev = dev_get_drvdata(device);
2731
2732 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
2733 }
2734
2735 #define __ATTR_MRO(_name, _show) { \
2736 .attr = { .name = __stringify(_name), .mode = 0444 }, \
2737 .show = _show, \
2738 }
2739
2740 #define __ATTR_MWO(_name, _store) { \
2741 .attr = { .name = __stringify(_name), .mode = 0222 }, \
2742 .store = _store, \
2743 }
2744
2745 static ssize_t ports_show(struct device *device,
2746 struct device_attribute *attr, char *buf)
2747 {
2748 struct ddb *dev = dev_get_drvdata(device);
2749
2750 return sprintf(buf, "%d\n", dev->port_num);
2751 }
2752
2753 static ssize_t ts_irq_show(struct device *device,
2754 struct device_attribute *attr, char *buf)
2755 {
2756 struct ddb *dev = dev_get_drvdata(device);
2757
2758 return sprintf(buf, "%d\n", dev->ts_irq);
2759 }
2760
2761 static ssize_t i2c_irq_show(struct device *device,
2762 struct device_attribute *attr, char *buf)
2763 {
2764 struct ddb *dev = dev_get_drvdata(device);
2765
2766 return sprintf(buf, "%d\n", dev->i2c_irq);
2767 }
2768
2769 static ssize_t fan_show(struct device *device,
2770 struct device_attribute *attr, char *buf)
2771 {
2772 struct ddb *dev = dev_get_drvdata(device);
2773 u32 val;
2774
2775 val = ddbreadl(dev, GPIO_OUTPUT) & 1;
2776 return sprintf(buf, "%d\n", val);
2777 }
2778
2779 static ssize_t fan_store(struct device *device, struct device_attribute *d,
2780 const char *buf, size_t count)
2781 {
2782 struct ddb *dev = dev_get_drvdata(device);
2783 u32 val;
2784
2785 if (sscanf(buf, "%u\n", &val) != 1)
2786 return -EINVAL;
2787 ddbwritel(dev, 1, GPIO_DIRECTION);
2788 ddbwritel(dev, val & 1, GPIO_OUTPUT);
2789 return count;
2790 }
2791
2792 static ssize_t fanspeed_show(struct device *device,
2793 struct device_attribute *attr, char *buf)
2794 {
2795 struct ddb *dev = dev_get_drvdata(device);
2796 int num = attr->attr.name[8] - 0x30;
2797 struct ddb_link *link = &dev->link[num];
2798 u32 spd;
2799
2800 spd = ddblreadl(link, TEMPMON_FANCONTROL) & 0xff;
2801 return sprintf(buf, "%u\n", spd * 100);
2802 }
2803
2804 static ssize_t temp_show(struct device *device,
2805 struct device_attribute *attr, char *buf)
2806 {
2807 struct ddb *dev = dev_get_drvdata(device);
2808 struct ddb_link *link = &dev->link[0];
2809 struct i2c_adapter *adap;
2810 int temp, temp2;
2811 u8 tmp[2];
2812
2813 if (!link->info->temp_num)
2814 return sprintf(buf, "no sensor\n");
2815 adap = &dev->i2c[link->info->temp_bus].adap;
2816 if (i2c_read_regs(adap, 0x48, 0, tmp, 2) < 0)
2817 return sprintf(buf, "read_error\n");
2818 temp = (tmp[0] << 3) | (tmp[1] >> 5);
2819 temp *= 125;
2820 if (link->info->temp_num == 2) {
2821 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
2822 return sprintf(buf, "read_error\n");
2823 temp2 = (tmp[0] << 3) | (tmp[1] >> 5);
2824 temp2 *= 125;
2825 return sprintf(buf, "%d %d\n", temp, temp2);
2826 }
2827 return sprintf(buf, "%d\n", temp);
2828 }
2829
2830 static ssize_t ctemp_show(struct device *device,
2831 struct device_attribute *attr, char *buf)
2832 {
2833 struct ddb *dev = dev_get_drvdata(device);
2834 struct i2c_adapter *adap;
2835 int temp;
2836 u8 tmp[2];
2837 int num = attr->attr.name[4] - 0x30;
2838
2839 adap = &dev->i2c[num].adap;
2840 if (!adap)
2841 return 0;
2842 if (i2c_read_regs(adap, 0x49, 0, tmp, 2) < 0)
2843 if (i2c_read_regs(adap, 0x4d, 0, tmp, 2) < 0)
2844 return sprintf(buf, "no sensor\n");
2845 temp = tmp[0] * 1000;
2846 return sprintf(buf, "%d\n", temp);
2847 }
2848
2849 static ssize_t led_show(struct device *device,
2850 struct device_attribute *attr, char *buf)
2851 {
2852 struct ddb *dev = dev_get_drvdata(device);
2853 int num = attr->attr.name[3] - 0x30;
2854
2855 return sprintf(buf, "%d\n", dev->leds & (1 << num) ? 1 : 0);
2856 }
2857
2858 static void ddb_set_led(struct ddb *dev, int num, int val)
2859 {
2860 if (!dev->link[0].info->led_num)
2861 return;
2862 switch (dev->port[num].class) {
2863 case DDB_PORT_TUNER:
2864 switch (dev->port[num].type) {
2865 case DDB_TUNER_DVBS_ST:
2866 i2c_write_reg16(&dev->i2c[num].adap,
2867 0x69, 0xf14c, val ? 2 : 0);
2868 break;
2869 case DDB_TUNER_DVBCT_ST:
2870 i2c_write_reg16(&dev->i2c[num].adap,
2871 0x1f, 0xf00e, 0);
2872 i2c_write_reg16(&dev->i2c[num].adap,
2873 0x1f, 0xf00f, val ? 1 : 0);
2874 break;
2875 case DDB_TUNER_XO2 ... DDB_TUNER_DVBC2T2I_SONY:
2876 {
2877 u8 v;
2878
2879 i2c_read_reg(&dev->i2c[num].adap, 0x10, 0x08, &v);
2880 v = (v & ~0x10) | (val ? 0x10 : 0);
2881 i2c_write_reg(&dev->i2c[num].adap, 0x10, 0x08, v);
2882 break;
2883 }
2884 default:
2885 break;
2886 }
2887 break;
2888 }
2889 }
2890
2891 static ssize_t led_store(struct device *device,
2892 struct device_attribute *attr,
2893 const char *buf, size_t count)
2894 {
2895 struct ddb *dev = dev_get_drvdata(device);
2896 int num = attr->attr.name[3] - 0x30;
2897 u32 val;
2898
2899 if (sscanf(buf, "%u\n", &val) != 1)
2900 return -EINVAL;
2901 if (val)
2902 dev->leds |= (1 << num);
2903 else
2904 dev->leds &= ~(1 << num);
2905 ddb_set_led(dev, num, val);
2906 return count;
2907 }
2908
2909 static ssize_t snr_show(struct device *device,
2910 struct device_attribute *attr, char *buf)
2911 {
2912 struct ddb *dev = dev_get_drvdata(device);
2913 char snr[32];
2914 int num = attr->attr.name[3] - 0x30;
2915
2916 if (dev->port[num].type >= DDB_TUNER_XO2) {
2917 if (i2c_read_regs(&dev->i2c[num].adap, 0x10, 0x10, snr, 16) < 0)
2918 return sprintf(buf, "NO SNR\n");
2919 snr[16] = 0;
2920 } else {
2921 /* serial number at 0x100-0x11f */
2922 if (i2c_read_regs16(&dev->i2c[num].adap,
2923 0x57, 0x100, snr, 32) < 0)
2924 if (i2c_read_regs16(&dev->i2c[num].adap,
2925 0x50, 0x100, snr, 32) < 0)
2926 return sprintf(buf, "NO SNR\n");
2927 snr[31] = 0; /* in case it is not terminated on EEPROM */
2928 }
2929 return sprintf(buf, "%s\n", snr);
2930 }
2931
2932 static ssize_t bsnr_show(struct device *device,
2933 struct device_attribute *attr, char *buf)
2934 {
2935 struct ddb *dev = dev_get_drvdata(device);
2936 char snr[16];
2937
2938 ddbridge_flashread(dev, 0, snr, 0x10, 15);
2939 snr[15] = 0; /* in case it is not terminated on EEPROM */
2940 return sprintf(buf, "%s\n", snr);
2941 }
2942
2943 static ssize_t bpsnr_show(struct device *device,
2944 struct device_attribute *attr, char *buf)
2945 {
2946 struct ddb *dev = dev_get_drvdata(device);
2947 unsigned char snr[32];
2948
2949 if (!dev->i2c_num)
2950 return 0;
2951
2952 if (i2c_read_regs16(&dev->i2c[0].adap,
2953 0x50, 0x0000, snr, 32) < 0 ||
2954 snr[0] == 0xff)
2955 return sprintf(buf, "NO SNR\n");
2956 snr[31] = 0; /* in case it is not terminated on EEPROM */
2957 return sprintf(buf, "%s\n", snr);
2958 }
2959
2960 static ssize_t redirect_show(struct device *device,
2961 struct device_attribute *attr, char *buf)
2962 {
2963 return 0;
2964 }
2965
2966 static ssize_t redirect_store(struct device *device,
2967 struct device_attribute *attr,
2968 const char *buf, size_t count)
2969 {
2970 unsigned int i, p;
2971 int res;
2972
2973 if (sscanf(buf, "%x %x\n", &i, &p) != 2)
2974 return -EINVAL;
2975 res = ddb_redirect(i, p);
2976 if (res < 0)
2977 return res;
2978 dev_info(device, "redirect: %02x, %02x\n", i, p);
2979 return count;
2980 }
2981
2982 static ssize_t gap_show(struct device *device,
2983 struct device_attribute *attr, char *buf)
2984 {
2985 struct ddb *dev = dev_get_drvdata(device);
2986 int num = attr->attr.name[3] - 0x30;
2987
2988 return sprintf(buf, "%d\n", dev->port[num].gap);
2989 }
2990
2991 static ssize_t gap_store(struct device *device, struct device_attribute *attr,
2992 const char *buf, size_t count)
2993 {
2994 struct ddb *dev = dev_get_drvdata(device);
2995 int num = attr->attr.name[3] - 0x30;
2996 unsigned int val;
2997
2998 if (sscanf(buf, "%u\n", &val) != 1)
2999 return -EINVAL;
3000 if (val > 128)
3001 return -EINVAL;
3002 if (val == 128)
3003 val = 0xffffffff;
3004 dev->port[num].gap = val;
3005 return count;
3006 }
3007
3008 static ssize_t version_show(struct device *device,
3009 struct device_attribute *attr, char *buf)
3010 {
3011 struct ddb *dev = dev_get_drvdata(device);
3012
3013 return sprintf(buf, "%08x %08x\n",
3014 dev->link[0].ids.hwid, dev->link[0].ids.regmapid);
3015 }
3016
3017 static ssize_t hwid_show(struct device *device,
3018 struct device_attribute *attr, char *buf)
3019 {
3020 struct ddb *dev = dev_get_drvdata(device);
3021
3022 return sprintf(buf, "0x%08X\n", dev->link[0].ids.hwid);
3023 }
3024
3025 static ssize_t regmap_show(struct device *device,
3026 struct device_attribute *attr, char *buf)
3027 {
3028 struct ddb *dev = dev_get_drvdata(device);
3029
3030 return sprintf(buf, "0x%08X\n", dev->link[0].ids.regmapid);
3031 }
3032
3033 static ssize_t fmode_show(struct device *device,
3034 struct device_attribute *attr, char *buf)
3035 {
3036 int num = attr->attr.name[5] - 0x30;
3037 struct ddb *dev = dev_get_drvdata(device);
3038
3039 return sprintf(buf, "%u\n", dev->link[num].lnb.fmode);
3040 }
3041
3042 static ssize_t devid_show(struct device *device,
3043 struct device_attribute *attr, char *buf)
3044 {
3045 int num = attr->attr.name[5] - 0x30;
3046 struct ddb *dev = dev_get_drvdata(device);
3047
3048 return sprintf(buf, "%08x\n", dev->link[num].ids.devid);
3049 }
3050
3051 static ssize_t fmode_store(struct device *device, struct device_attribute *attr,
3052 const char *buf, size_t count)
3053 {
3054 struct ddb *dev = dev_get_drvdata(device);
3055 int num = attr->attr.name[5] - 0x30;
3056 unsigned int val;
3057
3058 if (sscanf(buf, "%u\n", &val) != 1)
3059 return -EINVAL;
3060 if (val > 3)
3061 return -EINVAL;
3062 ddb_lnb_init_fmode(dev, &dev->link[num], val);
3063 return count;
3064 }
3065
3066 static struct device_attribute ddb_attrs[] = {
3067 __ATTR_RO(version),
3068 __ATTR_RO(ports),
3069 __ATTR_RO(ts_irq),
3070 __ATTR_RO(i2c_irq),
3071 __ATTR(gap0, 0664, gap_show, gap_store),
3072 __ATTR(gap1, 0664, gap_show, gap_store),
3073 __ATTR(gap2, 0664, gap_show, gap_store),
3074 __ATTR(gap3, 0664, gap_show, gap_store),
3075 __ATTR(fmode0, 0664, fmode_show, fmode_store),
3076 __ATTR(fmode1, 0664, fmode_show, fmode_store),
3077 __ATTR(fmode2, 0664, fmode_show, fmode_store),
3078 __ATTR(fmode3, 0664, fmode_show, fmode_store),
3079 __ATTR_MRO(devid0, devid_show),
3080 __ATTR_MRO(devid1, devid_show),
3081 __ATTR_MRO(devid2, devid_show),
3082 __ATTR_MRO(devid3, devid_show),
3083 __ATTR_RO(hwid),
3084 __ATTR_RO(regmap),
3085 __ATTR(redirect, 0664, redirect_show, redirect_store),
3086 __ATTR_MRO(snr, bsnr_show),
3087 __ATTR_RO(bpsnr),
3088 __ATTR_NULL,
3089 };
3090
3091 static struct device_attribute ddb_attrs_temp[] = {
3092 __ATTR_RO(temp),
3093 };
3094
3095 static struct device_attribute ddb_attrs_fan[] = {
3096 __ATTR(fan, 0664, fan_show, fan_store),
3097 };
3098
3099 static struct device_attribute ddb_attrs_snr[] = {
3100 __ATTR_MRO(snr0, snr_show),
3101 __ATTR_MRO(snr1, snr_show),
3102 __ATTR_MRO(snr2, snr_show),
3103 __ATTR_MRO(snr3, snr_show),
3104 };
3105
3106 static struct device_attribute ddb_attrs_ctemp[] = {
3107 __ATTR_MRO(temp0, ctemp_show),
3108 __ATTR_MRO(temp1, ctemp_show),
3109 __ATTR_MRO(temp2, ctemp_show),
3110 __ATTR_MRO(temp3, ctemp_show),
3111 };
3112
3113 static struct device_attribute ddb_attrs_led[] = {
3114 __ATTR(led0, 0664, led_show, led_store),
3115 __ATTR(led1, 0664, led_show, led_store),
3116 __ATTR(led2, 0664, led_show, led_store),
3117 __ATTR(led3, 0664, led_show, led_store),
3118 };
3119
3120 static struct device_attribute ddb_attrs_fanspeed[] = {
3121 __ATTR_MRO(fanspeed0, fanspeed_show),
3122 __ATTR_MRO(fanspeed1, fanspeed_show),
3123 __ATTR_MRO(fanspeed2, fanspeed_show),
3124 __ATTR_MRO(fanspeed3, fanspeed_show),
3125 };
3126
3127 static struct class ddb_class = {
3128 .name = "ddbridge",
3129 .owner = THIS_MODULE,
3130 .devnode = ddb_devnode,
3131 };
3132
3133 static int ddb_class_create(void)
3134 {
3135 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
3136 if (ddb_major < 0)
3137 return ddb_major;
3138 if (class_register(&ddb_class) < 0)
3139 return -1;
3140 return 0;
3141 }
3142
3143 static void ddb_class_destroy(void)
3144 {
3145 class_unregister(&ddb_class);
3146 unregister_chrdev(ddb_major, DDB_NAME);
3147 }
3148
3149 static void ddb_device_attrs_del(struct ddb *dev)
3150 {
3151 int i;
3152
3153 for (i = 0; i < 4; i++)
3154 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3155 device_remove_file(dev->ddb_dev,
3156 &ddb_attrs_fanspeed[i]);
3157 for (i = 0; i < dev->link[0].info->temp_num; i++)
3158 device_remove_file(dev->ddb_dev, &ddb_attrs_temp[i]);
3159 for (i = 0; i < dev->link[0].info->fan_num; i++)
3160 device_remove_file(dev->ddb_dev, &ddb_attrs_fan[i]);
3161 for (i = 0; i < dev->i2c_num && i < 4; i++) {
3162 if (dev->link[0].info->led_num)
3163 device_remove_file(dev->ddb_dev, &ddb_attrs_led[i]);
3164 device_remove_file(dev->ddb_dev, &ddb_attrs_snr[i]);
3165 device_remove_file(dev->ddb_dev, &ddb_attrs_ctemp[i]);
3166 }
3167 for (i = 0; ddb_attrs[i].attr.name; i++)
3168 device_remove_file(dev->ddb_dev, &ddb_attrs[i]);
3169 }
3170
3171 static int ddb_device_attrs_add(struct ddb *dev)
3172 {
3173 int i;
3174
3175 for (i = 0; ddb_attrs[i].attr.name; i++)
3176 if (device_create_file(dev->ddb_dev, &ddb_attrs[i]))
3177 goto fail;
3178 for (i = 0; i < dev->link[0].info->temp_num; i++)
3179 if (device_create_file(dev->ddb_dev, &ddb_attrs_temp[i]))
3180 goto fail;
3181 for (i = 0; i < dev->link[0].info->fan_num; i++)
3182 if (device_create_file(dev->ddb_dev, &ddb_attrs_fan[i]))
3183 goto fail;
3184 for (i = 0; (i < dev->i2c_num) && (i < 4); i++) {
3185 if (device_create_file(dev->ddb_dev, &ddb_attrs_snr[i]))
3186 goto fail;
3187 if (device_create_file(dev->ddb_dev, &ddb_attrs_ctemp[i]))
3188 goto fail;
3189 if (dev->link[0].info->led_num)
3190 if (device_create_file(dev->ddb_dev,
3191 &ddb_attrs_led[i]))
3192 goto fail;
3193 }
3194 for (i = 0; i < 4; i++)
3195 if (dev->link[i].info && dev->link[i].info->tempmon_irq)
3196 if (device_create_file(dev->ddb_dev,
3197 &ddb_attrs_fanspeed[i]))
3198 goto fail;
3199 return 0;
3200 fail:
3201 return -1;
3202 }
3203
3204 int ddb_device_create(struct ddb *dev)
3205 {
3206 int res = 0;
3207
3208 if (ddb_num == DDB_MAX_ADAPTER)
3209 return -ENOMEM;
3210 mutex_lock(&ddb_mutex);
3211 dev->nr = ddb_num;
3212 ddbs[dev->nr] = dev;
3213 dev->ddb_dev = device_create(&ddb_class, dev->dev,
3214 MKDEV(ddb_major, dev->nr),
3215 dev, "ddbridge%d", dev->nr);
3216 if (IS_ERR(dev->ddb_dev)) {
3217 res = PTR_ERR(dev->ddb_dev);
3218 dev_info(dev->dev, "Could not create ddbridge%d\n", dev->nr);
3219 goto fail;
3220 }
3221 res = ddb_device_attrs_add(dev);
3222 if (res) {
3223 ddb_device_attrs_del(dev);
3224 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3225 ddbs[dev->nr] = NULL;
3226 dev->ddb_dev = ERR_PTR(-ENODEV);
3227 } else {
3228 ddb_num++;
3229 }
3230 fail:
3231 mutex_unlock(&ddb_mutex);
3232 return res;
3233 }
3234
3235 void ddb_device_destroy(struct ddb *dev)
3236 {
3237 if (IS_ERR(dev->ddb_dev))
3238 return;
3239 ddb_device_attrs_del(dev);
3240 device_destroy(&ddb_class, MKDEV(ddb_major, dev->nr));
3241 }
3242
3243 /****************************************************************************/
3244 /****************************************************************************/
3245 /****************************************************************************/
3246
3247 static void tempmon_setfan(struct ddb_link *link)
3248 {
3249 u32 temp, temp2, pwm;
3250
3251 if ((ddblreadl(link, TEMPMON_CONTROL) &
3252 TEMPMON_CONTROL_OVERTEMP) != 0) {
3253 dev_info(link->dev->dev, "Over temperature condition\n");
3254 link->overtemperature_error = 1;
3255 }
3256 temp = (ddblreadl(link, TEMPMON_SENSOR0) >> 8) & 0xFF;
3257 if (temp & 0x80)
3258 temp = 0;
3259 temp2 = (ddblreadl(link, TEMPMON_SENSOR1) >> 8) & 0xFF;
3260 if (temp2 & 0x80)
3261 temp2 = 0;
3262 if (temp2 > temp)
3263 temp = temp2;
3264
3265 pwm = (ddblreadl(link, TEMPMON_FANCONTROL) >> 8) & 0x0F;
3266 if (pwm > 10)
3267 pwm = 10;
3268
3269 if (temp >= link->temp_tab[pwm]) {
3270 while (pwm < 10 && temp >= link->temp_tab[pwm + 1])
3271 pwm += 1;
3272 } else {
3273 while (pwm > 1 && temp < link->temp_tab[pwm - 2])
3274 pwm -= 1;
3275 }
3276 ddblwritel(link, (pwm << 8), TEMPMON_FANCONTROL);
3277 }
3278
3279 static void temp_handler(void *data)
3280 {
3281 struct ddb_link *link = (struct ddb_link *)data;
3282
3283 spin_lock(&link->temp_lock);
3284 tempmon_setfan(link);
3285 spin_unlock(&link->temp_lock);
3286 }
3287
3288 static int tempmon_init(struct ddb_link *link, int first_time)
3289 {
3290 struct ddb *dev = link->dev;
3291 int status = 0;
3292 u32 l = link->nr;
3293
3294 spin_lock_irq(&link->temp_lock);
3295 if (first_time) {
3296 static u8 temperature_table[11] = {
3297 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80 };
3298
3299 memcpy(link->temp_tab, temperature_table,
3300 sizeof(temperature_table));
3301 }
3302 ddb_irq_set(dev, l, link->info->tempmon_irq, temp_handler, link);
3303 ddblwritel(link, (TEMPMON_CONTROL_OVERTEMP | TEMPMON_CONTROL_AUTOSCAN |
3304 TEMPMON_CONTROL_INTENABLE),
3305 TEMPMON_CONTROL);
3306 ddblwritel(link, (3 << 8), TEMPMON_FANCONTROL);
3307
3308 link->overtemperature_error =
3309 ((ddblreadl(link, TEMPMON_CONTROL) &
3310 TEMPMON_CONTROL_OVERTEMP) != 0);
3311 if (link->overtemperature_error) {
3312 dev_info(link->dev->dev, "Over temperature condition\n");
3313 status = -1;
3314 }
3315 tempmon_setfan(link);
3316 spin_unlock_irq(&link->temp_lock);
3317 return status;
3318 }
3319
3320 static int ddb_init_tempmon(struct ddb_link *link)
3321 {
3322 const struct ddb_info *info = link->info;
3323
3324 if (!info->tempmon_irq)
3325 return 0;
3326 if (info->type == DDB_OCTOPUS_MAX_CT)
3327 if (link->ids.regmapid < 0x00010002)
3328 return 0;
3329 spin_lock_init(&link->temp_lock);
3330 dev_dbg(link->dev->dev, "init_tempmon\n");
3331 return tempmon_init(link, 1);
3332 }
3333
3334 /****************************************************************************/
3335 /****************************************************************************/
3336 /****************************************************************************/
3337
3338 static int ddb_init_boards(struct ddb *dev)
3339 {
3340 const struct ddb_info *info;
3341 struct ddb_link *link;
3342 u32 l;
3343
3344 for (l = 0; l < DDB_MAX_LINK; l++) {
3345 link = &dev->link[l];
3346 info = link->info;
3347
3348 if (!info)
3349 continue;
3350 if (info->board_control) {
3351 ddbwritel(dev, 0, DDB_LINK_TAG(l) | BOARD_CONTROL);
3352 msleep(100);
3353 ddbwritel(dev, info->board_control_2,
3354 DDB_LINK_TAG(l) | BOARD_CONTROL);
3355 usleep_range(2000, 3000);
3356 ddbwritel(dev,
3357 info->board_control_2 | info->board_control,
3358 DDB_LINK_TAG(l) | BOARD_CONTROL);
3359 usleep_range(2000, 3000);
3360 }
3361 ddb_init_tempmon(link);
3362 }
3363 return 0;
3364 }
3365
3366 int ddb_init(struct ddb *dev)
3367 {
3368 mutex_init(&dev->link[0].lnb.lock);
3369 mutex_init(&dev->link[0].flash_mutex);
3370 if (no_init) {
3371 ddb_device_create(dev);
3372 return 0;
3373 }
3374
3375 ddb_init_boards(dev);
3376
3377 if (ddb_i2c_init(dev) < 0)
3378 goto fail1;
3379 ddb_ports_init(dev);
3380 if (ddb_buffers_alloc(dev) < 0) {
3381 dev_info(dev->dev, "Could not allocate buffer memory\n");
3382 goto fail2;
3383 }
3384 if (ddb_ports_attach(dev) < 0)
3385 goto fail3;
3386
3387 ddb_device_create(dev);
3388
3389 if (dev->link[0].info->fan_num) {
3390 ddbwritel(dev, 1, GPIO_DIRECTION);
3391 ddbwritel(dev, 1, GPIO_OUTPUT);
3392 }
3393 return 0;
3394
3395 fail3:
3396 dev_err(dev->dev, "fail3\n");
3397 ddb_ports_detach(dev);
3398 ddb_buffers_free(dev);
3399 fail2:
3400 dev_err(dev->dev, "fail2\n");
3401 ddb_ports_release(dev);
3402 ddb_i2c_release(dev);
3403 fail1:
3404 dev_err(dev->dev, "fail1\n");
3405 return -1;
3406 }
3407
3408 void ddb_unmap(struct ddb *dev)
3409 {
3410 if (dev->regs)
3411 iounmap(dev->regs);
3412 vfree(dev);
3413 }
3414
3415 int ddb_exit_ddbridge(int stage, int error)
3416 {
3417 switch (stage) {
3418 default:
3419 case 2:
3420 destroy_workqueue(ddb_wq);
3421 fallthrough;
3422 case 1:
3423 ddb_class_destroy();
3424 break;
3425 }
3426
3427 return error;
3428 }
3429
3430 int ddb_init_ddbridge(void)
3431 {
3432 if (dma_buf_num < 8)
3433 dma_buf_num = 8;
3434 if (dma_buf_num > 32)
3435 dma_buf_num = 32;
3436 if (dma_buf_size < 1)
3437 dma_buf_size = 1;
3438 if (dma_buf_size > 43)
3439 dma_buf_size = 43;
3440
3441 if (ddb_class_create() < 0)
3442 return -1;
3443 ddb_wq = alloc_workqueue("ddbridge", 0, 0);
3444 if (!ddb_wq)
3445 return ddb_exit_ddbridge(1, -1);
3446
3447 return 0;
3448 }
Linux with added FPC-III support