?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / media / platform / stm32 / stm32-dcmi.c
blobb745f1342c2e3a6e23a440b6d90ee06f6b12e0c2
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for STM32 Digital Camera Memory Interface
4 *
5 * Copyright (C) STMicroelectronics SA 2017
6 * Authors: Yannick Fertre <yannick.fertre@st.com>
7 * Hugues Fruchet <hugues.fruchet@st.com>
8 * for STMicroelectronics.
9 *
10 * This driver is based on atmel_isi.c
11 *
12 */
13
14 #include <linux/clk.h>
15 #include <linux/completion.h>
16 #include <linux/delay.h>
17 #include <linux/dmaengine.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/of.h>
23 #include <linux/of_device.h>
24 #include <linux/of_graph.h>
25 #include <linux/pinctrl/consumer.h>
26 #include <linux/platform_device.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/reset.h>
29 #include <linux/videodev2.h>
30
31 #include <media/v4l2-ctrls.h>
32 #include <media/v4l2-dev.h>
33 #include <media/v4l2-device.h>
34 #include <media/v4l2-event.h>
35 #include <media/v4l2-fwnode.h>
36 #include <media/v4l2-image-sizes.h>
37 #include <media/v4l2-ioctl.h>
38 #include <media/v4l2-rect.h>
39 #include <media/videobuf2-dma-contig.h>
40
41 #define DRV_NAME "stm32-dcmi"
42
43 /* Registers offset for DCMI */
44 #define DCMI_CR 0x00 /* Control Register */
45 #define DCMI_SR 0x04 /* Status Register */
46 #define DCMI_RIS 0x08 /* Raw Interrupt Status register */
47 #define DCMI_IER 0x0C /* Interrupt Enable Register */
48 #define DCMI_MIS 0x10 /* Masked Interrupt Status register */
49 #define DCMI_ICR 0x14 /* Interrupt Clear Register */
50 #define DCMI_ESCR 0x18 /* Embedded Synchronization Code Register */
51 #define DCMI_ESUR 0x1C /* Embedded Synchronization Unmask Register */
52 #define DCMI_CWSTRT 0x20 /* Crop Window STaRT */
53 #define DCMI_CWSIZE 0x24 /* Crop Window SIZE */
54 #define DCMI_DR 0x28 /* Data Register */
55 #define DCMI_IDR 0x2C /* IDentifier Register */
56
57 /* Bits definition for control register (DCMI_CR) */
58 #define CR_CAPTURE BIT(0)
59 #define CR_CM BIT(1)
60 #define CR_CROP BIT(2)
61 #define CR_JPEG BIT(3)
62 #define CR_ESS BIT(4)
63 #define CR_PCKPOL BIT(5)
64 #define CR_HSPOL BIT(6)
65 #define CR_VSPOL BIT(7)
66 #define CR_FCRC_0 BIT(8)
67 #define CR_FCRC_1 BIT(9)
68 #define CR_EDM_0 BIT(10)
69 #define CR_EDM_1 BIT(11)
70 #define CR_ENABLE BIT(14)
71
72 /* Bits definition for status register (DCMI_SR) */
73 #define SR_HSYNC BIT(0)
74 #define SR_VSYNC BIT(1)
75 #define SR_FNE BIT(2)
76
77 /*
78 * Bits definition for interrupt registers
79 * (DCMI_RIS, DCMI_IER, DCMI_MIS, DCMI_ICR)
80 */
81 #define IT_FRAME BIT(0)
82 #define IT_OVR BIT(1)
83 #define IT_ERR BIT(2)
84 #define IT_VSYNC BIT(3)
85 #define IT_LINE BIT(4)
86
87 enum state {
88 STOPPED = 0,
89 WAIT_FOR_BUFFER,
90 RUNNING,
91 };
92
93 #define MIN_WIDTH 16U
94 #define MAX_WIDTH 2592U
95 #define MIN_HEIGHT 16U
96 #define MAX_HEIGHT 2592U
97
98 #define TIMEOUT_MS 1000
99
100 #define OVERRUN_ERROR_THRESHOLD 3
101
102 struct dcmi_graph_entity {
103 struct v4l2_async_subdev asd;
104
105 struct device_node *remote_node;
106 struct v4l2_subdev *source;
107 };
108
109 struct dcmi_format {
110 u32 fourcc;
111 u32 mbus_code;
112 u8 bpp;
113 };
114
115 struct dcmi_framesize {
116 u32 width;
117 u32 height;
118 };
119
120 struct dcmi_buf {
121 struct vb2_v4l2_buffer vb;
122 bool prepared;
123 dma_addr_t paddr;
124 size_t size;
125 struct list_head list;
126 };
127
128 struct stm32_dcmi {
129 /* Protects the access of variables shared within the interrupt */
130 spinlock_t irqlock;
131 struct device *dev;
132 void __iomem *regs;
133 struct resource *res;
134 struct reset_control *rstc;
135 int sequence;
136 struct list_head buffers;
137 struct dcmi_buf *active;
138
139 struct v4l2_device v4l2_dev;
140 struct video_device *vdev;
141 struct v4l2_async_notifier notifier;
142 struct dcmi_graph_entity entity;
143 struct v4l2_format fmt;
144 struct v4l2_rect crop;
145 bool do_crop;
146
147 const struct dcmi_format **sd_formats;
148 unsigned int num_of_sd_formats;
149 const struct dcmi_format *sd_format;
150 struct dcmi_framesize *sd_framesizes;
151 unsigned int num_of_sd_framesizes;
152 struct dcmi_framesize sd_framesize;
153 struct v4l2_rect sd_bounds;
154
155 /* Protect this data structure */
156 struct mutex lock;
157 struct vb2_queue queue;
158
159 struct v4l2_fwnode_bus_parallel bus;
160 enum v4l2_mbus_type bus_type;
161 struct completion complete;
162 struct clk *mclk;
163 enum state state;
164 struct dma_chan *dma_chan;
165 dma_cookie_t dma_cookie;
166 u32 misr;
167 int errors_count;
168 int overrun_count;
169 int buffers_count;
170
171 /* Ensure DMA operations atomicity */
172 struct mutex dma_lock;
173
174 struct media_device mdev;
175 struct media_pad vid_cap_pad;
176 struct media_pipeline pipeline;
177 };
178
179 static inline struct stm32_dcmi *notifier_to_dcmi(struct v4l2_async_notifier *n)
180 {
181 return container_of(n, struct stm32_dcmi, notifier);
182 }
183
184 static inline u32 reg_read(void __iomem *base, u32 reg)
185 {
186 return readl_relaxed(base + reg);
187 }
188
189 static inline void reg_write(void __iomem *base, u32 reg, u32 val)
190 {
191 writel_relaxed(val, base + reg);
192 }
193
194 static inline void reg_set(void __iomem *base, u32 reg, u32 mask)
195 {
196 reg_write(base, reg, reg_read(base, reg) | mask);
197 }
198
199 static inline void reg_clear(void __iomem *base, u32 reg, u32 mask)
200 {
201 reg_write(base, reg, reg_read(base, reg) & ~mask);
202 }
203
204 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf);
205
206 static void dcmi_buffer_done(struct stm32_dcmi *dcmi,
207 struct dcmi_buf *buf,
208 size_t bytesused,
209 int err)
210 {
211 struct vb2_v4l2_buffer *vbuf;
212
213 if (!buf)
214 return;
215
216 list_del_init(&buf->list);
217
218 vbuf = &buf->vb;
219
220 vbuf->sequence = dcmi->sequence++;
221 vbuf->field = V4L2_FIELD_NONE;
222 vbuf->vb2_buf.timestamp = ktime_get_ns();
223 vb2_set_plane_payload(&vbuf->vb2_buf, 0, bytesused);
224 vb2_buffer_done(&vbuf->vb2_buf,
225 err ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
226 dev_dbg(dcmi->dev, "buffer[%d] done seq=%d, bytesused=%zu\n",
227 vbuf->vb2_buf.index, vbuf->sequence, bytesused);
228
229 dcmi->buffers_count++;
230 dcmi->active = NULL;
231 }
232
233 static int dcmi_restart_capture(struct stm32_dcmi *dcmi)
234 {
235 struct dcmi_buf *buf;
236
237 spin_lock_irq(&dcmi->irqlock);
238
239 if (dcmi->state != RUNNING) {
240 spin_unlock_irq(&dcmi->irqlock);
241 return -EINVAL;
242 }
243
244 /* Restart a new DMA transfer with next buffer */
245 if (list_empty(&dcmi->buffers)) {
246 dev_dbg(dcmi->dev, "Capture restart is deferred to next buffer queueing\n");
247 dcmi->state = WAIT_FOR_BUFFER;
248 spin_unlock_irq(&dcmi->irqlock);
249 return 0;
250 }
251 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
252 dcmi->active = buf;
253
254 spin_unlock_irq(&dcmi->irqlock);
255
256 return dcmi_start_capture(dcmi, buf);
257 }
258
259 static void dcmi_dma_callback(void *param)
260 {
261 struct stm32_dcmi *dcmi = (struct stm32_dcmi *)param;
262 struct dma_tx_state state;
263 enum dma_status status;
264 struct dcmi_buf *buf = dcmi->active;
265
266 spin_lock_irq(&dcmi->irqlock);
267
268 /* Check DMA status */
269 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
270
271 switch (status) {
272 case DMA_IN_PROGRESS:
273 dev_dbg(dcmi->dev, "%s: Received DMA_IN_PROGRESS\n", __func__);
274 break;
275 case DMA_PAUSED:
276 dev_err(dcmi->dev, "%s: Received DMA_PAUSED\n", __func__);
277 break;
278 case DMA_ERROR:
279 dev_err(dcmi->dev, "%s: Received DMA_ERROR\n", __func__);
280
281 /* Return buffer to V4L2 in error state */
282 dcmi_buffer_done(dcmi, buf, 0, -EIO);
283 break;
284 case DMA_COMPLETE:
285 dev_dbg(dcmi->dev, "%s: Received DMA_COMPLETE\n", __func__);
286
287 /* Return buffer to V4L2 */
288 dcmi_buffer_done(dcmi, buf, buf->size, 0);
289
290 spin_unlock_irq(&dcmi->irqlock);
291
292 /* Restart capture */
293 if (dcmi_restart_capture(dcmi))
294 dev_err(dcmi->dev, "%s: Cannot restart capture on DMA complete\n",
295 __func__);
296 return;
297 default:
298 dev_err(dcmi->dev, "%s: Received unknown status\n", __func__);
299 break;
300 }
301
302 spin_unlock_irq(&dcmi->irqlock);
303 }
304
305 static int dcmi_start_dma(struct stm32_dcmi *dcmi,
306 struct dcmi_buf *buf)
307 {
308 struct dma_async_tx_descriptor *desc = NULL;
309 struct dma_slave_config config;
310 int ret;
311
312 memset(&config, 0, sizeof(config));
313
314 config.src_addr = (dma_addr_t)dcmi->res->start + DCMI_DR;
315 config.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
316 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
317 config.dst_maxburst = 4;
318
319 /* Configure DMA channel */
320 ret = dmaengine_slave_config(dcmi->dma_chan, &config);
321 if (ret < 0) {
322 dev_err(dcmi->dev, "%s: DMA channel config failed (%d)\n",
323 __func__, ret);
324 return ret;
325 }
326
327 /*
328 * Avoid call of dmaengine_terminate_sync() between
329 * dmaengine_prep_slave_single() and dmaengine_submit()
330 * by locking the whole DMA submission sequence
331 */
332 mutex_lock(&dcmi->dma_lock);
333
334 /* Prepare a DMA transaction */
335 desc = dmaengine_prep_slave_single(dcmi->dma_chan, buf->paddr,
336 buf->size,
337 DMA_DEV_TO_MEM,
338 DMA_PREP_INTERRUPT);
339 if (!desc) {
340 dev_err(dcmi->dev, "%s: DMA dmaengine_prep_slave_single failed for buffer phy=%pad size=%zu\n",
341 __func__, &buf->paddr, buf->size);
342 mutex_unlock(&dcmi->dma_lock);
343 return -EINVAL;
344 }
345
346 /* Set completion callback routine for notification */
347 desc->callback = dcmi_dma_callback;
348 desc->callback_param = dcmi;
349
350 /* Push current DMA transaction in the pending queue */
351 dcmi->dma_cookie = dmaengine_submit(desc);
352 if (dma_submit_error(dcmi->dma_cookie)) {
353 dev_err(dcmi->dev, "%s: DMA submission failed\n", __func__);
354 mutex_unlock(&dcmi->dma_lock);
355 return -ENXIO;
356 }
357
358 mutex_unlock(&dcmi->dma_lock);
359
360 dma_async_issue_pending(dcmi->dma_chan);
361
362 return 0;
363 }
364
365 static int dcmi_start_capture(struct stm32_dcmi *dcmi, struct dcmi_buf *buf)
366 {
367 int ret;
368
369 if (!buf)
370 return -EINVAL;
371
372 ret = dcmi_start_dma(dcmi, buf);
373 if (ret) {
374 dcmi->errors_count++;
375 return ret;
376 }
377
378 /* Enable capture */
379 reg_set(dcmi->regs, DCMI_CR, CR_CAPTURE);
380
381 return 0;
382 }
383
384 static void dcmi_set_crop(struct stm32_dcmi *dcmi)
385 {
386 u32 size, start;
387
388 /* Crop resolution */
389 size = ((dcmi->crop.height - 1) << 16) |
390 ((dcmi->crop.width << 1) - 1);
391 reg_write(dcmi->regs, DCMI_CWSIZE, size);
392
393 /* Crop start point */
394 start = ((dcmi->crop.top) << 16) |
395 ((dcmi->crop.left << 1));
396 reg_write(dcmi->regs, DCMI_CWSTRT, start);
397
398 dev_dbg(dcmi->dev, "Cropping to %ux%u@%u:%u\n",
399 dcmi->crop.width, dcmi->crop.height,
400 dcmi->crop.left, dcmi->crop.top);
401
402 /* Enable crop */
403 reg_set(dcmi->regs, DCMI_CR, CR_CROP);
404 }
405
406 static void dcmi_process_jpeg(struct stm32_dcmi *dcmi)
407 {
408 struct dma_tx_state state;
409 enum dma_status status;
410 struct dcmi_buf *buf = dcmi->active;
411
412 if (!buf)
413 return;
414
415 /*
416 * Because of variable JPEG buffer size sent by sensor,
417 * DMA transfer never completes due to transfer size never reached.
418 * In order to ensure that all the JPEG data are transferred
419 * in active buffer memory, DMA is drained.
420 * Then DMA tx status gives the amount of data transferred
421 * to memory, which is then returned to V4L2 through the active
422 * buffer payload.
423 */
424
425 /* Drain DMA */
426 dmaengine_synchronize(dcmi->dma_chan);
427
428 /* Get DMA residue to get JPEG size */
429 status = dmaengine_tx_status(dcmi->dma_chan, dcmi->dma_cookie, &state);
430 if (status != DMA_ERROR && state.residue < buf->size) {
431 /* Return JPEG buffer to V4L2 with received JPEG buffer size */
432 dcmi_buffer_done(dcmi, buf, buf->size - state.residue, 0);
433 } else {
434 dcmi->errors_count++;
435 dev_err(dcmi->dev, "%s: Cannot get JPEG size from DMA\n",
436 __func__);
437 /* Return JPEG buffer to V4L2 in ERROR state */
438 dcmi_buffer_done(dcmi, buf, 0, -EIO);
439 }
440
441 /* Abort DMA operation */
442 dmaengine_terminate_sync(dcmi->dma_chan);
443
444 /* Restart capture */
445 if (dcmi_restart_capture(dcmi))
446 dev_err(dcmi->dev, "%s: Cannot restart capture on JPEG received\n",
447 __func__);
448 }
449
450 static irqreturn_t dcmi_irq_thread(int irq, void *arg)
451 {
452 struct stm32_dcmi *dcmi = arg;
453
454 spin_lock_irq(&dcmi->irqlock);
455
456 if (dcmi->misr & IT_OVR) {
457 dcmi->overrun_count++;
458 if (dcmi->overrun_count > OVERRUN_ERROR_THRESHOLD)
459 dcmi->errors_count++;
460 }
461 if (dcmi->misr & IT_ERR)
462 dcmi->errors_count++;
463
464 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG &&
465 dcmi->misr & IT_FRAME) {
466 /* JPEG received */
467 spin_unlock_irq(&dcmi->irqlock);
468 dcmi_process_jpeg(dcmi);
469 return IRQ_HANDLED;
470 }
471
472 spin_unlock_irq(&dcmi->irqlock);
473 return IRQ_HANDLED;
474 }
475
476 static irqreturn_t dcmi_irq_callback(int irq, void *arg)
477 {
478 struct stm32_dcmi *dcmi = arg;
479 unsigned long flags;
480
481 spin_lock_irqsave(&dcmi->irqlock, flags);
482
483 dcmi->misr = reg_read(dcmi->regs, DCMI_MIS);
484
485 /* Clear interrupt */
486 reg_set(dcmi->regs, DCMI_ICR, IT_FRAME | IT_OVR | IT_ERR);
487
488 spin_unlock_irqrestore(&dcmi->irqlock, flags);
489
490 return IRQ_WAKE_THREAD;
491 }
492
493 static int dcmi_queue_setup(struct vb2_queue *vq,
494 unsigned int *nbuffers,
495 unsigned int *nplanes,
496 unsigned int sizes[],
497 struct device *alloc_devs[])
498 {
499 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
500 unsigned int size;
501
502 size = dcmi->fmt.fmt.pix.sizeimage;
503
504 /* Make sure the image size is large enough */
505 if (*nplanes)
506 return sizes[0] < size ? -EINVAL : 0;
507
508 *nplanes = 1;
509 sizes[0] = size;
510
511 dev_dbg(dcmi->dev, "Setup queue, count=%d, size=%d\n",
512 *nbuffers, size);
513
514 return 0;
515 }
516
517 static int dcmi_buf_init(struct vb2_buffer *vb)
518 {
519 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
520 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
521
522 INIT_LIST_HEAD(&buf->list);
523
524 return 0;
525 }
526
527 static int dcmi_buf_prepare(struct vb2_buffer *vb)
528 {
529 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
530 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
531 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
532 unsigned long size;
533
534 size = dcmi->fmt.fmt.pix.sizeimage;
535
536 if (vb2_plane_size(vb, 0) < size) {
537 dev_err(dcmi->dev, "%s data will not fit into plane (%lu < %lu)\n",
538 __func__, vb2_plane_size(vb, 0), size);
539 return -EINVAL;
540 }
541
542 vb2_set_plane_payload(vb, 0, size);
543
544 if (!buf->prepared) {
545 /* Get memory addresses */
546 buf->paddr =
547 vb2_dma_contig_plane_dma_addr(&buf->vb.vb2_buf, 0);
548 buf->size = vb2_plane_size(&buf->vb.vb2_buf, 0);
549 buf->prepared = true;
550
551 vb2_set_plane_payload(&buf->vb.vb2_buf, 0, buf->size);
552
553 dev_dbg(dcmi->dev, "buffer[%d] phy=%pad size=%zu\n",
554 vb->index, &buf->paddr, buf->size);
555 }
556
557 return 0;
558 }
559
560 static void dcmi_buf_queue(struct vb2_buffer *vb)
561 {
562 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vb->vb2_queue);
563 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
564 struct dcmi_buf *buf = container_of(vbuf, struct dcmi_buf, vb);
565
566 spin_lock_irq(&dcmi->irqlock);
567
568 /* Enqueue to video buffers list */
569 list_add_tail(&buf->list, &dcmi->buffers);
570
571 if (dcmi->state == WAIT_FOR_BUFFER) {
572 dcmi->state = RUNNING;
573 dcmi->active = buf;
574
575 dev_dbg(dcmi->dev, "Starting capture on buffer[%d] queued\n",
576 buf->vb.vb2_buf.index);
577
578 spin_unlock_irq(&dcmi->irqlock);
579 if (dcmi_start_capture(dcmi, buf))
580 dev_err(dcmi->dev, "%s: Cannot restart capture on overflow or error\n",
581 __func__);
582 return;
583 }
584
585 spin_unlock_irq(&dcmi->irqlock);
586 }
587
588 static struct media_entity *dcmi_find_source(struct stm32_dcmi *dcmi)
589 {
590 struct media_entity *entity = &dcmi->vdev->entity;
591 struct media_pad *pad;
592
593 /* Walk searching for entity having no sink */
594 while (1) {
595 pad = &entity->pads[0];
596 if (!(pad->flags & MEDIA_PAD_FL_SINK))
597 break;
598
599 pad = media_entity_remote_pad(pad);
600 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
601 break;
602
603 entity = pad->entity;
604 }
605
606 return entity;
607 }
608
609 static int dcmi_pipeline_s_fmt(struct stm32_dcmi *dcmi,
610 struct v4l2_subdev_pad_config *pad_cfg,
611 struct v4l2_subdev_format *format)
612 {
613 struct media_entity *entity = &dcmi->entity.source->entity;
614 struct v4l2_subdev *subdev;
615 struct media_pad *sink_pad = NULL;
616 struct media_pad *src_pad = NULL;
617 struct media_pad *pad = NULL;
618 struct v4l2_subdev_format fmt = *format;
619 bool found = false;
620 int ret;
621
622 /*
623 * Starting from sensor subdevice, walk within
624 * pipeline and set format on each subdevice
625 */
626 while (1) {
627 unsigned int i;
628
629 /* Search if current entity has a source pad */
630 for (i = 0; i < entity->num_pads; i++) {
631 pad = &entity->pads[i];
632 if (pad->flags & MEDIA_PAD_FL_SOURCE) {
633 src_pad = pad;
634 found = true;
635 break;
636 }
637 }
638 if (!found)
639 break;
640
641 subdev = media_entity_to_v4l2_subdev(entity);
642
643 /* Propagate format on sink pad if any, otherwise source pad */
644 if (sink_pad)
645 pad = sink_pad;
646
647 dev_dbg(dcmi->dev, "\"%s\":%d pad format set to 0x%x %ux%u\n",
648 subdev->name, pad->index, format->format.code,
649 format->format.width, format->format.height);
650
651 fmt.pad = pad->index;
652 ret = v4l2_subdev_call(subdev, pad, set_fmt, pad_cfg, &fmt);
653 if (ret < 0) {
654 dev_err(dcmi->dev, "%s: Failed to set format 0x%x %ux%u on \"%s\":%d pad (%d)\n",
655 __func__, format->format.code,
656 format->format.width, format->format.height,
657 subdev->name, pad->index, ret);
658 return ret;
659 }
660
661 if (fmt.format.code != format->format.code ||
662 fmt.format.width != format->format.width ||
663 fmt.format.height != format->format.height) {
664 dev_dbg(dcmi->dev, "\"%s\":%d pad format has been changed to 0x%x %ux%u\n",
665 subdev->name, pad->index, fmt.format.code,
666 fmt.format.width, fmt.format.height);
667 }
668
669 /* Walk to next entity */
670 sink_pad = media_entity_remote_pad(src_pad);
671 if (!sink_pad || !is_media_entity_v4l2_subdev(sink_pad->entity))
672 break;
673
674 entity = sink_pad->entity;
675 }
676 *format = fmt;
677
678 return 0;
679 }
680
681 static int dcmi_pipeline_s_stream(struct stm32_dcmi *dcmi, int state)
682 {
683 struct media_entity *entity = &dcmi->vdev->entity;
684 struct v4l2_subdev *subdev;
685 struct media_pad *pad;
686 int ret;
687
688 /* Start/stop all entities within pipeline */
689 while (1) {
690 pad = &entity->pads[0];
691 if (!(pad->flags & MEDIA_PAD_FL_SINK))
692 break;
693
694 pad = media_entity_remote_pad(pad);
695 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
696 break;
697
698 entity = pad->entity;
699 subdev = media_entity_to_v4l2_subdev(entity);
700
701 ret = v4l2_subdev_call(subdev, video, s_stream, state);
702 if (ret < 0 && ret != -ENOIOCTLCMD) {
703 dev_err(dcmi->dev, "%s: \"%s\" failed to %s streaming (%d)\n",
704 __func__, subdev->name,
705 state ? "start" : "stop", ret);
706 return ret;
707 }
708
709 dev_dbg(dcmi->dev, "\"%s\" is %s\n",
710 subdev->name, state ? "started" : "stopped");
711 }
712
713 return 0;
714 }
715
716 static int dcmi_pipeline_start(struct stm32_dcmi *dcmi)
717 {
718 return dcmi_pipeline_s_stream(dcmi, 1);
719 }
720
721 static void dcmi_pipeline_stop(struct stm32_dcmi *dcmi)
722 {
723 dcmi_pipeline_s_stream(dcmi, 0);
724 }
725
726 static int dcmi_start_streaming(struct vb2_queue *vq, unsigned int count)
727 {
728 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
729 struct dcmi_buf *buf, *node;
730 u32 val = 0;
731 int ret;
732
733 ret = pm_runtime_get_sync(dcmi->dev);
734 if (ret < 0) {
735 dev_err(dcmi->dev, "%s: Failed to start streaming, cannot get sync (%d)\n",
736 __func__, ret);
737 goto err_pm_put;
738 }
739
740 ret = media_pipeline_start(&dcmi->vdev->entity, &dcmi->pipeline);
741 if (ret < 0) {
742 dev_err(dcmi->dev, "%s: Failed to start streaming, media pipeline start error (%d)\n",
743 __func__, ret);
744 goto err_pm_put;
745 }
746
747 ret = dcmi_pipeline_start(dcmi);
748 if (ret)
749 goto err_media_pipeline_stop;
750
751 spin_lock_irq(&dcmi->irqlock);
752
753 /* Set bus width */
754 switch (dcmi->bus.bus_width) {
755 case 14:
756 val |= CR_EDM_0 | CR_EDM_1;
757 break;
758 case 12:
759 val |= CR_EDM_1;
760 break;
761 case 10:
762 val |= CR_EDM_0;
763 break;
764 default:
765 /* Set bus width to 8 bits by default */
766 break;
767 }
768
769 /* Set vertical synchronization polarity */
770 if (dcmi->bus.flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
771 val |= CR_VSPOL;
772
773 /* Set horizontal synchronization polarity */
774 if (dcmi->bus.flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
775 val |= CR_HSPOL;
776
777 /* Set pixel clock polarity */
778 if (dcmi->bus.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
779 val |= CR_PCKPOL;
780
781 /*
782 * BT656 embedded synchronisation bus mode.
783 *
784 * Default SAV/EAV mode is supported here with default codes
785 * SAV=0xff000080 & EAV=0xff00009d.
786 * With DCMI this means LSC=SAV=0x80 & LEC=EAV=0x9d.
787 */
788 if (dcmi->bus_type == V4L2_MBUS_BT656) {
789 val |= CR_ESS;
790
791 /* Unmask all codes */
792 reg_write(dcmi->regs, DCMI_ESUR, 0xffffffff);/* FEC:LEC:LSC:FSC */
793
794 /* Trig on LSC=0x80 & LEC=0x9d codes, ignore FSC and FEC */
795 reg_write(dcmi->regs, DCMI_ESCR, 0xff9d80ff);/* FEC:LEC:LSC:FSC */
796 }
797
798 reg_write(dcmi->regs, DCMI_CR, val);
799
800 /* Set crop */
801 if (dcmi->do_crop)
802 dcmi_set_crop(dcmi);
803
804 /* Enable jpeg capture */
805 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
806 reg_set(dcmi->regs, DCMI_CR, CR_CM);/* Snapshot mode */
807
808 /* Enable dcmi */
809 reg_set(dcmi->regs, DCMI_CR, CR_ENABLE);
810
811 dcmi->sequence = 0;
812 dcmi->errors_count = 0;
813 dcmi->overrun_count = 0;
814 dcmi->buffers_count = 0;
815
816 /*
817 * Start transfer if at least one buffer has been queued,
818 * otherwise transfer is deferred at buffer queueing
819 */
820 if (list_empty(&dcmi->buffers)) {
821 dev_dbg(dcmi->dev, "Start streaming is deferred to next buffer queueing\n");
822 dcmi->state = WAIT_FOR_BUFFER;
823 spin_unlock_irq(&dcmi->irqlock);
824 return 0;
825 }
826
827 buf = list_entry(dcmi->buffers.next, struct dcmi_buf, list);
828 dcmi->active = buf;
829
830 dcmi->state = RUNNING;
831
832 dev_dbg(dcmi->dev, "Start streaming, starting capture\n");
833
834 spin_unlock_irq(&dcmi->irqlock);
835 ret = dcmi_start_capture(dcmi, buf);
836 if (ret) {
837 dev_err(dcmi->dev, "%s: Start streaming failed, cannot start capture\n",
838 __func__);
839 goto err_pipeline_stop;
840 }
841
842 /* Enable interruptions */
843 if (dcmi->sd_format->fourcc == V4L2_PIX_FMT_JPEG)
844 reg_set(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
845 else
846 reg_set(dcmi->regs, DCMI_IER, IT_OVR | IT_ERR);
847
848 return 0;
849
850 err_pipeline_stop:
851 dcmi_pipeline_stop(dcmi);
852
853 err_media_pipeline_stop:
854 media_pipeline_stop(&dcmi->vdev->entity);
855
856 err_pm_put:
857 pm_runtime_put(dcmi->dev);
858 spin_lock_irq(&dcmi->irqlock);
859 /*
860 * Return all buffers to vb2 in QUEUED state.
861 * This will give ownership back to userspace
862 */
863 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
864 list_del_init(&buf->list);
865 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_QUEUED);
866 }
867 dcmi->active = NULL;
868 spin_unlock_irq(&dcmi->irqlock);
869
870 return ret;
871 }
872
873 static void dcmi_stop_streaming(struct vb2_queue *vq)
874 {
875 struct stm32_dcmi *dcmi = vb2_get_drv_priv(vq);
876 struct dcmi_buf *buf, *node;
877
878 dcmi_pipeline_stop(dcmi);
879
880 media_pipeline_stop(&dcmi->vdev->entity);
881
882 spin_lock_irq(&dcmi->irqlock);
883
884 /* Disable interruptions */
885 reg_clear(dcmi->regs, DCMI_IER, IT_FRAME | IT_OVR | IT_ERR);
886
887 /* Disable DCMI */
888 reg_clear(dcmi->regs, DCMI_CR, CR_ENABLE);
889
890 /* Return all queued buffers to vb2 in ERROR state */
891 list_for_each_entry_safe(buf, node, &dcmi->buffers, list) {
892 list_del_init(&buf->list);
893 vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
894 }
895
896 dcmi->active = NULL;
897 dcmi->state = STOPPED;
898
899 spin_unlock_irq(&dcmi->irqlock);
900
901 /* Stop all pending DMA operations */
902 mutex_lock(&dcmi->dma_lock);
903 dmaengine_terminate_sync(dcmi->dma_chan);
904 mutex_unlock(&dcmi->dma_lock);
905
906 pm_runtime_put(dcmi->dev);
907
908 if (dcmi->errors_count)
909 dev_warn(dcmi->dev, "Some errors found while streaming: errors=%d (overrun=%d), buffers=%d\n",
910 dcmi->errors_count, dcmi->overrun_count,
911 dcmi->buffers_count);
912 dev_dbg(dcmi->dev, "Stop streaming, errors=%d (overrun=%d), buffers=%d\n",
913 dcmi->errors_count, dcmi->overrun_count,
914 dcmi->buffers_count);
915 }
916
917 static const struct vb2_ops dcmi_video_qops = {
918 .queue_setup = dcmi_queue_setup,
919 .buf_init = dcmi_buf_init,
920 .buf_prepare = dcmi_buf_prepare,
921 .buf_queue = dcmi_buf_queue,
922 .start_streaming = dcmi_start_streaming,
923 .stop_streaming = dcmi_stop_streaming,
924 .wait_prepare = vb2_ops_wait_prepare,
925 .wait_finish = vb2_ops_wait_finish,
926 };
927
928 static int dcmi_g_fmt_vid_cap(struct file *file, void *priv,
929 struct v4l2_format *fmt)
930 {
931 struct stm32_dcmi *dcmi = video_drvdata(file);
932
933 *fmt = dcmi->fmt;
934
935 return 0;
936 }
937
938 static const struct dcmi_format *find_format_by_fourcc(struct stm32_dcmi *dcmi,
939 unsigned int fourcc)
940 {
941 unsigned int num_formats = dcmi->num_of_sd_formats;
942 const struct dcmi_format *fmt;
943 unsigned int i;
944
945 for (i = 0; i < num_formats; i++) {
946 fmt = dcmi->sd_formats[i];
947 if (fmt->fourcc == fourcc)
948 return fmt;
949 }
950
951 return NULL;
952 }
953
954 static void __find_outer_frame_size(struct stm32_dcmi *dcmi,
955 struct v4l2_pix_format *pix,
956 struct dcmi_framesize *framesize)
957 {
958 struct dcmi_framesize *match = NULL;
959 unsigned int i;
960 unsigned int min_err = UINT_MAX;
961
962 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
963 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
964 int w_err = (fsize->width - pix->width);
965 int h_err = (fsize->height - pix->height);
966 int err = w_err + h_err;
967
968 if (w_err >= 0 && h_err >= 0 && err < min_err) {
969 min_err = err;
970 match = fsize;
971 }
972 }
973 if (!match)
974 match = &dcmi->sd_framesizes[0];
975
976 *framesize = *match;
977 }
978
979 static int dcmi_try_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f,
980 const struct dcmi_format **sd_format,
981 struct dcmi_framesize *sd_framesize)
982 {
983 const struct dcmi_format *sd_fmt;
984 struct dcmi_framesize sd_fsize;
985 struct v4l2_pix_format *pix = &f->fmt.pix;
986 struct v4l2_subdev_pad_config pad_cfg;
987 struct v4l2_subdev_format format = {
988 .which = V4L2_SUBDEV_FORMAT_TRY,
989 };
990 bool do_crop;
991 int ret;
992
993 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
994 if (!sd_fmt) {
995 if (!dcmi->num_of_sd_formats)
996 return -ENODATA;
997
998 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
999 pix->pixelformat = sd_fmt->fourcc;
1000 }
1001
1002 /* Limit to hardware capabilities */
1003 pix->width = clamp(pix->width, MIN_WIDTH, MAX_WIDTH);
1004 pix->height = clamp(pix->height, MIN_HEIGHT, MAX_HEIGHT);
1005
1006 /* No crop if JPEG is requested */
1007 do_crop = dcmi->do_crop && (pix->pixelformat != V4L2_PIX_FMT_JPEG);
1008
1009 if (do_crop && dcmi->num_of_sd_framesizes) {
1010 struct dcmi_framesize outer_sd_fsize;
1011 /*
1012 * If crop is requested and sensor have discrete frame sizes,
1013 * select the frame size that is just larger than request
1014 */
1015 __find_outer_frame_size(dcmi, pix, &outer_sd_fsize);
1016 pix->width = outer_sd_fsize.width;
1017 pix->height = outer_sd_fsize.height;
1018 }
1019
1020 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1021 ret = v4l2_subdev_call(dcmi->entity.source, pad, set_fmt,
1022 &pad_cfg, &format);
1023 if (ret < 0)
1024 return ret;
1025
1026 /* Update pix regarding to what sensor can do */
1027 v4l2_fill_pix_format(pix, &format.format);
1028
1029 /* Save resolution that sensor can actually do */
1030 sd_fsize.width = pix->width;
1031 sd_fsize.height = pix->height;
1032
1033 if (do_crop) {
1034 struct v4l2_rect c = dcmi->crop;
1035 struct v4l2_rect max_rect;
1036
1037 /*
1038 * Adjust crop by making the intersection between
1039 * format resolution request and crop request
1040 */
1041 max_rect.top = 0;
1042 max_rect.left = 0;
1043 max_rect.width = pix->width;
1044 max_rect.height = pix->height;
1045 v4l2_rect_map_inside(&c, &max_rect);
1046 c.top = clamp_t(s32, c.top, 0, pix->height - c.height);
1047 c.left = clamp_t(s32, c.left, 0, pix->width - c.width);
1048 dcmi->crop = c;
1049
1050 /* Adjust format resolution request to crop */
1051 pix->width = dcmi->crop.width;
1052 pix->height = dcmi->crop.height;
1053 }
1054
1055 pix->field = V4L2_FIELD_NONE;
1056 pix->bytesperline = pix->width * sd_fmt->bpp;
1057 pix->sizeimage = pix->bytesperline * pix->height;
1058
1059 if (sd_format)
1060 *sd_format = sd_fmt;
1061 if (sd_framesize)
1062 *sd_framesize = sd_fsize;
1063
1064 return 0;
1065 }
1066
1067 static int dcmi_set_fmt(struct stm32_dcmi *dcmi, struct v4l2_format *f)
1068 {
1069 struct v4l2_subdev_format format = {
1070 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1071 };
1072 const struct dcmi_format *sd_format;
1073 struct dcmi_framesize sd_framesize;
1074 struct v4l2_mbus_framefmt *mf = &format.format;
1075 struct v4l2_pix_format *pix = &f->fmt.pix;
1076 int ret;
1077
1078 /*
1079 * Try format, fmt.width/height could have been changed
1080 * to match sensor capability or crop request
1081 * sd_format & sd_framesize will contain what subdev
1082 * can do for this request.
1083 */
1084 ret = dcmi_try_fmt(dcmi, f, &sd_format, &sd_framesize);
1085 if (ret)
1086 return ret;
1087
1088 /* Disable crop if JPEG is requested or BT656 bus is selected */
1089 if (pix->pixelformat == V4L2_PIX_FMT_JPEG &&
1090 dcmi->bus_type != V4L2_MBUS_BT656)
1091 dcmi->do_crop = false;
1092
1093 /* pix to mbus format */
1094 v4l2_fill_mbus_format(mf, pix,
1095 sd_format->mbus_code);
1096 mf->width = sd_framesize.width;
1097 mf->height = sd_framesize.height;
1098
1099 ret = dcmi_pipeline_s_fmt(dcmi, NULL, &format);
1100 if (ret < 0)
1101 return ret;
1102
1103 dev_dbg(dcmi->dev, "Sensor format set to 0x%x %ux%u\n",
1104 mf->code, mf->width, mf->height);
1105 dev_dbg(dcmi->dev, "Buffer format set to %4.4s %ux%u\n",
1106 (char *)&pix->pixelformat,
1107 pix->width, pix->height);
1108
1109 dcmi->fmt = *f;
1110 dcmi->sd_format = sd_format;
1111 dcmi->sd_framesize = sd_framesize;
1112
1113 return 0;
1114 }
1115
1116 static int dcmi_s_fmt_vid_cap(struct file *file, void *priv,
1117 struct v4l2_format *f)
1118 {
1119 struct stm32_dcmi *dcmi = video_drvdata(file);
1120
1121 if (vb2_is_streaming(&dcmi->queue))
1122 return -EBUSY;
1123
1124 return dcmi_set_fmt(dcmi, f);
1125 }
1126
1127 static int dcmi_try_fmt_vid_cap(struct file *file, void *priv,
1128 struct v4l2_format *f)
1129 {
1130 struct stm32_dcmi *dcmi = video_drvdata(file);
1131
1132 return dcmi_try_fmt(dcmi, f, NULL, NULL);
1133 }
1134
1135 static int dcmi_enum_fmt_vid_cap(struct file *file, void *priv,
1136 struct v4l2_fmtdesc *f)
1137 {
1138 struct stm32_dcmi *dcmi = video_drvdata(file);
1139
1140 if (f->index >= dcmi->num_of_sd_formats)
1141 return -EINVAL;
1142
1143 f->pixelformat = dcmi->sd_formats[f->index]->fourcc;
1144 return 0;
1145 }
1146
1147 static int dcmi_get_sensor_format(struct stm32_dcmi *dcmi,
1148 struct v4l2_pix_format *pix)
1149 {
1150 struct v4l2_subdev_format fmt = {
1151 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1152 };
1153 int ret;
1154
1155 ret = v4l2_subdev_call(dcmi->entity.source, pad, get_fmt, NULL, &fmt);
1156 if (ret)
1157 return ret;
1158
1159 v4l2_fill_pix_format(pix, &fmt.format);
1160
1161 return 0;
1162 }
1163
1164 static int dcmi_set_sensor_format(struct stm32_dcmi *dcmi,
1165 struct v4l2_pix_format *pix)
1166 {
1167 const struct dcmi_format *sd_fmt;
1168 struct v4l2_subdev_format format = {
1169 .which = V4L2_SUBDEV_FORMAT_TRY,
1170 };
1171 struct v4l2_subdev_pad_config pad_cfg;
1172 int ret;
1173
1174 sd_fmt = find_format_by_fourcc(dcmi, pix->pixelformat);
1175 if (!sd_fmt) {
1176 if (!dcmi->num_of_sd_formats)
1177 return -ENODATA;
1178
1179 sd_fmt = dcmi->sd_formats[dcmi->num_of_sd_formats - 1];
1180 pix->pixelformat = sd_fmt->fourcc;
1181 }
1182
1183 v4l2_fill_mbus_format(&format.format, pix, sd_fmt->mbus_code);
1184 ret = v4l2_subdev_call(dcmi->entity.source, pad, set_fmt,
1185 &pad_cfg, &format);
1186 if (ret < 0)
1187 return ret;
1188
1189 return 0;
1190 }
1191
1192 static int dcmi_get_sensor_bounds(struct stm32_dcmi *dcmi,
1193 struct v4l2_rect *r)
1194 {
1195 struct v4l2_subdev_selection bounds = {
1196 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1197 .target = V4L2_SEL_TGT_CROP_BOUNDS,
1198 };
1199 unsigned int max_width, max_height, max_pixsize;
1200 struct v4l2_pix_format pix;
1201 unsigned int i;
1202 int ret;
1203
1204 /*
1205 * Get sensor bounds first
1206 */
1207 ret = v4l2_subdev_call(dcmi->entity.source, pad, get_selection,
1208 NULL, &bounds);
1209 if (!ret)
1210 *r = bounds.r;
1211 if (ret != -ENOIOCTLCMD)
1212 return ret;
1213
1214 /*
1215 * If selection is not implemented,
1216 * fallback by enumerating sensor frame sizes
1217 * and take the largest one
1218 */
1219 max_width = 0;
1220 max_height = 0;
1221 max_pixsize = 0;
1222 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1223 struct dcmi_framesize *fsize = &dcmi->sd_framesizes[i];
1224 unsigned int pixsize = fsize->width * fsize->height;
1225
1226 if (pixsize > max_pixsize) {
1227 max_pixsize = pixsize;
1228 max_width = fsize->width;
1229 max_height = fsize->height;
1230 }
1231 }
1232 if (max_pixsize > 0) {
1233 r->top = 0;
1234 r->left = 0;
1235 r->width = max_width;
1236 r->height = max_height;
1237 return 0;
1238 }
1239
1240 /*
1241 * If frame sizes enumeration is not implemented,
1242 * fallback by getting current sensor frame size
1243 */
1244 ret = dcmi_get_sensor_format(dcmi, &pix);
1245 if (ret)
1246 return ret;
1247
1248 r->top = 0;
1249 r->left = 0;
1250 r->width = pix.width;
1251 r->height = pix.height;
1252
1253 return 0;
1254 }
1255
1256 static int dcmi_g_selection(struct file *file, void *fh,
1257 struct v4l2_selection *s)
1258 {
1259 struct stm32_dcmi *dcmi = video_drvdata(file);
1260
1261 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1262 return -EINVAL;
1263
1264 switch (s->target) {
1265 case V4L2_SEL_TGT_CROP_DEFAULT:
1266 case V4L2_SEL_TGT_CROP_BOUNDS:
1267 s->r = dcmi->sd_bounds;
1268 return 0;
1269 case V4L2_SEL_TGT_CROP:
1270 if (dcmi->do_crop) {
1271 s->r = dcmi->crop;
1272 } else {
1273 s->r.top = 0;
1274 s->r.left = 0;
1275 s->r.width = dcmi->fmt.fmt.pix.width;
1276 s->r.height = dcmi->fmt.fmt.pix.height;
1277 }
1278 break;
1279 default:
1280 return -EINVAL;
1281 }
1282
1283 return 0;
1284 }
1285
1286 static int dcmi_s_selection(struct file *file, void *priv,
1287 struct v4l2_selection *s)
1288 {
1289 struct stm32_dcmi *dcmi = video_drvdata(file);
1290 struct v4l2_rect r = s->r;
1291 struct v4l2_rect max_rect;
1292 struct v4l2_pix_format pix;
1293
1294 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
1295 s->target != V4L2_SEL_TGT_CROP)
1296 return -EINVAL;
1297
1298 /* Reset sensor resolution to max resolution */
1299 pix.pixelformat = dcmi->fmt.fmt.pix.pixelformat;
1300 pix.width = dcmi->sd_bounds.width;
1301 pix.height = dcmi->sd_bounds.height;
1302 dcmi_set_sensor_format(dcmi, &pix);
1303
1304 /*
1305 * Make the intersection between
1306 * sensor resolution
1307 * and crop request
1308 */
1309 max_rect.top = 0;
1310 max_rect.left = 0;
1311 max_rect.width = pix.width;
1312 max_rect.height = pix.height;
1313 v4l2_rect_map_inside(&r, &max_rect);
1314 r.top = clamp_t(s32, r.top, 0, pix.height - r.height);
1315 r.left = clamp_t(s32, r.left, 0, pix.width - r.width);
1316
1317 if (!(r.top == dcmi->sd_bounds.top &&
1318 r.left == dcmi->sd_bounds.left &&
1319 r.width == dcmi->sd_bounds.width &&
1320 r.height == dcmi->sd_bounds.height)) {
1321 /* Crop if request is different than sensor resolution */
1322 dcmi->do_crop = true;
1323 dcmi->crop = r;
1324 dev_dbg(dcmi->dev, "s_selection: crop %ux%u@(%u,%u) from %ux%u\n",
1325 r.width, r.height, r.left, r.top,
1326 pix.width, pix.height);
1327 } else {
1328 /* Disable crop */
1329 dcmi->do_crop = false;
1330 dev_dbg(dcmi->dev, "s_selection: crop is disabled\n");
1331 }
1332
1333 s->r = r;
1334 return 0;
1335 }
1336
1337 static int dcmi_querycap(struct file *file, void *priv,
1338 struct v4l2_capability *cap)
1339 {
1340 strscpy(cap->driver, DRV_NAME, sizeof(cap->driver));
1341 strscpy(cap->card, "STM32 Camera Memory Interface",
1342 sizeof(cap->card));
1343 strscpy(cap->bus_info, "platform:dcmi", sizeof(cap->bus_info));
1344 return 0;
1345 }
1346
1347 static int dcmi_enum_input(struct file *file, void *priv,
1348 struct v4l2_input *i)
1349 {
1350 if (i->index != 0)
1351 return -EINVAL;
1352
1353 i->type = V4L2_INPUT_TYPE_CAMERA;
1354 strscpy(i->name, "Camera", sizeof(i->name));
1355 return 0;
1356 }
1357
1358 static int dcmi_g_input(struct file *file, void *priv, unsigned int *i)
1359 {
1360 *i = 0;
1361 return 0;
1362 }
1363
1364 static int dcmi_s_input(struct file *file, void *priv, unsigned int i)
1365 {
1366 if (i > 0)
1367 return -EINVAL;
1368 return 0;
1369 }
1370
1371 static int dcmi_enum_framesizes(struct file *file, void *fh,
1372 struct v4l2_frmsizeenum *fsize)
1373 {
1374 struct stm32_dcmi *dcmi = video_drvdata(file);
1375 const struct dcmi_format *sd_fmt;
1376 struct v4l2_subdev_frame_size_enum fse = {
1377 .index = fsize->index,
1378 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1379 };
1380 int ret;
1381
1382 sd_fmt = find_format_by_fourcc(dcmi, fsize->pixel_format);
1383 if (!sd_fmt)
1384 return -EINVAL;
1385
1386 fse.code = sd_fmt->mbus_code;
1387
1388 ret = v4l2_subdev_call(dcmi->entity.source, pad, enum_frame_size,
1389 NULL, &fse);
1390 if (ret)
1391 return ret;
1392
1393 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1394 fsize->discrete.width = fse.max_width;
1395 fsize->discrete.height = fse.max_height;
1396
1397 return 0;
1398 }
1399
1400 static int dcmi_g_parm(struct file *file, void *priv,
1401 struct v4l2_streamparm *p)
1402 {
1403 struct stm32_dcmi *dcmi = video_drvdata(file);
1404
1405 return v4l2_g_parm_cap(video_devdata(file), dcmi->entity.source, p);
1406 }
1407
1408 static int dcmi_s_parm(struct file *file, void *priv,
1409 struct v4l2_streamparm *p)
1410 {
1411 struct stm32_dcmi *dcmi = video_drvdata(file);
1412
1413 return v4l2_s_parm_cap(video_devdata(file), dcmi->entity.source, p);
1414 }
1415
1416 static int dcmi_enum_frameintervals(struct file *file, void *fh,
1417 struct v4l2_frmivalenum *fival)
1418 {
1419 struct stm32_dcmi *dcmi = video_drvdata(file);
1420 const struct dcmi_format *sd_fmt;
1421 struct v4l2_subdev_frame_interval_enum fie = {
1422 .index = fival->index,
1423 .width = fival->width,
1424 .height = fival->height,
1425 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1426 };
1427 int ret;
1428
1429 sd_fmt = find_format_by_fourcc(dcmi, fival->pixel_format);
1430 if (!sd_fmt)
1431 return -EINVAL;
1432
1433 fie.code = sd_fmt->mbus_code;
1434
1435 ret = v4l2_subdev_call(dcmi->entity.source, pad,
1436 enum_frame_interval, NULL, &fie);
1437 if (ret)
1438 return ret;
1439
1440 fival->type = V4L2_FRMIVAL_TYPE_DISCRETE;
1441 fival->discrete = fie.interval;
1442
1443 return 0;
1444 }
1445
1446 static const struct of_device_id stm32_dcmi_of_match[] = {
1447 { .compatible = "st,stm32-dcmi"},
1448 { /* end node */ },
1449 };
1450 MODULE_DEVICE_TABLE(of, stm32_dcmi_of_match);
1451
1452 static int dcmi_open(struct file *file)
1453 {
1454 struct stm32_dcmi *dcmi = video_drvdata(file);
1455 struct v4l2_subdev *sd = dcmi->entity.source;
1456 int ret;
1457
1458 if (mutex_lock_interruptible(&dcmi->lock))
1459 return -ERESTARTSYS;
1460
1461 ret = v4l2_fh_open(file);
1462 if (ret < 0)
1463 goto unlock;
1464
1465 if (!v4l2_fh_is_singular_file(file))
1466 goto fh_rel;
1467
1468 ret = v4l2_subdev_call(sd, core, s_power, 1);
1469 if (ret < 0 && ret != -ENOIOCTLCMD)
1470 goto fh_rel;
1471
1472 ret = dcmi_set_fmt(dcmi, &dcmi->fmt);
1473 if (ret)
1474 v4l2_subdev_call(sd, core, s_power, 0);
1475 fh_rel:
1476 if (ret)
1477 v4l2_fh_release(file);
1478 unlock:
1479 mutex_unlock(&dcmi->lock);
1480 return ret;
1481 }
1482
1483 static int dcmi_release(struct file *file)
1484 {
1485 struct stm32_dcmi *dcmi = video_drvdata(file);
1486 struct v4l2_subdev *sd = dcmi->entity.source;
1487 bool fh_singular;
1488 int ret;
1489
1490 mutex_lock(&dcmi->lock);
1491
1492 fh_singular = v4l2_fh_is_singular_file(file);
1493
1494 ret = _vb2_fop_release(file, NULL);
1495
1496 if (fh_singular)
1497 v4l2_subdev_call(sd, core, s_power, 0);
1498
1499 mutex_unlock(&dcmi->lock);
1500
1501 return ret;
1502 }
1503
1504 static const struct v4l2_ioctl_ops dcmi_ioctl_ops = {
1505 .vidioc_querycap = dcmi_querycap,
1506
1507 .vidioc_try_fmt_vid_cap = dcmi_try_fmt_vid_cap,
1508 .vidioc_g_fmt_vid_cap = dcmi_g_fmt_vid_cap,
1509 .vidioc_s_fmt_vid_cap = dcmi_s_fmt_vid_cap,
1510 .vidioc_enum_fmt_vid_cap = dcmi_enum_fmt_vid_cap,
1511 .vidioc_g_selection = dcmi_g_selection,
1512 .vidioc_s_selection = dcmi_s_selection,
1513
1514 .vidioc_enum_input = dcmi_enum_input,
1515 .vidioc_g_input = dcmi_g_input,
1516 .vidioc_s_input = dcmi_s_input,
1517
1518 .vidioc_g_parm = dcmi_g_parm,
1519 .vidioc_s_parm = dcmi_s_parm,
1520
1521 .vidioc_enum_framesizes = dcmi_enum_framesizes,
1522 .vidioc_enum_frameintervals = dcmi_enum_frameintervals,
1523
1524 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1525 .vidioc_create_bufs = vb2_ioctl_create_bufs,
1526 .vidioc_querybuf = vb2_ioctl_querybuf,
1527 .vidioc_qbuf = vb2_ioctl_qbuf,
1528 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1529 .vidioc_expbuf = vb2_ioctl_expbuf,
1530 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
1531 .vidioc_streamon = vb2_ioctl_streamon,
1532 .vidioc_streamoff = vb2_ioctl_streamoff,
1533
1534 .vidioc_log_status = v4l2_ctrl_log_status,
1535 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1536 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
1537 };
1538
1539 static const struct v4l2_file_operations dcmi_fops = {
1540 .owner = THIS_MODULE,
1541 .unlocked_ioctl = video_ioctl2,
1542 .open = dcmi_open,
1543 .release = dcmi_release,
1544 .poll = vb2_fop_poll,
1545 .mmap = vb2_fop_mmap,
1546 #ifndef CONFIG_MMU
1547 .get_unmapped_area = vb2_fop_get_unmapped_area,
1548 #endif
1549 .read = vb2_fop_read,
1550 };
1551
1552 static int dcmi_set_default_fmt(struct stm32_dcmi *dcmi)
1553 {
1554 struct v4l2_format f = {
1555 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
1556 .fmt.pix = {
1557 .width = CIF_WIDTH,
1558 .height = CIF_HEIGHT,
1559 .field = V4L2_FIELD_NONE,
1560 .pixelformat = dcmi->sd_formats[0]->fourcc,
1561 },
1562 };
1563 int ret;
1564
1565 ret = dcmi_try_fmt(dcmi, &f, NULL, NULL);
1566 if (ret)
1567 return ret;
1568 dcmi->sd_format = dcmi->sd_formats[0];
1569 dcmi->fmt = f;
1570 return 0;
1571 }
1572
1573 /*
1574 * FIXME: For the time being we only support subdevices
1575 * which expose RGB & YUV "parallel form" mbus code (_2X8).
1576 * Nevertheless, this allows to support serial source subdevices
1577 * and serial to parallel bridges which conform to this.
1578 */
1579 static const struct dcmi_format dcmi_formats[] = {
1580 {
1581 .fourcc = V4L2_PIX_FMT_RGB565,
1582 .mbus_code = MEDIA_BUS_FMT_RGB565_2X8_LE,
1583 .bpp = 2,
1584 }, {
1585 .fourcc = V4L2_PIX_FMT_YUYV,
1586 .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8,
1587 .bpp = 2,
1588 }, {
1589 .fourcc = V4L2_PIX_FMT_UYVY,
1590 .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8,
1591 .bpp = 2,
1592 }, {
1593 .fourcc = V4L2_PIX_FMT_JPEG,
1594 .mbus_code = MEDIA_BUS_FMT_JPEG_1X8,
1595 .bpp = 1,
1596 }, {
1597 .fourcc = V4L2_PIX_FMT_SBGGR8,
1598 .mbus_code = MEDIA_BUS_FMT_SBGGR8_1X8,
1599 .bpp = 1,
1600 }, {
1601 .fourcc = V4L2_PIX_FMT_SGBRG8,
1602 .mbus_code = MEDIA_BUS_FMT_SGBRG8_1X8,
1603 .bpp = 1,
1604 }, {
1605 .fourcc = V4L2_PIX_FMT_SGRBG8,
1606 .mbus_code = MEDIA_BUS_FMT_SGRBG8_1X8,
1607 .bpp = 1,
1608 }, {
1609 .fourcc = V4L2_PIX_FMT_SRGGB8,
1610 .mbus_code = MEDIA_BUS_FMT_SRGGB8_1X8,
1611 .bpp = 1,
1612 },
1613 };
1614
1615 static int dcmi_formats_init(struct stm32_dcmi *dcmi)
1616 {
1617 const struct dcmi_format *sd_fmts[ARRAY_SIZE(dcmi_formats)];
1618 unsigned int num_fmts = 0, i, j;
1619 struct v4l2_subdev *subdev = dcmi->entity.source;
1620 struct v4l2_subdev_mbus_code_enum mbus_code = {
1621 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1622 };
1623
1624 while (!v4l2_subdev_call(subdev, pad, enum_mbus_code,
1625 NULL, &mbus_code)) {
1626 for (i = 0; i < ARRAY_SIZE(dcmi_formats); i++) {
1627 if (dcmi_formats[i].mbus_code != mbus_code.code)
1628 continue;
1629
1630 /* Exclude JPEG if BT656 bus is selected */
1631 if (dcmi_formats[i].fourcc == V4L2_PIX_FMT_JPEG &&
1632 dcmi->bus_type == V4L2_MBUS_BT656)
1633 continue;
1634
1635 /* Code supported, have we got this fourcc yet? */
1636 for (j = 0; j < num_fmts; j++)
1637 if (sd_fmts[j]->fourcc ==
1638 dcmi_formats[i].fourcc) {
1639 /* Already available */
1640 dev_dbg(dcmi->dev, "Skipping fourcc/code: %4.4s/0x%x\n",
1641 (char *)&sd_fmts[j]->fourcc,
1642 mbus_code.code);
1643 break;
1644 }
1645 if (j == num_fmts) {
1646 /* New */
1647 sd_fmts[num_fmts++] = dcmi_formats + i;
1648 dev_dbg(dcmi->dev, "Supported fourcc/code: %4.4s/0x%x\n",
1649 (char *)&sd_fmts[num_fmts - 1]->fourcc,
1650 sd_fmts[num_fmts - 1]->mbus_code);
1651 }
1652 }
1653 mbus_code.index++;
1654 }
1655
1656 if (!num_fmts)
1657 return -ENXIO;
1658
1659 dcmi->num_of_sd_formats = num_fmts;
1660 dcmi->sd_formats = devm_kcalloc(dcmi->dev,
1661 num_fmts, sizeof(struct dcmi_format *),
1662 GFP_KERNEL);
1663 if (!dcmi->sd_formats) {
1664 dev_err(dcmi->dev, "Could not allocate memory\n");
1665 return -ENOMEM;
1666 }
1667
1668 memcpy(dcmi->sd_formats, sd_fmts,
1669 num_fmts * sizeof(struct dcmi_format *));
1670 dcmi->sd_format = dcmi->sd_formats[0];
1671
1672 return 0;
1673 }
1674
1675 static int dcmi_framesizes_init(struct stm32_dcmi *dcmi)
1676 {
1677 unsigned int num_fsize = 0;
1678 struct v4l2_subdev *subdev = dcmi->entity.source;
1679 struct v4l2_subdev_frame_size_enum fse = {
1680 .which = V4L2_SUBDEV_FORMAT_ACTIVE,
1681 .code = dcmi->sd_format->mbus_code,
1682 };
1683 unsigned int ret;
1684 unsigned int i;
1685
1686 /* Allocate discrete framesizes array */
1687 while (!v4l2_subdev_call(subdev, pad, enum_frame_size,
1688 NULL, &fse))
1689 fse.index++;
1690
1691 num_fsize = fse.index;
1692 if (!num_fsize)
1693 return 0;
1694
1695 dcmi->num_of_sd_framesizes = num_fsize;
1696 dcmi->sd_framesizes = devm_kcalloc(dcmi->dev, num_fsize,
1697 sizeof(struct dcmi_framesize),
1698 GFP_KERNEL);
1699 if (!dcmi->sd_framesizes) {
1700 dev_err(dcmi->dev, "Could not allocate memory\n");
1701 return -ENOMEM;
1702 }
1703
1704 /* Fill array with sensor supported framesizes */
1705 dev_dbg(dcmi->dev, "Sensor supports %u frame sizes:\n", num_fsize);
1706 for (i = 0; i < dcmi->num_of_sd_framesizes; i++) {
1707 fse.index = i;
1708 ret = v4l2_subdev_call(subdev, pad, enum_frame_size,
1709 NULL, &fse);
1710 if (ret)
1711 return ret;
1712 dcmi->sd_framesizes[fse.index].width = fse.max_width;
1713 dcmi->sd_framesizes[fse.index].height = fse.max_height;
1714 dev_dbg(dcmi->dev, "%ux%u\n", fse.max_width, fse.max_height);
1715 }
1716
1717 return 0;
1718 }
1719
1720 static int dcmi_graph_notify_complete(struct v4l2_async_notifier *notifier)
1721 {
1722 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1723 int ret;
1724
1725 /*
1726 * Now that the graph is complete,
1727 * we search for the source subdevice
1728 * in order to expose it through V4L2 interface
1729 */
1730 dcmi->entity.source =
1731 media_entity_to_v4l2_subdev(dcmi_find_source(dcmi));
1732 if (!dcmi->entity.source) {
1733 dev_err(dcmi->dev, "Source subdevice not found\n");
1734 return -ENODEV;
1735 }
1736
1737 dcmi->vdev->ctrl_handler = dcmi->entity.source->ctrl_handler;
1738
1739 ret = dcmi_formats_init(dcmi);
1740 if (ret) {
1741 dev_err(dcmi->dev, "No supported mediabus format found\n");
1742 return ret;
1743 }
1744
1745 ret = dcmi_framesizes_init(dcmi);
1746 if (ret) {
1747 dev_err(dcmi->dev, "Could not initialize framesizes\n");
1748 return ret;
1749 }
1750
1751 ret = dcmi_get_sensor_bounds(dcmi, &dcmi->sd_bounds);
1752 if (ret) {
1753 dev_err(dcmi->dev, "Could not get sensor bounds\n");
1754 return ret;
1755 }
1756
1757 ret = dcmi_set_default_fmt(dcmi);
1758 if (ret) {
1759 dev_err(dcmi->dev, "Could not set default format\n");
1760 return ret;
1761 }
1762
1763 return 0;
1764 }
1765
1766 static void dcmi_graph_notify_unbind(struct v4l2_async_notifier *notifier,
1767 struct v4l2_subdev *sd,
1768 struct v4l2_async_subdev *asd)
1769 {
1770 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1771
1772 dev_dbg(dcmi->dev, "Removing %s\n", video_device_node_name(dcmi->vdev));
1773
1774 /* Checks internally if vdev has been init or not */
1775 video_unregister_device(dcmi->vdev);
1776 }
1777
1778 static int dcmi_graph_notify_bound(struct v4l2_async_notifier *notifier,
1779 struct v4l2_subdev *subdev,
1780 struct v4l2_async_subdev *asd)
1781 {
1782 struct stm32_dcmi *dcmi = notifier_to_dcmi(notifier);
1783 unsigned int ret;
1784 int src_pad;
1785
1786 dev_dbg(dcmi->dev, "Subdev \"%s\" bound\n", subdev->name);
1787
1788 /*
1789 * Link this sub-device to DCMI, it could be
1790 * a parallel camera sensor or a bridge
1791 */
1792 src_pad = media_entity_get_fwnode_pad(&subdev->entity,
1793 subdev->fwnode,
1794 MEDIA_PAD_FL_SOURCE);
1795
1796 ret = media_create_pad_link(&subdev->entity, src_pad,
1797 &dcmi->vdev->entity, 0,
1798 MEDIA_LNK_FL_IMMUTABLE |
1799 MEDIA_LNK_FL_ENABLED);
1800 if (ret)
1801 dev_err(dcmi->dev, "Failed to create media pad link with subdev \"%s\"\n",
1802 subdev->name);
1803 else
1804 dev_dbg(dcmi->dev, "DCMI is now linked to \"%s\"\n",
1805 subdev->name);
1806
1807 return ret;
1808 }
1809
1810 static const struct v4l2_async_notifier_operations dcmi_graph_notify_ops = {
1811 .bound = dcmi_graph_notify_bound,
1812 .unbind = dcmi_graph_notify_unbind,
1813 .complete = dcmi_graph_notify_complete,
1814 };
1815
1816 static int dcmi_graph_parse(struct stm32_dcmi *dcmi, struct device_node *node)
1817 {
1818 struct device_node *ep = NULL;
1819 struct device_node *remote;
1820
1821 ep = of_graph_get_next_endpoint(node, ep);
1822 if (!ep)
1823 return -EINVAL;
1824
1825 remote = of_graph_get_remote_port_parent(ep);
1826 of_node_put(ep);
1827 if (!remote)
1828 return -EINVAL;
1829
1830 /* Remote node to connect */
1831 dcmi->entity.remote_node = remote;
1832 dcmi->entity.asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
1833 dcmi->entity.asd.match.fwnode = of_fwnode_handle(remote);
1834 return 0;
1835 }
1836
1837 static int dcmi_graph_init(struct stm32_dcmi *dcmi)
1838 {
1839 int ret;
1840
1841 /* Parse the graph to extract a list of subdevice DT nodes. */
1842 ret = dcmi_graph_parse(dcmi, dcmi->dev->of_node);
1843 if (ret < 0) {
1844 dev_err(dcmi->dev, "Failed to parse graph\n");
1845 return ret;
1846 }
1847
1848 v4l2_async_notifier_init(&dcmi->notifier);
1849
1850 ret = v4l2_async_notifier_add_subdev(&dcmi->notifier,
1851 &dcmi->entity.asd);
1852 if (ret) {
1853 dev_err(dcmi->dev, "Failed to add subdev notifier\n");
1854 of_node_put(dcmi->entity.remote_node);
1855 return ret;
1856 }
1857
1858 dcmi->notifier.ops = &dcmi_graph_notify_ops;
1859
1860 ret = v4l2_async_notifier_register(&dcmi->v4l2_dev, &dcmi->notifier);
1861 if (ret < 0) {
1862 dev_err(dcmi->dev, "Failed to register notifier\n");
1863 v4l2_async_notifier_cleanup(&dcmi->notifier);
1864 return ret;
1865 }
1866
1867 return 0;
1868 }
1869
1870 static int dcmi_probe(struct platform_device *pdev)
1871 {
1872 struct device_node *np = pdev->dev.of_node;
1873 const struct of_device_id *match = NULL;
1874 struct v4l2_fwnode_endpoint ep = { .bus_type = 0 };
1875 struct stm32_dcmi *dcmi;
1876 struct vb2_queue *q;
1877 struct dma_chan *chan;
1878 struct clk *mclk;
1879 int irq;
1880 int ret = 0;
1881
1882 match = of_match_device(of_match_ptr(stm32_dcmi_of_match), &pdev->dev);
1883 if (!match) {
1884 dev_err(&pdev->dev, "Could not find a match in devicetree\n");
1885 return -ENODEV;
1886 }
1887
1888 dcmi = devm_kzalloc(&pdev->dev, sizeof(struct stm32_dcmi), GFP_KERNEL);
1889 if (!dcmi)
1890 return -ENOMEM;
1891
1892 dcmi->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
1893 if (IS_ERR(dcmi->rstc)) {
1894 if (PTR_ERR(dcmi->rstc) != -EPROBE_DEFER)
1895 dev_err(&pdev->dev, "Could not get reset control\n");
1896
1897 return PTR_ERR(dcmi->rstc);
1898 }
1899
1900 /* Get bus characteristics from devicetree */
1901 np = of_graph_get_next_endpoint(np, NULL);
1902 if (!np) {
1903 dev_err(&pdev->dev, "Could not find the endpoint\n");
1904 return -ENODEV;
1905 }
1906
1907 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(np), &ep);
1908 of_node_put(np);
1909 if (ret) {
1910 dev_err(&pdev->dev, "Could not parse the endpoint\n");
1911 return ret;
1912 }
1913
1914 if (ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1915 dev_err(&pdev->dev, "CSI bus not supported\n");
1916 return -ENODEV;
1917 }
1918
1919 if (ep.bus_type == V4L2_MBUS_BT656 &&
1920 ep.bus.parallel.bus_width != 8) {
1921 dev_err(&pdev->dev, "BT656 bus conflicts with %u bits bus width (8 bits required)\n",
1922 ep.bus.parallel.bus_width);
1923 return -ENODEV;
1924 }
1925
1926 dcmi->bus.flags = ep.bus.parallel.flags;
1927 dcmi->bus.bus_width = ep.bus.parallel.bus_width;
1928 dcmi->bus.data_shift = ep.bus.parallel.data_shift;
1929 dcmi->bus_type = ep.bus_type;
1930
1931 irq = platform_get_irq(pdev, 0);
1932 if (irq <= 0)
1933 return irq ? irq : -ENXIO;
1934
1935 dcmi->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1936 if (!dcmi->res) {
1937 dev_err(&pdev->dev, "Could not get resource\n");
1938 return -ENODEV;
1939 }
1940
1941 dcmi->regs = devm_ioremap_resource(&pdev->dev, dcmi->res);
1942 if (IS_ERR(dcmi->regs)) {
1943 dev_err(&pdev->dev, "Could not map registers\n");
1944 return PTR_ERR(dcmi->regs);
1945 }
1946
1947 ret = devm_request_threaded_irq(&pdev->dev, irq, dcmi_irq_callback,
1948 dcmi_irq_thread, IRQF_ONESHOT,
1949 dev_name(&pdev->dev), dcmi);
1950 if (ret) {
1951 dev_err(&pdev->dev, "Unable to request irq %d\n", irq);
1952 return ret;
1953 }
1954
1955 mclk = devm_clk_get(&pdev->dev, "mclk");
1956 if (IS_ERR(mclk)) {
1957 if (PTR_ERR(mclk) != -EPROBE_DEFER)
1958 dev_err(&pdev->dev, "Unable to get mclk\n");
1959 return PTR_ERR(mclk);
1960 }
1961
1962 chan = dma_request_chan(&pdev->dev, "tx");
1963 if (IS_ERR(chan)) {
1964 ret = PTR_ERR(chan);
1965 if (ret != -EPROBE_DEFER)
1966 dev_err(&pdev->dev,
1967 "Failed to request DMA channel: %d\n", ret);
1968 return ret;
1969 }
1970
1971 spin_lock_init(&dcmi->irqlock);
1972 mutex_init(&dcmi->lock);
1973 mutex_init(&dcmi->dma_lock);
1974 init_completion(&dcmi->complete);
1975 INIT_LIST_HEAD(&dcmi->buffers);
1976
1977 dcmi->dev = &pdev->dev;
1978 dcmi->mclk = mclk;
1979 dcmi->state = STOPPED;
1980 dcmi->dma_chan = chan;
1981
1982 q = &dcmi->queue;
1983
1984 dcmi->v4l2_dev.mdev = &dcmi->mdev;
1985
1986 /* Initialize media device */
1987 strscpy(dcmi->mdev.model, DRV_NAME, sizeof(dcmi->mdev.model));
1988 snprintf(dcmi->mdev.bus_info, sizeof(dcmi->mdev.bus_info),
1989 "platform:%s", DRV_NAME);
1990 dcmi->mdev.dev = &pdev->dev;
1991 media_device_init(&dcmi->mdev);
1992
1993 /* Initialize the top-level structure */
1994 ret = v4l2_device_register(&pdev->dev, &dcmi->v4l2_dev);
1995 if (ret)
1996 goto err_media_device_cleanup;
1997
1998 dcmi->vdev = video_device_alloc();
1999 if (!dcmi->vdev) {
2000 ret = -ENOMEM;
2001 goto err_device_unregister;
2002 }
2003
2004 /* Video node */
2005 dcmi->vdev->fops = &dcmi_fops;
2006 dcmi->vdev->v4l2_dev = &dcmi->v4l2_dev;
2007 dcmi->vdev->queue = &dcmi->queue;
2008 strscpy(dcmi->vdev->name, KBUILD_MODNAME, sizeof(dcmi->vdev->name));
2009 dcmi->vdev->release = video_device_release;
2010 dcmi->vdev->ioctl_ops = &dcmi_ioctl_ops;
2011 dcmi->vdev->lock = &dcmi->lock;
2012 dcmi->vdev->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
2013 V4L2_CAP_READWRITE;
2014 video_set_drvdata(dcmi->vdev, dcmi);
2015
2016 /* Media entity pads */
2017 dcmi->vid_cap_pad.flags = MEDIA_PAD_FL_SINK;
2018 ret = media_entity_pads_init(&dcmi->vdev->entity,
2019 1, &dcmi->vid_cap_pad);
2020 if (ret) {
2021 dev_err(dcmi->dev, "Failed to init media entity pad\n");
2022 goto err_device_release;
2023 }
2024 dcmi->vdev->entity.flags |= MEDIA_ENT_FL_DEFAULT;
2025
2026 ret = video_register_device(dcmi->vdev, VFL_TYPE_VIDEO, -1);
2027 if (ret) {
2028 dev_err(dcmi->dev, "Failed to register video device\n");
2029 goto err_media_entity_cleanup;
2030 }
2031
2032 dev_dbg(dcmi->dev, "Device registered as %s\n",
2033 video_device_node_name(dcmi->vdev));
2034
2035 /* Buffer queue */
2036 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2037 q->io_modes = VB2_MMAP | VB2_READ | VB2_DMABUF;
2038 q->lock = &dcmi->lock;
2039 q->drv_priv = dcmi;
2040 q->buf_struct_size = sizeof(struct dcmi_buf);
2041 q->ops = &dcmi_video_qops;
2042 q->mem_ops = &vb2_dma_contig_memops;
2043 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2044 q->min_buffers_needed = 2;
2045 q->dev = &pdev->dev;
2046
2047 ret = vb2_queue_init(q);
2048 if (ret < 0) {
2049 dev_err(&pdev->dev, "Failed to initialize vb2 queue\n");
2050 goto err_media_entity_cleanup;
2051 }
2052
2053 ret = dcmi_graph_init(dcmi);
2054 if (ret < 0)
2055 goto err_media_entity_cleanup;
2056
2057 /* Reset device */
2058 ret = reset_control_assert(dcmi->rstc);
2059 if (ret) {
2060 dev_err(&pdev->dev, "Failed to assert the reset line\n");
2061 goto err_cleanup;
2062 }
2063
2064 usleep_range(3000, 5000);
2065
2066 ret = reset_control_deassert(dcmi->rstc);
2067 if (ret) {
2068 dev_err(&pdev->dev, "Failed to deassert the reset line\n");
2069 goto err_cleanup;
2070 }
2071
2072 dev_info(&pdev->dev, "Probe done\n");
2073
2074 platform_set_drvdata(pdev, dcmi);
2075
2076 pm_runtime_enable(&pdev->dev);
2077
2078 return 0;
2079
2080 err_cleanup:
2081 v4l2_async_notifier_cleanup(&dcmi->notifier);
2082 err_media_entity_cleanup:
2083 media_entity_cleanup(&dcmi->vdev->entity);
2084 err_device_release:
2085 video_device_release(dcmi->vdev);
2086 err_device_unregister:
2087 v4l2_device_unregister(&dcmi->v4l2_dev);
2088 err_media_device_cleanup:
2089 media_device_cleanup(&dcmi->mdev);
2090 dma_release_channel(dcmi->dma_chan);
2091
2092 return ret;
2093 }
2094
2095 static int dcmi_remove(struct platform_device *pdev)
2096 {
2097 struct stm32_dcmi *dcmi = platform_get_drvdata(pdev);
2098
2099 pm_runtime_disable(&pdev->dev);
2100
2101 v4l2_async_notifier_unregister(&dcmi->notifier);
2102 v4l2_async_notifier_cleanup(&dcmi->notifier);
2103 media_entity_cleanup(&dcmi->vdev->entity);
2104 v4l2_device_unregister(&dcmi->v4l2_dev);
2105 media_device_cleanup(&dcmi->mdev);
2106
2107 dma_release_channel(dcmi->dma_chan);
2108
2109 return 0;
2110 }
2111
2112 static __maybe_unused int dcmi_runtime_suspend(struct device *dev)
2113 {
2114 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2115
2116 clk_disable_unprepare(dcmi->mclk);
2117
2118 return 0;
2119 }
2120
2121 static __maybe_unused int dcmi_runtime_resume(struct device *dev)
2122 {
2123 struct stm32_dcmi *dcmi = dev_get_drvdata(dev);
2124 int ret;
2125
2126 ret = clk_prepare_enable(dcmi->mclk);
2127 if (ret)
2128 dev_err(dev, "%s: Failed to prepare_enable clock\n", __func__);
2129
2130 return ret;
2131 }
2132
2133 static __maybe_unused int dcmi_suspend(struct device *dev)
2134 {
2135 /* disable clock */
2136 pm_runtime_force_suspend(dev);
2137
2138 /* change pinctrl state */
2139 pinctrl_pm_select_sleep_state(dev);
2140
2141 return 0;
2142 }
2143
2144 static __maybe_unused int dcmi_resume(struct device *dev)
2145 {
2146 /* restore pinctl default state */
2147 pinctrl_pm_select_default_state(dev);
2148
2149 /* clock enable */
2150 pm_runtime_force_resume(dev);
2151
2152 return 0;
2153 }
2154
2155 static const struct dev_pm_ops dcmi_pm_ops = {
2156 SET_SYSTEM_SLEEP_PM_OPS(dcmi_suspend, dcmi_resume)
2157 SET_RUNTIME_PM_OPS(dcmi_runtime_suspend,
2158 dcmi_runtime_resume, NULL)
2159 };
2160
2161 static struct platform_driver stm32_dcmi_driver = {
2162 .probe = dcmi_probe,
2163 .remove = dcmi_remove,
2164 .driver = {
2165 .name = DRV_NAME,
2166 .of_match_table = of_match_ptr(stm32_dcmi_of_match),
2167 .pm = &dcmi_pm_ops,
2168 },
2169 };
2170
2171 module_platform_driver(stm32_dcmi_driver);
2172
2173 MODULE_AUTHOR("Yannick Fertre <yannick.fertre@st.com>");
2174 MODULE_AUTHOR("Hugues Fruchet <hugues.fruchet@st.com>");
2175 MODULE_DESCRIPTION("STMicroelectronics STM32 Digital Camera Memory Interface driver");
2176 MODULE_LICENSE("GPL");
2177 MODULE_SUPPORTED_DEVICE("video");
Linux with added FPC-III support