1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Amlogic Meson IR remote receiver
5 * Copyright (C) 2014 Beniamino Galvani <b.galvani@gmail.com>
8 #include <linux/device.h>
10 #include <linux/interrupt.h>
12 #include <linux/module.h>
13 #include <linux/of_platform.h>
14 #include <linux/platform_device.h>
15 #include <linux/spinlock.h>
16 #include <linux/bitfield.h>
18 #include <media/rc-core.h>
20 #define DRIVER_NAME "meson-ir"
22 /* valid on all Meson platforms */
23 #define IR_DEC_LDR_ACTIVE 0x00
24 #define IR_DEC_LDR_IDLE 0x04
25 #define IR_DEC_LDR_REPEAT 0x08
26 #define IR_DEC_BIT_0 0x0c
27 #define IR_DEC_REG0 0x10
28 #define IR_DEC_FRAME 0x14
29 #define IR_DEC_STATUS 0x18
30 #define IR_DEC_REG1 0x1c
31 /* only available on Meson 8b and newer */
32 #define IR_DEC_REG2 0x20
34 #define REG0_RATE_MASK GENMASK(11, 0)
36 #define DECODE_MODE_NEC 0x0
37 #define DECODE_MODE_RAW 0x2
39 /* Meson 6b uses REG1 to configure the mode */
40 #define REG1_MODE_MASK GENMASK(8, 7)
41 #define REG1_MODE_SHIFT 7
43 /* Meson 8b / GXBB use REG2 to configure the mode */
44 #define REG2_MODE_MASK GENMASK(3, 0)
45 #define REG2_MODE_SHIFT 0
47 #define REG1_TIME_IV_MASK GENMASK(28, 16)
49 #define REG1_IRQSEL_MASK GENMASK(3, 2)
50 #define REG1_IRQSEL_NEC_MODE 0
51 #define REG1_IRQSEL_RISE_FALL 1
52 #define REG1_IRQSEL_FALL 2
53 #define REG1_IRQSEL_RISE 3
55 #define REG1_RESET BIT(0)
56 #define REG1_ENABLE BIT(15)
58 #define STATUS_IR_DEC_IN BIT(8)
60 #define MESON_TRATE 10 /* us */
68 static void meson_ir_set_mask(struct meson_ir
*ir
, unsigned int reg
,
73 data
= readl(ir
->reg
+ reg
);
75 data
|= (value
& mask
);
76 writel(data
, ir
->reg
+ reg
);
79 static irqreturn_t
meson_ir_irq(int irqno
, void *dev_id
)
81 struct meson_ir
*ir
= dev_id
;
83 struct ir_raw_event rawir
= {};
87 duration
= readl_relaxed(ir
->reg
+ IR_DEC_REG1
);
88 duration
= FIELD_GET(REG1_TIME_IV_MASK
, duration
);
89 rawir
.duration
= duration
* MESON_TRATE
;
91 status
= readl_relaxed(ir
->reg
+ IR_DEC_STATUS
);
92 rawir
.pulse
= !!(status
& STATUS_IR_DEC_IN
);
94 ir_raw_event_store_with_timeout(ir
->rc
, &rawir
);
96 spin_unlock(&ir
->lock
);
101 static int meson_ir_probe(struct platform_device
*pdev
)
103 struct device
*dev
= &pdev
->dev
;
104 struct device_node
*node
= dev
->of_node
;
105 struct resource
*res
;
106 const char *map_name
;
110 ir
= devm_kzalloc(dev
, sizeof(struct meson_ir
), GFP_KERNEL
);
114 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
115 ir
->reg
= devm_ioremap_resource(dev
, res
);
117 return PTR_ERR(ir
->reg
);
119 irq
= platform_get_irq(pdev
, 0);
123 ir
->rc
= devm_rc_allocate_device(dev
, RC_DRIVER_IR_RAW
);
125 dev_err(dev
, "failed to allocate rc device\n");
130 ir
->rc
->device_name
= DRIVER_NAME
;
131 ir
->rc
->input_phys
= DRIVER_NAME
"/input0";
132 ir
->rc
->input_id
.bustype
= BUS_HOST
;
133 map_name
= of_get_property(node
, "linux,rc-map-name", NULL
);
134 ir
->rc
->map_name
= map_name
? map_name
: RC_MAP_EMPTY
;
135 ir
->rc
->allowed_protocols
= RC_PROTO_BIT_ALL_IR_DECODER
;
136 ir
->rc
->rx_resolution
= MESON_TRATE
;
137 ir
->rc
->min_timeout
= 1;
138 ir
->rc
->timeout
= IR_DEFAULT_TIMEOUT
;
139 ir
->rc
->max_timeout
= 10 * IR_DEFAULT_TIMEOUT
;
140 ir
->rc
->driver_name
= DRIVER_NAME
;
142 spin_lock_init(&ir
->lock
);
143 platform_set_drvdata(pdev
, ir
);
145 ret
= devm_rc_register_device(dev
, ir
->rc
);
147 dev_err(dev
, "failed to register rc device\n");
151 ret
= devm_request_irq(dev
, irq
, meson_ir_irq
, 0, NULL
, ir
);
153 dev_err(dev
, "failed to request irq\n");
157 /* Reset the decoder */
158 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_RESET
, REG1_RESET
);
159 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_RESET
, 0);
161 /* Set general operation mode (= raw/software decoding) */
162 if (of_device_is_compatible(node
, "amlogic,meson6-ir"))
163 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_MODE_MASK
,
164 FIELD_PREP(REG1_MODE_MASK
, DECODE_MODE_RAW
));
166 meson_ir_set_mask(ir
, IR_DEC_REG2
, REG2_MODE_MASK
,
167 FIELD_PREP(REG2_MODE_MASK
, DECODE_MODE_RAW
));
170 meson_ir_set_mask(ir
, IR_DEC_REG0
, REG0_RATE_MASK
, MESON_TRATE
- 1);
171 /* IRQ on rising and falling edges */
172 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_IRQSEL_MASK
,
173 FIELD_PREP(REG1_IRQSEL_MASK
, REG1_IRQSEL_RISE_FALL
));
174 /* Enable the decoder */
175 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_ENABLE
, REG1_ENABLE
);
177 dev_info(dev
, "receiver initialized\n");
182 static int meson_ir_remove(struct platform_device
*pdev
)
184 struct meson_ir
*ir
= platform_get_drvdata(pdev
);
187 /* Disable the decoder */
188 spin_lock_irqsave(&ir
->lock
, flags
);
189 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_ENABLE
, 0);
190 spin_unlock_irqrestore(&ir
->lock
, flags
);
195 static void meson_ir_shutdown(struct platform_device
*pdev
)
197 struct device
*dev
= &pdev
->dev
;
198 struct device_node
*node
= dev
->of_node
;
199 struct meson_ir
*ir
= platform_get_drvdata(pdev
);
202 spin_lock_irqsave(&ir
->lock
, flags
);
205 * Set operation mode to NEC/hardware decoding to give
206 * bootloader a chance to power the system back on
208 if (of_device_is_compatible(node
, "amlogic,meson6-ir"))
209 meson_ir_set_mask(ir
, IR_DEC_REG1
, REG1_MODE_MASK
,
210 DECODE_MODE_NEC
<< REG1_MODE_SHIFT
);
212 meson_ir_set_mask(ir
, IR_DEC_REG2
, REG2_MODE_MASK
,
213 DECODE_MODE_NEC
<< REG2_MODE_SHIFT
);
215 /* Set rate to default value */
216 meson_ir_set_mask(ir
, IR_DEC_REG0
, REG0_RATE_MASK
, 0x13);
218 spin_unlock_irqrestore(&ir
->lock
, flags
);
221 static const struct of_device_id meson_ir_match
[] = {
222 { .compatible
= "amlogic,meson6-ir" },
223 { .compatible
= "amlogic,meson8b-ir" },
224 { .compatible
= "amlogic,meson-gxbb-ir" },
227 MODULE_DEVICE_TABLE(of
, meson_ir_match
);
229 static struct platform_driver meson_ir_driver
= {
230 .probe
= meson_ir_probe
,
231 .remove
= meson_ir_remove
,
232 .shutdown
= meson_ir_shutdown
,
235 .of_match_table
= meson_ir_match
,
239 module_platform_driver(meson_ir_driver
);
241 MODULE_DESCRIPTION("Amlogic Meson IR remote receiver driver");
242 MODULE_AUTHOR("Beniamino Galvani <b.galvani@gmail.com>");
243 MODULE_LICENSE("GPL v2");