1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2016 MediaTek Inc.
4 * Author: Yong Wu <yong.wu@mediatek.com>
7 #include <linux/component.h>
8 #include <linux/device.h>
11 #include <linux/module.h>
13 #include <linux/of_platform.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <soc/mediatek/smi.h>
17 #include <dt-bindings/memory/mt2701-larb-port.h>
20 #define SMI_LARB_MMU_EN 0xf00
23 #define MT8167_SMI_LARB_MMU_EN 0xfc0
26 #define REG_SMI_SECUR_CON_BASE 0x5c0
28 /* every register control 8 port, register offset 0x4 */
29 #define REG_SMI_SECUR_CON_OFFSET(id) (((id) >> 3) << 2)
30 #define REG_SMI_SECUR_CON_ADDR(id) \
31 (REG_SMI_SECUR_CON_BASE + REG_SMI_SECUR_CON_OFFSET(id))
34 * every port have 4 bit to control, bit[port + 3] control virtual or physical,
35 * bit[port + 2 : port + 1] control the domain, bit[port] control the security
38 #define SMI_SECUR_CON_VAL_MSK(id) (~(0xf << (((id) & 0x7) << 2)))
39 #define SMI_SECUR_CON_VAL_VIRT(id) BIT((((id) & 0x7) << 2) + 3)
40 /* mt2701 domain should be set to 3 */
41 #define SMI_SECUR_CON_VAL_DOMAIN(id) (0x3 << ((((id) & 0x7) << 2) + 1))
44 #define SMI_LARB_NONSEC_CON(id) (0x380 + ((id) * 4))
45 #define F_MMU_EN BIT(0)
48 #define SMI_BUS_SEL 0x220
49 #define SMI_BUS_LARB_SHIFT(larbid) ((larbid) << 1)
50 /* All are MMU0 defaultly. Only specialize mmu1 here. */
51 #define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
58 struct mtk_smi_common_plat
{
61 u32 bus_sel
; /* Balance some larbs to enter mmu0 or mmu1 */
64 struct mtk_smi_larb_gen
{
65 int port_in_larb
[MTK_LARB_NR_MAX
+ 1];
66 void (*config_port
)(struct device
*dev
);
67 unsigned int larb_direct_to_common_mask
;
73 struct clk
*clk_apb
, *clk_smi
;
74 struct clk
*clk_gals0
, *clk_gals1
;
75 struct clk
*clk_async
; /*only needed by mt2701*/
77 void __iomem
*smi_ao_base
; /* only for gen1 */
78 void __iomem
*base
; /* only for gen2 */
80 const struct mtk_smi_common_plat
*plat
;
83 struct mtk_smi_larb
{ /* larb: local arbiter */
86 struct device
*smi_common_dev
;
87 const struct mtk_smi_larb_gen
*larb_gen
;
92 static int mtk_smi_clk_enable(const struct mtk_smi
*smi
)
96 ret
= clk_prepare_enable(smi
->clk_apb
);
100 ret
= clk_prepare_enable(smi
->clk_smi
);
102 goto err_disable_apb
;
104 ret
= clk_prepare_enable(smi
->clk_gals0
);
106 goto err_disable_smi
;
108 ret
= clk_prepare_enable(smi
->clk_gals1
);
110 goto err_disable_gals0
;
115 clk_disable_unprepare(smi
->clk_gals0
);
117 clk_disable_unprepare(smi
->clk_smi
);
119 clk_disable_unprepare(smi
->clk_apb
);
123 static void mtk_smi_clk_disable(const struct mtk_smi
*smi
)
125 clk_disable_unprepare(smi
->clk_gals1
);
126 clk_disable_unprepare(smi
->clk_gals0
);
127 clk_disable_unprepare(smi
->clk_smi
);
128 clk_disable_unprepare(smi
->clk_apb
);
131 int mtk_smi_larb_get(struct device
*larbdev
)
133 int ret
= pm_runtime_get_sync(larbdev
);
135 return (ret
< 0) ? ret
: 0;
137 EXPORT_SYMBOL_GPL(mtk_smi_larb_get
);
139 void mtk_smi_larb_put(struct device
*larbdev
)
141 pm_runtime_put_sync(larbdev
);
143 EXPORT_SYMBOL_GPL(mtk_smi_larb_put
);
146 mtk_smi_larb_bind(struct device
*dev
, struct device
*master
, void *data
)
148 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
149 struct mtk_smi_larb_iommu
*larb_mmu
= data
;
152 for (i
= 0; i
< MTK_LARB_NR_MAX
; i
++) {
153 if (dev
== larb_mmu
[i
].dev
) {
155 larb
->mmu
= &larb_mmu
[i
].mmu
;
162 static void mtk_smi_larb_config_port_gen2_general(struct device
*dev
)
164 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
168 if (BIT(larb
->larbid
) & larb
->larb_gen
->larb_direct_to_common_mask
)
171 for_each_set_bit(i
, (unsigned long *)larb
->mmu
, 32) {
172 reg
= readl_relaxed(larb
->base
+ SMI_LARB_NONSEC_CON(i
));
174 writel(reg
, larb
->base
+ SMI_LARB_NONSEC_CON(i
));
178 static void mtk_smi_larb_config_port_mt8173(struct device
*dev
)
180 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
182 writel(*larb
->mmu
, larb
->base
+ SMI_LARB_MMU_EN
);
185 static void mtk_smi_larb_config_port_mt8167(struct device
*dev
)
187 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
189 writel(*larb
->mmu
, larb
->base
+ MT8167_SMI_LARB_MMU_EN
);
192 static void mtk_smi_larb_config_port_gen1(struct device
*dev
)
194 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
195 const struct mtk_smi_larb_gen
*larb_gen
= larb
->larb_gen
;
196 struct mtk_smi
*common
= dev_get_drvdata(larb
->smi_common_dev
);
197 int i
, m4u_port_id
, larb_port_num
;
198 u32 sec_con_val
, reg_val
;
200 m4u_port_id
= larb_gen
->port_in_larb
[larb
->larbid
];
201 larb_port_num
= larb_gen
->port_in_larb
[larb
->larbid
+ 1]
202 - larb_gen
->port_in_larb
[larb
->larbid
];
204 for (i
= 0; i
< larb_port_num
; i
++, m4u_port_id
++) {
205 if (*larb
->mmu
& BIT(i
)) {
206 /* bit[port + 3] controls the virtual or physical */
207 sec_con_val
= SMI_SECUR_CON_VAL_VIRT(m4u_port_id
);
209 /* do not need to enable m4u for this port */
212 reg_val
= readl(common
->smi_ao_base
213 + REG_SMI_SECUR_CON_ADDR(m4u_port_id
));
214 reg_val
&= SMI_SECUR_CON_VAL_MSK(m4u_port_id
);
215 reg_val
|= sec_con_val
;
216 reg_val
|= SMI_SECUR_CON_VAL_DOMAIN(m4u_port_id
);
219 + REG_SMI_SECUR_CON_ADDR(m4u_port_id
));
224 mtk_smi_larb_unbind(struct device
*dev
, struct device
*master
, void *data
)
226 /* Do nothing as the iommu is always enabled. */
229 static const struct component_ops mtk_smi_larb_component_ops
= {
230 .bind
= mtk_smi_larb_bind
,
231 .unbind
= mtk_smi_larb_unbind
,
234 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8173
= {
235 /* mt8173 do not need the port in larb */
236 .config_port
= mtk_smi_larb_config_port_mt8173
,
239 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8167
= {
240 /* mt8167 do not need the port in larb */
241 .config_port
= mtk_smi_larb_config_port_mt8167
,
244 static const struct mtk_smi_larb_gen mtk_smi_larb_mt2701
= {
246 LARB0_PORT_OFFSET
, LARB1_PORT_OFFSET
,
247 LARB2_PORT_OFFSET
, LARB3_PORT_OFFSET
249 .config_port
= mtk_smi_larb_config_port_gen1
,
252 static const struct mtk_smi_larb_gen mtk_smi_larb_mt2712
= {
253 .config_port
= mtk_smi_larb_config_port_gen2_general
,
254 .larb_direct_to_common_mask
= BIT(8) | BIT(9), /* bdpsys */
257 static const struct mtk_smi_larb_gen mtk_smi_larb_mt6779
= {
258 .config_port
= mtk_smi_larb_config_port_gen2_general
,
259 .larb_direct_to_common_mask
=
260 BIT(4) | BIT(6) | BIT(11) | BIT(12) | BIT(13),
261 /* DUMMY | IPU0 | IPU1 | CCU | MDLA */
264 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8183
= {
266 .config_port
= mtk_smi_larb_config_port_gen2_general
,
267 .larb_direct_to_common_mask
= BIT(2) | BIT(3) | BIT(7),
268 /* IPU0 | IPU1 | CCU */
271 static const struct mtk_smi_larb_gen mtk_smi_larb_mt8192
= {
272 .config_port
= mtk_smi_larb_config_port_gen2_general
,
275 static const struct of_device_id mtk_smi_larb_of_ids
[] = {
277 .compatible
= "mediatek,mt8167-smi-larb",
278 .data
= &mtk_smi_larb_mt8167
281 .compatible
= "mediatek,mt8173-smi-larb",
282 .data
= &mtk_smi_larb_mt8173
285 .compatible
= "mediatek,mt2701-smi-larb",
286 .data
= &mtk_smi_larb_mt2701
289 .compatible
= "mediatek,mt2712-smi-larb",
290 .data
= &mtk_smi_larb_mt2712
293 .compatible
= "mediatek,mt6779-smi-larb",
294 .data
= &mtk_smi_larb_mt6779
297 .compatible
= "mediatek,mt8183-smi-larb",
298 .data
= &mtk_smi_larb_mt8183
301 .compatible
= "mediatek,mt8192-smi-larb",
302 .data
= &mtk_smi_larb_mt8192
307 static int mtk_smi_larb_probe(struct platform_device
*pdev
)
309 struct mtk_smi_larb
*larb
;
310 struct resource
*res
;
311 struct device
*dev
= &pdev
->dev
;
312 struct device_node
*smi_node
;
313 struct platform_device
*smi_pdev
;
315 larb
= devm_kzalloc(dev
, sizeof(*larb
), GFP_KERNEL
);
319 larb
->larb_gen
= of_device_get_match_data(dev
);
320 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
321 larb
->base
= devm_ioremap_resource(dev
, res
);
322 if (IS_ERR(larb
->base
))
323 return PTR_ERR(larb
->base
);
325 larb
->smi
.clk_apb
= devm_clk_get(dev
, "apb");
326 if (IS_ERR(larb
->smi
.clk_apb
))
327 return PTR_ERR(larb
->smi
.clk_apb
);
329 larb
->smi
.clk_smi
= devm_clk_get(dev
, "smi");
330 if (IS_ERR(larb
->smi
.clk_smi
))
331 return PTR_ERR(larb
->smi
.clk_smi
);
333 if (larb
->larb_gen
->has_gals
) {
334 /* The larbs may still haven't gals even if the SoC support.*/
335 larb
->smi
.clk_gals0
= devm_clk_get(dev
, "gals");
336 if (PTR_ERR(larb
->smi
.clk_gals0
) == -ENOENT
)
337 larb
->smi
.clk_gals0
= NULL
;
338 else if (IS_ERR(larb
->smi
.clk_gals0
))
339 return PTR_ERR(larb
->smi
.clk_gals0
);
343 smi_node
= of_parse_phandle(dev
->of_node
, "mediatek,smi", 0);
347 smi_pdev
= of_find_device_by_node(smi_node
);
348 of_node_put(smi_node
);
350 if (!platform_get_drvdata(smi_pdev
))
351 return -EPROBE_DEFER
;
352 larb
->smi_common_dev
= &smi_pdev
->dev
;
354 dev_err(dev
, "Failed to get the smi_common device\n");
358 pm_runtime_enable(dev
);
359 platform_set_drvdata(pdev
, larb
);
360 return component_add(dev
, &mtk_smi_larb_component_ops
);
363 static int mtk_smi_larb_remove(struct platform_device
*pdev
)
365 pm_runtime_disable(&pdev
->dev
);
366 component_del(&pdev
->dev
, &mtk_smi_larb_component_ops
);
370 static int __maybe_unused
mtk_smi_larb_resume(struct device
*dev
)
372 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
373 const struct mtk_smi_larb_gen
*larb_gen
= larb
->larb_gen
;
376 /* Power on smi-common. */
377 ret
= pm_runtime_get_sync(larb
->smi_common_dev
);
379 dev_err(dev
, "Failed to pm get for smi-common(%d).\n", ret
);
383 ret
= mtk_smi_clk_enable(&larb
->smi
);
385 dev_err(dev
, "Failed to enable clock(%d).\n", ret
);
386 pm_runtime_put_sync(larb
->smi_common_dev
);
390 /* Configure the basic setting for this larb */
391 larb_gen
->config_port(dev
);
396 static int __maybe_unused
mtk_smi_larb_suspend(struct device
*dev
)
398 struct mtk_smi_larb
*larb
= dev_get_drvdata(dev
);
400 mtk_smi_clk_disable(&larb
->smi
);
401 pm_runtime_put_sync(larb
->smi_common_dev
);
405 static const struct dev_pm_ops smi_larb_pm_ops
= {
406 SET_RUNTIME_PM_OPS(mtk_smi_larb_suspend
, mtk_smi_larb_resume
, NULL
)
407 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend
,
408 pm_runtime_force_resume
)
411 static struct platform_driver mtk_smi_larb_driver
= {
412 .probe
= mtk_smi_larb_probe
,
413 .remove
= mtk_smi_larb_remove
,
415 .name
= "mtk-smi-larb",
416 .of_match_table
= mtk_smi_larb_of_ids
,
417 .pm
= &smi_larb_pm_ops
,
421 static const struct mtk_smi_common_plat mtk_smi_common_gen1
= {
425 static const struct mtk_smi_common_plat mtk_smi_common_gen2
= {
429 static const struct mtk_smi_common_plat mtk_smi_common_mt6779
= {
432 .bus_sel
= F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
433 F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
436 static const struct mtk_smi_common_plat mtk_smi_common_mt8183
= {
439 .bus_sel
= F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
443 static const struct mtk_smi_common_plat mtk_smi_common_mt8192
= {
446 .bus_sel
= F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
450 static const struct of_device_id mtk_smi_common_of_ids
[] = {
452 .compatible
= "mediatek,mt8173-smi-common",
453 .data
= &mtk_smi_common_gen2
,
456 .compatible
= "mediatek,mt8167-smi-common",
457 .data
= &mtk_smi_common_gen2
,
460 .compatible
= "mediatek,mt2701-smi-common",
461 .data
= &mtk_smi_common_gen1
,
464 .compatible
= "mediatek,mt2712-smi-common",
465 .data
= &mtk_smi_common_gen2
,
468 .compatible
= "mediatek,mt6779-smi-common",
469 .data
= &mtk_smi_common_mt6779
,
472 .compatible
= "mediatek,mt8183-smi-common",
473 .data
= &mtk_smi_common_mt8183
,
476 .compatible
= "mediatek,mt8192-smi-common",
477 .data
= &mtk_smi_common_mt8192
,
482 static int mtk_smi_common_probe(struct platform_device
*pdev
)
484 struct device
*dev
= &pdev
->dev
;
485 struct mtk_smi
*common
;
486 struct resource
*res
;
489 common
= devm_kzalloc(dev
, sizeof(*common
), GFP_KERNEL
);
493 common
->plat
= of_device_get_match_data(dev
);
495 common
->clk_apb
= devm_clk_get(dev
, "apb");
496 if (IS_ERR(common
->clk_apb
))
497 return PTR_ERR(common
->clk_apb
);
499 common
->clk_smi
= devm_clk_get(dev
, "smi");
500 if (IS_ERR(common
->clk_smi
))
501 return PTR_ERR(common
->clk_smi
);
503 if (common
->plat
->has_gals
) {
504 common
->clk_gals0
= devm_clk_get(dev
, "gals0");
505 if (IS_ERR(common
->clk_gals0
))
506 return PTR_ERR(common
->clk_gals0
);
508 common
->clk_gals1
= devm_clk_get(dev
, "gals1");
509 if (IS_ERR(common
->clk_gals1
))
510 return PTR_ERR(common
->clk_gals1
);
514 * for mtk smi gen 1, we need to get the ao(always on) base to config
515 * m4u port, and we need to enable the aync clock for transform the smi
516 * clock into emi clock domain, but for mtk smi gen2, there's no smi ao
519 if (common
->plat
->gen
== MTK_SMI_GEN1
) {
520 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
521 common
->smi_ao_base
= devm_ioremap_resource(dev
, res
);
522 if (IS_ERR(common
->smi_ao_base
))
523 return PTR_ERR(common
->smi_ao_base
);
525 common
->clk_async
= devm_clk_get(dev
, "async");
526 if (IS_ERR(common
->clk_async
))
527 return PTR_ERR(common
->clk_async
);
529 ret
= clk_prepare_enable(common
->clk_async
);
533 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
534 common
->base
= devm_ioremap_resource(dev
, res
);
535 if (IS_ERR(common
->base
))
536 return PTR_ERR(common
->base
);
538 pm_runtime_enable(dev
);
539 platform_set_drvdata(pdev
, common
);
543 static int mtk_smi_common_remove(struct platform_device
*pdev
)
545 pm_runtime_disable(&pdev
->dev
);
549 static int __maybe_unused
mtk_smi_common_resume(struct device
*dev
)
551 struct mtk_smi
*common
= dev_get_drvdata(dev
);
552 u32 bus_sel
= common
->plat
->bus_sel
;
555 ret
= mtk_smi_clk_enable(common
);
557 dev_err(common
->dev
, "Failed to enable clock(%d).\n", ret
);
561 if (common
->plat
->gen
== MTK_SMI_GEN2
&& bus_sel
)
562 writel(bus_sel
, common
->base
+ SMI_BUS_SEL
);
566 static int __maybe_unused
mtk_smi_common_suspend(struct device
*dev
)
568 struct mtk_smi
*common
= dev_get_drvdata(dev
);
570 mtk_smi_clk_disable(common
);
574 static const struct dev_pm_ops smi_common_pm_ops
= {
575 SET_RUNTIME_PM_OPS(mtk_smi_common_suspend
, mtk_smi_common_resume
, NULL
)
576 SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend
,
577 pm_runtime_force_resume
)
580 static struct platform_driver mtk_smi_common_driver
= {
581 .probe
= mtk_smi_common_probe
,
582 .remove
= mtk_smi_common_remove
,
584 .name
= "mtk-smi-common",
585 .of_match_table
= mtk_smi_common_of_ids
,
586 .pm
= &smi_common_pm_ops
,
590 static int __init
mtk_smi_init(void)
594 ret
= platform_driver_register(&mtk_smi_common_driver
);
596 pr_err("Failed to register SMI driver\n");
600 ret
= platform_driver_register(&mtk_smi_larb_driver
);
602 pr_err("Failed to register SMI-LARB driver\n");
608 platform_driver_unregister(&mtk_smi_common_driver
);
612 module_init(mtk_smi_init
);