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Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / mfd / ab8500-core.c
bloba3bac9da8cbbc302ef117836703bcc7259980c87
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * Copyright (C) ST-Ericsson SA 2010
4 *
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 * Author: Mattias Wallin <mattias.wallin@stericsson.com>
8 */
9
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/delay.h>
16 #include <linux/interrupt.h>
17 #include <linux/moduleparam.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/core.h>
20 #include <linux/mfd/abx500.h>
21 #include <linux/mfd/abx500/ab8500.h>
22 #include <linux/mfd/abx500/ab8500-bm.h>
23 #include <linux/mfd/dbx500-prcmu.h>
24 #include <linux/regulator/ab8500.h>
25 #include <linux/of.h>
26 #include <linux/of_device.h>
27
28 /*
29 * Interrupt register offsets
30 * Bank : 0x0E
31 */
32 #define AB8500_IT_SOURCE1_REG 0x00
33 #define AB8500_IT_SOURCE2_REG 0x01
34 #define AB8500_IT_SOURCE3_REG 0x02
35 #define AB8500_IT_SOURCE4_REG 0x03
36 #define AB8500_IT_SOURCE5_REG 0x04
37 #define AB8500_IT_SOURCE6_REG 0x05
38 #define AB8500_IT_SOURCE7_REG 0x06
39 #define AB8500_IT_SOURCE8_REG 0x07
40 #define AB9540_IT_SOURCE13_REG 0x0C
41 #define AB8500_IT_SOURCE19_REG 0x12
42 #define AB8500_IT_SOURCE20_REG 0x13
43 #define AB8500_IT_SOURCE21_REG 0x14
44 #define AB8500_IT_SOURCE22_REG 0x15
45 #define AB8500_IT_SOURCE23_REG 0x16
46 #define AB8500_IT_SOURCE24_REG 0x17
47
48 /*
49 * latch registers
50 */
51 #define AB8500_IT_LATCH1_REG 0x20
52 #define AB8500_IT_LATCH2_REG 0x21
53 #define AB8500_IT_LATCH3_REG 0x22
54 #define AB8500_IT_LATCH4_REG 0x23
55 #define AB8500_IT_LATCH5_REG 0x24
56 #define AB8500_IT_LATCH6_REG 0x25
57 #define AB8500_IT_LATCH7_REG 0x26
58 #define AB8500_IT_LATCH8_REG 0x27
59 #define AB8500_IT_LATCH9_REG 0x28
60 #define AB8500_IT_LATCH10_REG 0x29
61 #define AB8500_IT_LATCH12_REG 0x2B
62 #define AB9540_IT_LATCH13_REG 0x2C
63 #define AB8500_IT_LATCH19_REG 0x32
64 #define AB8500_IT_LATCH20_REG 0x33
65 #define AB8500_IT_LATCH21_REG 0x34
66 #define AB8500_IT_LATCH22_REG 0x35
67 #define AB8500_IT_LATCH23_REG 0x36
68 #define AB8500_IT_LATCH24_REG 0x37
69
70 /*
71 * mask registers
72 */
73
74 #define AB8500_IT_MASK1_REG 0x40
75 #define AB8500_IT_MASK2_REG 0x41
76 #define AB8500_IT_MASK3_REG 0x42
77 #define AB8500_IT_MASK4_REG 0x43
78 #define AB8500_IT_MASK5_REG 0x44
79 #define AB8500_IT_MASK6_REG 0x45
80 #define AB8500_IT_MASK7_REG 0x46
81 #define AB8500_IT_MASK8_REG 0x47
82 #define AB8500_IT_MASK9_REG 0x48
83 #define AB8500_IT_MASK10_REG 0x49
84 #define AB8500_IT_MASK11_REG 0x4A
85 #define AB8500_IT_MASK12_REG 0x4B
86 #define AB8500_IT_MASK13_REG 0x4C
87 #define AB8500_IT_MASK14_REG 0x4D
88 #define AB8500_IT_MASK15_REG 0x4E
89 #define AB8500_IT_MASK16_REG 0x4F
90 #define AB8500_IT_MASK17_REG 0x50
91 #define AB8500_IT_MASK18_REG 0x51
92 #define AB8500_IT_MASK19_REG 0x52
93 #define AB8500_IT_MASK20_REG 0x53
94 #define AB8500_IT_MASK21_REG 0x54
95 #define AB8500_IT_MASK22_REG 0x55
96 #define AB8500_IT_MASK23_REG 0x56
97 #define AB8500_IT_MASK24_REG 0x57
98 #define AB8500_IT_MASK25_REG 0x58
99
100 /*
101 * latch hierarchy registers
102 */
103 #define AB8500_IT_LATCHHIER1_REG 0x60
104 #define AB8500_IT_LATCHHIER2_REG 0x61
105 #define AB8500_IT_LATCHHIER3_REG 0x62
106 #define AB8540_IT_LATCHHIER4_REG 0x63
107
108 #define AB8500_IT_LATCHHIER_NUM 3
109 #define AB8540_IT_LATCHHIER_NUM 4
110
111 #define AB8500_REV_REG 0x80
112 #define AB8500_IC_NAME_REG 0x82
113 #define AB8500_SWITCH_OFF_STATUS 0x00
114
115 #define AB8500_TURN_ON_STATUS 0x00
116 #define AB8505_TURN_ON_STATUS_2 0x04
117
118 #define AB8500_CH_USBCH_STAT1_REG 0x02
119 #define VBUS_DET_DBNC100 0x02
120 #define VBUS_DET_DBNC1 0x01
121
122 static DEFINE_SPINLOCK(on_stat_lock);
123 static u8 turn_on_stat_mask = 0xFF;
124 static u8 turn_on_stat_set;
125 static bool no_bm; /* No battery management */
126 /*
127 * not really modular, but the easiest way to keep compat with existing
128 * bootargs behaviour is to continue using module_param here.
129 */
130 module_param(no_bm, bool, S_IRUGO);
131
132 #define AB9540_MODEM_CTRL2_REG 0x23
133 #define AB9540_MODEM_CTRL2_SWDBBRSTN_BIT BIT(2)
134
135 /*
136 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
137 * numbers are indexed into this array with (num / 8). The interupts are
138 * defined in linux/mfd/ab8500.h
139 *
140 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
141 * offset 0.
142 */
143 /* AB8500 support */
144 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
145 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21,
146 };
147
148 /* AB9540 / AB8505 support */
149 static const int ab9540_irq_regoffset[AB9540_NUM_IRQ_REGS] = {
150 0, 1, 2, 3, 4, 6, 7, 8, 9, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22, 23
151 };
152
153 /* AB8540 support */
154 static const int ab8540_irq_regoffset[AB8540_NUM_IRQ_REGS] = {
155 0, 1, 2, 3, 4, -1, -1, -1, -1, 11, 18, 19, 20, 21, 12, 13, 24, 5, 22,
156 23, 25, 26, 27, 28, 29, 30, 31,
157 };
158
159 static const char ab8500_version_str[][7] = {
160 [AB8500_VERSION_AB8500] = "AB8500",
161 [AB8500_VERSION_AB8505] = "AB8505",
162 [AB8500_VERSION_AB9540] = "AB9540",
163 [AB8500_VERSION_AB8540] = "AB8540",
164 };
165
166 static int ab8500_prcmu_write(struct ab8500 *ab8500, u16 addr, u8 data)
167 {
168 int ret;
169
170 ret = prcmu_abb_write((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
171 if (ret < 0)
172 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
173 return ret;
174 }
175
176 static int ab8500_prcmu_write_masked(struct ab8500 *ab8500, u16 addr, u8 mask,
177 u8 data)
178 {
179 int ret;
180
181 ret = prcmu_abb_write_masked((u8)(addr >> 8), (u8)(addr & 0xFF), &data,
182 &mask, 1);
183 if (ret < 0)
184 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
185 return ret;
186 }
187
188 static int ab8500_prcmu_read(struct ab8500 *ab8500, u16 addr)
189 {
190 int ret;
191 u8 data;
192
193 ret = prcmu_abb_read((u8)(addr >> 8), (u8)(addr & 0xFF), &data, 1);
194 if (ret < 0) {
195 dev_err(ab8500->dev, "prcmu i2c error %d\n", ret);
196 return ret;
197 }
198 return (int)data;
199 }
200
201 static int ab8500_get_chip_id(struct device *dev)
202 {
203 struct ab8500 *ab8500;
204
205 if (!dev)
206 return -EINVAL;
207 ab8500 = dev_get_drvdata(dev->parent);
208 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
209 }
210
211 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
212 u8 reg, u8 data)
213 {
214 int ret;
215 /*
216 * Put the u8 bank and u8 register together into a an u16.
217 * The bank on higher 8 bits and register in lower 8 bits.
218 */
219 u16 addr = ((u16)bank) << 8 | reg;
220
221 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
222
223 mutex_lock(&ab8500->lock);
224
225 ret = ab8500->write(ab8500, addr, data);
226 if (ret < 0)
227 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
228 addr, ret);
229 mutex_unlock(&ab8500->lock);
230
231 return ret;
232 }
233
234 static int ab8500_set_register(struct device *dev, u8 bank,
235 u8 reg, u8 value)
236 {
237 int ret;
238 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
239
240 atomic_inc(&ab8500->transfer_ongoing);
241 ret = set_register_interruptible(ab8500, bank, reg, value);
242 atomic_dec(&ab8500->transfer_ongoing);
243 return ret;
244 }
245
246 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
247 u8 reg, u8 *value)
248 {
249 int ret;
250 u16 addr = ((u16)bank) << 8 | reg;
251
252 mutex_lock(&ab8500->lock);
253
254 ret = ab8500->read(ab8500, addr);
255 if (ret < 0)
256 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
257 addr, ret);
258 else
259 *value = ret;
260
261 mutex_unlock(&ab8500->lock);
262 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
263
264 return (ret < 0) ? ret : 0;
265 }
266
267 static int ab8500_get_register(struct device *dev, u8 bank,
268 u8 reg, u8 *value)
269 {
270 int ret;
271 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
272
273 atomic_inc(&ab8500->transfer_ongoing);
274 ret = get_register_interruptible(ab8500, bank, reg, value);
275 atomic_dec(&ab8500->transfer_ongoing);
276 return ret;
277 }
278
279 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
280 u8 reg, u8 bitmask, u8 bitvalues)
281 {
282 int ret;
283 u16 addr = ((u16)bank) << 8 | reg;
284
285 mutex_lock(&ab8500->lock);
286
287 if (ab8500->write_masked == NULL) {
288 u8 data;
289
290 ret = ab8500->read(ab8500, addr);
291 if (ret < 0) {
292 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
293 addr, ret);
294 goto out;
295 }
296
297 data = (u8)ret;
298 data = (~bitmask & data) | (bitmask & bitvalues);
299
300 ret = ab8500->write(ab8500, addr, data);
301 if (ret < 0)
302 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
303 addr, ret);
304
305 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr,
306 data);
307 goto out;
308 }
309 ret = ab8500->write_masked(ab8500, addr, bitmask, bitvalues);
310 if (ret < 0)
311 dev_err(ab8500->dev, "failed to modify reg %#x: %d\n", addr,
312 ret);
313 out:
314 mutex_unlock(&ab8500->lock);
315 return ret;
316 }
317
318 static int ab8500_mask_and_set_register(struct device *dev,
319 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
320 {
321 int ret;
322 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
323
324 atomic_inc(&ab8500->transfer_ongoing);
325 ret = mask_and_set_register_interruptible(ab8500, bank, reg,
326 bitmask, bitvalues);
327 atomic_dec(&ab8500->transfer_ongoing);
328 return ret;
329 }
330
331 static struct abx500_ops ab8500_ops = {
332 .get_chip_id = ab8500_get_chip_id,
333 .get_register = ab8500_get_register,
334 .set_register = ab8500_set_register,
335 .get_register_page = NULL,
336 .set_register_page = NULL,
337 .mask_and_set_register = ab8500_mask_and_set_register,
338 .event_registers_startup_state_get = NULL,
339 .startup_irq_enabled = NULL,
340 .dump_all_banks = ab8500_dump_all_banks,
341 };
342
343 static void ab8500_irq_lock(struct irq_data *data)
344 {
345 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
346
347 mutex_lock(&ab8500->irq_lock);
348 atomic_inc(&ab8500->transfer_ongoing);
349 }
350
351 static void ab8500_irq_sync_unlock(struct irq_data *data)
352 {
353 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
354 int i;
355
356 for (i = 0; i < ab8500->mask_size; i++) {
357 u8 old = ab8500->oldmask[i];
358 u8 new = ab8500->mask[i];
359 int reg;
360
361 if (new == old)
362 continue;
363
364 /*
365 * Interrupt register 12 doesn't exist prior to AB8500 version
366 * 2.0
367 */
368 if (ab8500->irq_reg_offset[i] == 11 &&
369 is_ab8500_1p1_or_earlier(ab8500))
370 continue;
371
372 if (ab8500->irq_reg_offset[i] < 0)
373 continue;
374
375 ab8500->oldmask[i] = new;
376
377 reg = AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i];
378 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
379 }
380 atomic_dec(&ab8500->transfer_ongoing);
381 mutex_unlock(&ab8500->irq_lock);
382 }
383
384 static void ab8500_irq_mask(struct irq_data *data)
385 {
386 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
387 int offset = data->hwirq;
388 int index = offset / 8;
389 int mask = 1 << (offset % 8);
390
391 ab8500->mask[index] |= mask;
392
393 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
394 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
395 ab8500->mask[index + 2] |= mask;
396 if (offset >= AB9540_INT_GPIO50R && offset <= AB9540_INT_GPIO54R)
397 ab8500->mask[index + 1] |= mask;
398 if (offset == AB8540_INT_GPIO43R || offset == AB8540_INT_GPIO44R)
399 /* Here the falling IRQ is one bit lower */
400 ab8500->mask[index] |= (mask << 1);
401 }
402
403 static void ab8500_irq_unmask(struct irq_data *data)
404 {
405 struct ab8500 *ab8500 = irq_data_get_irq_chip_data(data);
406 unsigned int type = irqd_get_trigger_type(data);
407 int offset = data->hwirq;
408 int index = offset / 8;
409 int mask = 1 << (offset % 8);
410
411 if (type & IRQ_TYPE_EDGE_RISING)
412 ab8500->mask[index] &= ~mask;
413
414 /* The AB8500 GPIOs have two interrupts each (rising & falling). */
415 if (type & IRQ_TYPE_EDGE_FALLING) {
416 if (offset >= AB8500_INT_GPIO6R && offset <= AB8500_INT_GPIO41R)
417 ab8500->mask[index + 2] &= ~mask;
418 else if (offset >= AB9540_INT_GPIO50R &&
419 offset <= AB9540_INT_GPIO54R)
420 ab8500->mask[index + 1] &= ~mask;
421 else if (offset == AB8540_INT_GPIO43R ||
422 offset == AB8540_INT_GPIO44R)
423 /* Here the falling IRQ is one bit lower */
424 ab8500->mask[index] &= ~(mask << 1);
425 else
426 ab8500->mask[index] &= ~mask;
427 } else {
428 /* Satisfies the case where type is not set. */
429 ab8500->mask[index] &= ~mask;
430 }
431 }
432
433 static int ab8500_irq_set_type(struct irq_data *data, unsigned int type)
434 {
435 return 0;
436 }
437
438 static struct irq_chip ab8500_irq_chip = {
439 .name = "ab8500",
440 .irq_bus_lock = ab8500_irq_lock,
441 .irq_bus_sync_unlock = ab8500_irq_sync_unlock,
442 .irq_mask = ab8500_irq_mask,
443 .irq_disable = ab8500_irq_mask,
444 .irq_unmask = ab8500_irq_unmask,
445 .irq_set_type = ab8500_irq_set_type,
446 };
447
448 static void update_latch_offset(u8 *offset, int i)
449 {
450 /* Fix inconsistent ITFromLatch25 bit mapping... */
451 if (unlikely(*offset == 17))
452 *offset = 24;
453 /* Fix inconsistent ab8540 bit mapping... */
454 if (unlikely(*offset == 16))
455 *offset = 25;
456 if ((i == 3) && (*offset >= 24))
457 *offset += 2;
458 }
459
460 static int ab8500_handle_hierarchical_line(struct ab8500 *ab8500,
461 int latch_offset, u8 latch_val)
462 {
463 int int_bit, line, i;
464
465 for (i = 0; i < ab8500->mask_size; i++)
466 if (ab8500->irq_reg_offset[i] == latch_offset)
467 break;
468
469 if (i >= ab8500->mask_size) {
470 dev_err(ab8500->dev, "Register offset 0x%2x not declared\n",
471 latch_offset);
472 return -ENXIO;
473 }
474
475 /* ignore masked out interrupts */
476 latch_val &= ~ab8500->mask[i];
477
478 while (latch_val) {
479 int_bit = __ffs(latch_val);
480 line = (i << 3) + int_bit;
481 latch_val &= ~(1 << int_bit);
482
483 /*
484 * This handles the falling edge hwirqs from the GPIO
485 * lines. Route them back to the line registered for the
486 * rising IRQ, as this is merely a flag for the same IRQ
487 * in linux terms.
488 */
489 if (line >= AB8500_INT_GPIO6F && line <= AB8500_INT_GPIO41F)
490 line -= 16;
491 if (line >= AB9540_INT_GPIO50F && line <= AB9540_INT_GPIO54F)
492 line -= 8;
493 if (line == AB8540_INT_GPIO43F || line == AB8540_INT_GPIO44F)
494 line += 1;
495
496 handle_nested_irq(irq_create_mapping(ab8500->domain, line));
497 }
498
499 return 0;
500 }
501
502 static int ab8500_handle_hierarchical_latch(struct ab8500 *ab8500,
503 int hier_offset, u8 hier_val)
504 {
505 int latch_bit, status;
506 u8 latch_offset, latch_val;
507
508 do {
509 latch_bit = __ffs(hier_val);
510 latch_offset = (hier_offset << 3) + latch_bit;
511
512 update_latch_offset(&latch_offset, hier_offset);
513
514 status = get_register_interruptible(ab8500,
515 AB8500_INTERRUPT,
516 AB8500_IT_LATCH1_REG + latch_offset,
517 &latch_val);
518 if (status < 0 || latch_val == 0)
519 goto discard;
520
521 status = ab8500_handle_hierarchical_line(ab8500,
522 latch_offset, latch_val);
523 if (status < 0)
524 return status;
525 discard:
526 hier_val &= ~(1 << latch_bit);
527 } while (hier_val);
528
529 return 0;
530 }
531
532 static irqreturn_t ab8500_hierarchical_irq(int irq, void *dev)
533 {
534 struct ab8500 *ab8500 = dev;
535 u8 i;
536
537 dev_vdbg(ab8500->dev, "interrupt\n");
538
539 /* Hierarchical interrupt version */
540 for (i = 0; i < (ab8500->it_latchhier_num); i++) {
541 int status;
542 u8 hier_val;
543
544 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
545 AB8500_IT_LATCHHIER1_REG + i, &hier_val);
546 if (status < 0 || hier_val == 0)
547 continue;
548
549 status = ab8500_handle_hierarchical_latch(ab8500, i, hier_val);
550 if (status < 0)
551 break;
552 }
553 return IRQ_HANDLED;
554 }
555
556 static int ab8500_irq_map(struct irq_domain *d, unsigned int virq,
557 irq_hw_number_t hwirq)
558 {
559 struct ab8500 *ab8500 = d->host_data;
560
561 if (!ab8500)
562 return -EINVAL;
563
564 irq_set_chip_data(virq, ab8500);
565 irq_set_chip_and_handler(virq, &ab8500_irq_chip,
566 handle_simple_irq);
567 irq_set_nested_thread(virq, 1);
568 irq_set_noprobe(virq);
569
570 return 0;
571 }
572
573 static const struct irq_domain_ops ab8500_irq_ops = {
574 .map = ab8500_irq_map,
575 .xlate = irq_domain_xlate_twocell,
576 };
577
578 static int ab8500_irq_init(struct ab8500 *ab8500, struct device_node *np)
579 {
580 int num_irqs;
581
582 if (is_ab8540(ab8500))
583 num_irqs = AB8540_NR_IRQS;
584 else if (is_ab9540(ab8500))
585 num_irqs = AB9540_NR_IRQS;
586 else if (is_ab8505(ab8500))
587 num_irqs = AB8505_NR_IRQS;
588 else
589 num_irqs = AB8500_NR_IRQS;
590
591 /* If ->irq_base is zero this will give a linear mapping */
592 ab8500->domain = irq_domain_add_simple(ab8500->dev->of_node,
593 num_irqs, 0,
594 &ab8500_irq_ops, ab8500);
595
596 if (!ab8500->domain) {
597 dev_err(ab8500->dev, "Failed to create irqdomain\n");
598 return -ENODEV;
599 }
600
601 return 0;
602 }
603
604 int ab8500_suspend(struct ab8500 *ab8500)
605 {
606 if (atomic_read(&ab8500->transfer_ongoing))
607 return -EINVAL;
608
609 return 0;
610 }
611
612 static const struct mfd_cell ab8500_bm_devs[] = {
613 OF_MFD_CELL("ab8500-charger", NULL, &ab8500_bm_data,
614 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-charger"),
615 OF_MFD_CELL("ab8500-btemp", NULL, &ab8500_bm_data,
616 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-btemp"),
617 OF_MFD_CELL("ab8500-fg", NULL, &ab8500_bm_data,
618 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-fg"),
619 OF_MFD_CELL("ab8500-chargalg", NULL, &ab8500_bm_data,
620 sizeof(ab8500_bm_data), 0, "stericsson,ab8500-chargalg"),
621 };
622
623 static const struct mfd_cell ab8500_devs[] = {
624 #ifdef CONFIG_DEBUG_FS
625 OF_MFD_CELL("ab8500-debug",
626 NULL, NULL, 0, 0, "stericsson,ab8500-debug"),
627 #endif
628 OF_MFD_CELL("ab8500-sysctrl",
629 NULL, NULL, 0, 0, "stericsson,ab8500-sysctrl"),
630 OF_MFD_CELL("ab8500-ext-regulator",
631 NULL, NULL, 0, 0, "stericsson,ab8500-ext-regulator"),
632 OF_MFD_CELL("ab8500-regulator",
633 NULL, NULL, 0, 0, "stericsson,ab8500-regulator"),
634 OF_MFD_CELL("ab8500-clk",
635 NULL, NULL, 0, 0, "stericsson,ab8500-clk"),
636 OF_MFD_CELL("ab8500-gpadc",
637 NULL, NULL, 0, 0, "stericsson,ab8500-gpadc"),
638 OF_MFD_CELL("ab8500-rtc",
639 NULL, NULL, 0, 0, "stericsson,ab8500-rtc"),
640 OF_MFD_CELL("ab8500-acc-det",
641 NULL, NULL, 0, 0, "stericsson,ab8500-acc-det"),
642 OF_MFD_CELL("ab8500-poweron-key",
643 NULL, NULL, 0, 0, "stericsson,ab8500-poweron-key"),
644 OF_MFD_CELL("ab8500-pwm",
645 NULL, NULL, 0, 1, "stericsson,ab8500-pwm"),
646 OF_MFD_CELL("ab8500-pwm",
647 NULL, NULL, 0, 2, "stericsson,ab8500-pwm"),
648 OF_MFD_CELL("ab8500-pwm",
649 NULL, NULL, 0, 3, "stericsson,ab8500-pwm"),
650 OF_MFD_CELL("ab8500-denc",
651 NULL, NULL, 0, 0, "stericsson,ab8500-denc"),
652 OF_MFD_CELL("pinctrl-ab8500",
653 NULL, NULL, 0, 0, "stericsson,ab8500-gpio"),
654 OF_MFD_CELL("abx500-temp",
655 NULL, NULL, 0, 0, "stericsson,abx500-temp"),
656 OF_MFD_CELL("ab8500-usb",
657 NULL, NULL, 0, 0, "stericsson,ab8500-usb"),
658 OF_MFD_CELL("ab8500-codec",
659 NULL, NULL, 0, 0, "stericsson,ab8500-codec"),
660 };
661
662 static const struct mfd_cell ab9540_devs[] = {
663 #ifdef CONFIG_DEBUG_FS
664 {
665 .name = "ab8500-debug",
666 },
667 #endif
668 {
669 .name = "ab8500-sysctrl",
670 },
671 {
672 .name = "ab8500-ext-regulator",
673 },
674 {
675 .name = "ab8500-regulator",
676 },
677 {
678 .name = "abx500-clk",
679 .of_compatible = "stericsson,abx500-clk",
680 },
681 {
682 .name = "ab8500-gpadc",
683 .of_compatible = "stericsson,ab8500-gpadc",
684 },
685 {
686 .name = "ab8500-rtc",
687 },
688 {
689 .name = "ab8500-acc-det",
690 },
691 {
692 .name = "ab8500-poweron-key",
693 },
694 {
695 .name = "ab8500-pwm",
696 .id = 1,
697 },
698 {
699 .name = "abx500-temp",
700 },
701 {
702 .name = "pinctrl-ab9540",
703 .of_compatible = "stericsson,ab9540-gpio",
704 },
705 {
706 .name = "ab9540-usb",
707 },
708 {
709 .name = "ab9540-codec",
710 },
711 {
712 .name = "ab-iddet",
713 },
714 };
715
716 /* Device list for ab8505 */
717 static const struct mfd_cell ab8505_devs[] = {
718 #ifdef CONFIG_DEBUG_FS
719 {
720 .name = "ab8500-debug",
721 .of_compatible = "stericsson,ab8500-debug",
722 },
723 #endif
724 {
725 .name = "ab8500-sysctrl",
726 .of_compatible = "stericsson,ab8500-sysctrl",
727 },
728 {
729 .name = "ab8500-regulator",
730 .of_compatible = "stericsson,ab8505-regulator",
731 },
732 {
733 .name = "abx500-clk",
734 .of_compatible = "stericsson,ab8500-clk",
735 },
736 {
737 .name = "ab8500-gpadc",
738 .of_compatible = "stericsson,ab8500-gpadc",
739 },
740 {
741 .name = "ab8500-rtc",
742 .of_compatible = "stericsson,ab8500-rtc",
743 },
744 {
745 .name = "ab8500-acc-det",
746 .of_compatible = "stericsson,ab8500-acc-det",
747 },
748 {
749 .name = "ab8500-poweron-key",
750 .of_compatible = "stericsson,ab8500-poweron-key",
751 },
752 {
753 .name = "ab8500-pwm",
754 .of_compatible = "stericsson,ab8500-pwm",
755 .id = 1,
756 },
757 {
758 .name = "pinctrl-ab8505",
759 .of_compatible = "stericsson,ab8505-gpio",
760 },
761 {
762 .name = "ab8500-usb",
763 .of_compatible = "stericsson,ab8500-usb",
764 },
765 {
766 .name = "ab8500-codec",
767 .of_compatible = "stericsson,ab8500-codec",
768 },
769 {
770 .name = "ab-iddet",
771 },
772 };
773
774 static const struct mfd_cell ab8540_devs[] = {
775 #ifdef CONFIG_DEBUG_FS
776 {
777 .name = "ab8500-debug",
778 },
779 #endif
780 {
781 .name = "ab8500-sysctrl",
782 },
783 {
784 .name = "ab8500-ext-regulator",
785 },
786 {
787 .name = "ab8500-regulator",
788 },
789 {
790 .name = "abx500-clk",
791 .of_compatible = "stericsson,abx500-clk",
792 },
793 {
794 .name = "ab8500-gpadc",
795 .of_compatible = "stericsson,ab8500-gpadc",
796 },
797 {
798 .name = "ab8500-acc-det",
799 },
800 {
801 .name = "ab8500-poweron-key",
802 },
803 {
804 .name = "ab8500-pwm",
805 .id = 1,
806 },
807 {
808 .name = "abx500-temp",
809 },
810 {
811 .name = "pinctrl-ab8540",
812 },
813 {
814 .name = "ab8540-usb",
815 },
816 {
817 .name = "ab8540-codec",
818 },
819 {
820 .name = "ab-iddet",
821 },
822 };
823
824 static const struct mfd_cell ab8540_cut1_devs[] = {
825 {
826 .name = "ab8500-rtc",
827 .of_compatible = "stericsson,ab8500-rtc",
828 },
829 };
830
831 static const struct mfd_cell ab8540_cut2_devs[] = {
832 {
833 .name = "ab8540-rtc",
834 .of_compatible = "stericsson,ab8540-rtc",
835 },
836 };
837
838 static ssize_t show_chip_id(struct device *dev,
839 struct device_attribute *attr, char *buf)
840 {
841 struct ab8500 *ab8500;
842
843 ab8500 = dev_get_drvdata(dev);
844
845 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
846 }
847
848 /*
849 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
850 * 0x01 Swoff bit programming
851 * 0x02 Thermal protection activation
852 * 0x04 Vbat lower then BattOk falling threshold
853 * 0x08 Watchdog expired
854 * 0x10 Non presence of 32kHz clock
855 * 0x20 Battery level lower than power on reset threshold
856 * 0x40 Power on key 1 pressed longer than 10 seconds
857 * 0x80 DB8500 thermal shutdown
858 */
859 static ssize_t show_switch_off_status(struct device *dev,
860 struct device_attribute *attr, char *buf)
861 {
862 int ret;
863 u8 value;
864 struct ab8500 *ab8500;
865
866 ab8500 = dev_get_drvdata(dev);
867 ret = get_register_interruptible(ab8500, AB8500_RTC,
868 AB8500_SWITCH_OFF_STATUS, &value);
869 if (ret < 0)
870 return ret;
871 return sprintf(buf, "%#x\n", value);
872 }
873
874 /* use mask and set to override the register turn_on_stat value */
875 void ab8500_override_turn_on_stat(u8 mask, u8 set)
876 {
877 spin_lock(&on_stat_lock);
878 turn_on_stat_mask = mask;
879 turn_on_stat_set = set;
880 spin_unlock(&on_stat_lock);
881 }
882
883 /*
884 * ab8500 has turned on due to (TURN_ON_STATUS):
885 * 0x01 PORnVbat
886 * 0x02 PonKey1dbF
887 * 0x04 PonKey2dbF
888 * 0x08 RTCAlarm
889 * 0x10 MainChDet
890 * 0x20 VbusDet
891 * 0x40 UsbIDDetect
892 * 0x80 Reserved
893 */
894 static ssize_t show_turn_on_status(struct device *dev,
895 struct device_attribute *attr, char *buf)
896 {
897 int ret;
898 u8 value;
899 struct ab8500 *ab8500;
900
901 ab8500 = dev_get_drvdata(dev);
902 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
903 AB8500_TURN_ON_STATUS, &value);
904 if (ret < 0)
905 return ret;
906
907 /*
908 * In L9540, turn_on_status register is not updated correctly if
909 * the device is rebooted with AC/USB charger connected. Due to
910 * this, the device boots android instead of entering into charge
911 * only mode. Read the AC/USB status register to detect the charger
912 * presence and update the turn on status manually.
913 */
914 if (is_ab9540(ab8500)) {
915 spin_lock(&on_stat_lock);
916 value = (value & turn_on_stat_mask) | turn_on_stat_set;
917 spin_unlock(&on_stat_lock);
918 }
919
920 return sprintf(buf, "%#x\n", value);
921 }
922
923 static ssize_t show_turn_on_status_2(struct device *dev,
924 struct device_attribute *attr, char *buf)
925 {
926 int ret;
927 u8 value;
928 struct ab8500 *ab8500;
929
930 ab8500 = dev_get_drvdata(dev);
931 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
932 AB8505_TURN_ON_STATUS_2, &value);
933 if (ret < 0)
934 return ret;
935 return sprintf(buf, "%#x\n", (value & 0x1));
936 }
937
938 static ssize_t show_ab9540_dbbrstn(struct device *dev,
939 struct device_attribute *attr, char *buf)
940 {
941 struct ab8500 *ab8500;
942 int ret;
943 u8 value;
944
945 ab8500 = dev_get_drvdata(dev);
946
947 ret = get_register_interruptible(ab8500, AB8500_REGU_CTRL2,
948 AB9540_MODEM_CTRL2_REG, &value);
949 if (ret < 0)
950 return ret;
951
952 return sprintf(buf, "%d\n",
953 (value & AB9540_MODEM_CTRL2_SWDBBRSTN_BIT) ? 1 : 0);
954 }
955
956 static ssize_t store_ab9540_dbbrstn(struct device *dev,
957 struct device_attribute *attr, const char *buf, size_t count)
958 {
959 struct ab8500 *ab8500;
960 int ret = count;
961 int err;
962 u8 bitvalues;
963
964 ab8500 = dev_get_drvdata(dev);
965
966 if (count > 0) {
967 switch (buf[0]) {
968 case '0':
969 bitvalues = 0;
970 break;
971 case '1':
972 bitvalues = AB9540_MODEM_CTRL2_SWDBBRSTN_BIT;
973 break;
974 default:
975 goto exit;
976 }
977
978 err = mask_and_set_register_interruptible(ab8500,
979 AB8500_REGU_CTRL2, AB9540_MODEM_CTRL2_REG,
980 AB9540_MODEM_CTRL2_SWDBBRSTN_BIT, bitvalues);
981 if (err)
982 dev_info(ab8500->dev,
983 "Failed to set DBBRSTN %c, err %#x\n",
984 buf[0], err);
985 }
986
987 exit:
988 return ret;
989 }
990
991 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
992 static DEVICE_ATTR(switch_off_status, S_IRUGO, show_switch_off_status, NULL);
993 static DEVICE_ATTR(turn_on_status, S_IRUGO, show_turn_on_status, NULL);
994 static DEVICE_ATTR(turn_on_status_2, S_IRUGO, show_turn_on_status_2, NULL);
995 static DEVICE_ATTR(dbbrstn, S_IRUGO | S_IWUSR,
996 show_ab9540_dbbrstn, store_ab9540_dbbrstn);
997
998 static struct attribute *ab8500_sysfs_entries[] = {
999 &dev_attr_chip_id.attr,
1000 &dev_attr_switch_off_status.attr,
1001 &dev_attr_turn_on_status.attr,
1002 NULL,
1003 };
1004
1005 static struct attribute *ab8505_sysfs_entries[] = {
1006 &dev_attr_turn_on_status_2.attr,
1007 NULL,
1008 };
1009
1010 static struct attribute *ab9540_sysfs_entries[] = {
1011 &dev_attr_chip_id.attr,
1012 &dev_attr_switch_off_status.attr,
1013 &dev_attr_turn_on_status.attr,
1014 &dev_attr_dbbrstn.attr,
1015 NULL,
1016 };
1017
1018 static const struct attribute_group ab8500_attr_group = {
1019 .attrs = ab8500_sysfs_entries,
1020 };
1021
1022 static const struct attribute_group ab8505_attr_group = {
1023 .attrs = ab8505_sysfs_entries,
1024 };
1025
1026 static const struct attribute_group ab9540_attr_group = {
1027 .attrs = ab9540_sysfs_entries,
1028 };
1029
1030 static int ab8500_probe(struct platform_device *pdev)
1031 {
1032 static const char * const switch_off_status[] = {
1033 "Swoff bit programming",
1034 "Thermal protection activation",
1035 "Vbat lower then BattOk falling threshold",
1036 "Watchdog expired",
1037 "Non presence of 32kHz clock",
1038 "Battery level lower than power on reset threshold",
1039 "Power on key 1 pressed longer than 10 seconds",
1040 "DB8500 thermal shutdown"};
1041 static const char * const turn_on_status[] = {
1042 "Battery rising (Vbat)",
1043 "Power On Key 1 dbF",
1044 "Power On Key 2 dbF",
1045 "RTC Alarm",
1046 "Main Charger Detect",
1047 "Vbus Detect (USB)",
1048 "USB ID Detect",
1049 "UART Factory Mode Detect"};
1050 const struct platform_device_id *platid = platform_get_device_id(pdev);
1051 enum ab8500_version version = AB8500_VERSION_UNDEFINED;
1052 struct device_node *np = pdev->dev.of_node;
1053 struct ab8500 *ab8500;
1054 struct resource *resource;
1055 int ret;
1056 int i;
1057 u8 value;
1058
1059 ab8500 = devm_kzalloc(&pdev->dev, sizeof(*ab8500), GFP_KERNEL);
1060 if (!ab8500)
1061 return -ENOMEM;
1062
1063 ab8500->dev = &pdev->dev;
1064
1065 resource = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1066 if (!resource) {
1067 dev_err(&pdev->dev, "no IRQ resource\n");
1068 return -ENODEV;
1069 }
1070
1071 ab8500->irq = resource->start;
1072
1073 ab8500->read = ab8500_prcmu_read;
1074 ab8500->write = ab8500_prcmu_write;
1075 ab8500->write_masked = ab8500_prcmu_write_masked;
1076
1077 mutex_init(&ab8500->lock);
1078 mutex_init(&ab8500->irq_lock);
1079 atomic_set(&ab8500->transfer_ongoing, 0);
1080
1081 platform_set_drvdata(pdev, ab8500);
1082
1083 if (platid)
1084 version = platid->driver_data;
1085
1086 if (version != AB8500_VERSION_UNDEFINED)
1087 ab8500->version = version;
1088 else {
1089 ret = get_register_interruptible(ab8500, AB8500_MISC,
1090 AB8500_IC_NAME_REG, &value);
1091 if (ret < 0) {
1092 dev_err(&pdev->dev, "could not probe HW\n");
1093 return ret;
1094 }
1095
1096 ab8500->version = value;
1097 }
1098
1099 ret = get_register_interruptible(ab8500, AB8500_MISC,
1100 AB8500_REV_REG, &value);
1101 if (ret < 0)
1102 return ret;
1103
1104 ab8500->chip_id = value;
1105
1106 dev_info(ab8500->dev, "detected chip, %s rev. %1x.%1x\n",
1107 ab8500_version_str[ab8500->version],
1108 ab8500->chip_id >> 4,
1109 ab8500->chip_id & 0x0F);
1110
1111 /* Configure AB8540 */
1112 if (is_ab8540(ab8500)) {
1113 ab8500->mask_size = AB8540_NUM_IRQ_REGS;
1114 ab8500->irq_reg_offset = ab8540_irq_regoffset;
1115 ab8500->it_latchhier_num = AB8540_IT_LATCHHIER_NUM;
1116 } /* Configure AB8500 or AB9540 IRQ */
1117 else if (is_ab9540(ab8500) || is_ab8505(ab8500)) {
1118 ab8500->mask_size = AB9540_NUM_IRQ_REGS;
1119 ab8500->irq_reg_offset = ab9540_irq_regoffset;
1120 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1121 } else {
1122 ab8500->mask_size = AB8500_NUM_IRQ_REGS;
1123 ab8500->irq_reg_offset = ab8500_irq_regoffset;
1124 ab8500->it_latchhier_num = AB8500_IT_LATCHHIER_NUM;
1125 }
1126 ab8500->mask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1127 GFP_KERNEL);
1128 if (!ab8500->mask)
1129 return -ENOMEM;
1130 ab8500->oldmask = devm_kzalloc(&pdev->dev, ab8500->mask_size,
1131 GFP_KERNEL);
1132 if (!ab8500->oldmask)
1133 return -ENOMEM;
1134
1135 /*
1136 * ab8500 has switched off due to (SWITCH_OFF_STATUS):
1137 * 0x01 Swoff bit programming
1138 * 0x02 Thermal protection activation
1139 * 0x04 Vbat lower then BattOk falling threshold
1140 * 0x08 Watchdog expired
1141 * 0x10 Non presence of 32kHz clock
1142 * 0x20 Battery level lower than power on reset threshold
1143 * 0x40 Power on key 1 pressed longer than 10 seconds
1144 * 0x80 DB8500 thermal shutdown
1145 */
1146
1147 ret = get_register_interruptible(ab8500, AB8500_RTC,
1148 AB8500_SWITCH_OFF_STATUS, &value);
1149 if (ret < 0)
1150 return ret;
1151 dev_info(ab8500->dev, "switch off cause(s) (%#x): ", value);
1152
1153 if (value) {
1154 for (i = 0; i < ARRAY_SIZE(switch_off_status); i++) {
1155 if (value & 1)
1156 pr_cont(" \"%s\"", switch_off_status[i]);
1157 value = value >> 1;
1158
1159 }
1160 pr_cont("\n");
1161 } else {
1162 pr_cont(" None\n");
1163 }
1164 ret = get_register_interruptible(ab8500, AB8500_SYS_CTRL1_BLOCK,
1165 AB8500_TURN_ON_STATUS, &value);
1166 if (ret < 0)
1167 return ret;
1168 dev_info(ab8500->dev, "turn on reason(s) (%#x): ", value);
1169
1170 if (value) {
1171 for (i = 0; i < ARRAY_SIZE(turn_on_status); i++) {
1172 if (value & 1)
1173 pr_cont("\"%s\" ", turn_on_status[i]);
1174 value = value >> 1;
1175 }
1176 pr_cont("\n");
1177 } else {
1178 pr_cont("None\n");
1179 }
1180
1181 if (is_ab9540(ab8500)) {
1182 ret = get_register_interruptible(ab8500, AB8500_CHARGER,
1183 AB8500_CH_USBCH_STAT1_REG, &value);
1184 if (ret < 0)
1185 return ret;
1186 if ((value & VBUS_DET_DBNC1) && (value & VBUS_DET_DBNC100))
1187 ab8500_override_turn_on_stat(~AB8500_POW_KEY_1_ON,
1188 AB8500_VBUS_DET);
1189 }
1190
1191 /* Clear and mask all interrupts */
1192 for (i = 0; i < ab8500->mask_size; i++) {
1193 /*
1194 * Interrupt register 12 doesn't exist prior to AB8500 version
1195 * 2.0
1196 */
1197 if (ab8500->irq_reg_offset[i] == 11 &&
1198 is_ab8500_1p1_or_earlier(ab8500))
1199 continue;
1200
1201 if (ab8500->irq_reg_offset[i] < 0)
1202 continue;
1203
1204 get_register_interruptible(ab8500, AB8500_INTERRUPT,
1205 AB8500_IT_LATCH1_REG + ab8500->irq_reg_offset[i],
1206 &value);
1207 set_register_interruptible(ab8500, AB8500_INTERRUPT,
1208 AB8500_IT_MASK1_REG + ab8500->irq_reg_offset[i], 0xff);
1209 }
1210
1211 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
1212 if (ret)
1213 return ret;
1214
1215 for (i = 0; i < ab8500->mask_size; i++)
1216 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
1217
1218 ret = ab8500_irq_init(ab8500, np);
1219 if (ret)
1220 return ret;
1221
1222 ret = devm_request_threaded_irq(&pdev->dev, ab8500->irq, NULL,
1223 ab8500_hierarchical_irq,
1224 IRQF_ONESHOT | IRQF_NO_SUSPEND,
1225 "ab8500", ab8500);
1226 if (ret)
1227 return ret;
1228
1229 if (is_ab9540(ab8500))
1230 ret = mfd_add_devices(ab8500->dev, 0, ab9540_devs,
1231 ARRAY_SIZE(ab9540_devs), NULL,
1232 0, ab8500->domain);
1233 else if (is_ab8540(ab8500)) {
1234 ret = mfd_add_devices(ab8500->dev, 0, ab8540_devs,
1235 ARRAY_SIZE(ab8540_devs), NULL,
1236 0, ab8500->domain);
1237 if (ret)
1238 return ret;
1239
1240 if (is_ab8540_1p2_or_earlier(ab8500))
1241 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut1_devs,
1242 ARRAY_SIZE(ab8540_cut1_devs), NULL,
1243 0, ab8500->domain);
1244 else /* ab8540 >= cut2 */
1245 ret = mfd_add_devices(ab8500->dev, 0, ab8540_cut2_devs,
1246 ARRAY_SIZE(ab8540_cut2_devs), NULL,
1247 0, ab8500->domain);
1248 } else if (is_ab8505(ab8500))
1249 ret = mfd_add_devices(ab8500->dev, 0, ab8505_devs,
1250 ARRAY_SIZE(ab8505_devs), NULL,
1251 0, ab8500->domain);
1252 else
1253 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
1254 ARRAY_SIZE(ab8500_devs), NULL,
1255 0, ab8500->domain);
1256 if (ret)
1257 return ret;
1258
1259 if (!no_bm) {
1260 /* Add battery management devices */
1261 ret = mfd_add_devices(ab8500->dev, 0, ab8500_bm_devs,
1262 ARRAY_SIZE(ab8500_bm_devs), NULL,
1263 0, ab8500->domain);
1264 if (ret)
1265 dev_err(ab8500->dev, "error adding bm devices\n");
1266 }
1267
1268 if (((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1269 ab8500->chip_id >= AB8500_CUT2P0) || is_ab8540(ab8500))
1270 ret = sysfs_create_group(&ab8500->dev->kobj,
1271 &ab9540_attr_group);
1272 else
1273 ret = sysfs_create_group(&ab8500->dev->kobj,
1274 &ab8500_attr_group);
1275
1276 if ((is_ab8505(ab8500) || is_ab9540(ab8500)) &&
1277 ab8500->chip_id >= AB8500_CUT2P0)
1278 ret = sysfs_create_group(&ab8500->dev->kobj,
1279 &ab8505_attr_group);
1280
1281 if (ret)
1282 dev_err(ab8500->dev, "error creating sysfs entries\n");
1283
1284 return ret;
1285 }
1286
1287 static const struct platform_device_id ab8500_id[] = {
1288 { "ab8500-core", AB8500_VERSION_AB8500 },
1289 { "ab8505-core", AB8500_VERSION_AB8505 },
1290 { "ab9540-i2c", AB8500_VERSION_AB9540 },
1291 { "ab8540-i2c", AB8500_VERSION_AB8540 },
1292 { }
1293 };
1294
1295 static struct platform_driver ab8500_core_driver = {
1296 .driver = {
1297 .name = "ab8500-core",
1298 .suppress_bind_attrs = true,
1299 },
1300 .probe = ab8500_probe,
1301 .id_table = ab8500_id,
1302 };
1303
1304 static int __init ab8500_core_init(void)
1305 {
1306 return platform_driver_register(&ab8500_core_driver);
1307 }
1308 core_initcall(ab8500_core_init);
Linux with added FPC-III support