1 // SPDX-License-Identifier: GPL-2.0-only
3 * Base driver for Maxim MAX8925
5 * Copyright (C) 2009-2010 Marvell International Ltd.
6 * Haojian Zhuang <haojian.zhuang@marvell.com>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/i2c.h>
12 #include <linux/irq.h>
13 #include <linux/interrupt.h>
14 #include <linux/irqdomain.h>
15 #include <linux/platform_device.h>
16 #include <linux/regulator/machine.h>
17 #include <linux/mfd/core.h>
18 #include <linux/mfd/max8925.h>
20 #include <linux/of_platform.h>
22 static const struct resource bk_resources
[] = {
23 { 0x84, 0x84, "mode control", IORESOURCE_REG
, },
24 { 0x85, 0x85, "control", IORESOURCE_REG
, },
27 static struct mfd_cell bk_devs
[] = {
29 .name
= "max8925-backlight",
30 .num_resources
= ARRAY_SIZE(bk_resources
),
31 .resources
= &bk_resources
[0],
36 static const struct resource touch_resources
[] = {
38 .name
= "max8925-tsc",
39 .start
= MAX8925_TSC_IRQ
,
40 .end
= MAX8925_ADC_RES_END
,
41 .flags
= IORESOURCE_REG
,
45 static const struct mfd_cell touch_devs
[] = {
47 .name
= "max8925-touch",
49 .resources
= &touch_resources
[0],
54 static const struct resource power_supply_resources
[] = {
56 .name
= "max8925-power",
57 .start
= MAX8925_CHG_IRQ1
,
58 .end
= MAX8925_CHG_IRQ1_MASK
,
59 .flags
= IORESOURCE_REG
,
63 static const struct mfd_cell power_devs
[] = {
65 .name
= "max8925-power",
67 .resources
= &power_supply_resources
[0],
72 static const struct resource rtc_resources
[] = {
74 .name
= "max8925-rtc",
75 .start
= MAX8925_IRQ_RTC_ALARM0
,
76 .end
= MAX8925_IRQ_RTC_ALARM0
,
77 .flags
= IORESOURCE_IRQ
,
81 static const struct mfd_cell rtc_devs
[] = {
83 .name
= "max8925-rtc",
85 .resources
= &rtc_resources
[0],
90 static const struct resource onkey_resources
[] = {
92 .name
= "max8925-onkey",
93 .start
= MAX8925_IRQ_GPM_SW_R
,
94 .end
= MAX8925_IRQ_GPM_SW_R
,
95 .flags
= IORESOURCE_IRQ
,
97 .name
= "max8925-onkey",
98 .start
= MAX8925_IRQ_GPM_SW_F
,
99 .end
= MAX8925_IRQ_GPM_SW_F
,
100 .flags
= IORESOURCE_IRQ
,
104 static const struct mfd_cell onkey_devs
[] = {
106 .name
= "max8925-onkey",
108 .resources
= &onkey_resources
[0],
113 static const struct resource sd1_resources
[] = {
114 {0x06, 0x06, "sdv", IORESOURCE_REG
, },
117 static const struct resource sd2_resources
[] = {
118 {0x09, 0x09, "sdv", IORESOURCE_REG
, },
121 static const struct resource sd3_resources
[] = {
122 {0x0c, 0x0c, "sdv", IORESOURCE_REG
, },
125 static const struct resource ldo1_resources
[] = {
126 {0x1a, 0x1a, "ldov", IORESOURCE_REG
, },
129 static const struct resource ldo2_resources
[] = {
130 {0x1e, 0x1e, "ldov", IORESOURCE_REG
, },
133 static const struct resource ldo3_resources
[] = {
134 {0x22, 0x22, "ldov", IORESOURCE_REG
, },
137 static const struct resource ldo4_resources
[] = {
138 {0x26, 0x26, "ldov", IORESOURCE_REG
, },
141 static const struct resource ldo5_resources
[] = {
142 {0x2a, 0x2a, "ldov", IORESOURCE_REG
, },
145 static const struct resource ldo6_resources
[] = {
146 {0x2e, 0x2e, "ldov", IORESOURCE_REG
, },
149 static const struct resource ldo7_resources
[] = {
150 {0x32, 0x32, "ldov", IORESOURCE_REG
, },
153 static const struct resource ldo8_resources
[] = {
154 {0x36, 0x36, "ldov", IORESOURCE_REG
, },
157 static const struct resource ldo9_resources
[] = {
158 {0x3a, 0x3a, "ldov", IORESOURCE_REG
, },
161 static const struct resource ldo10_resources
[] = {
162 {0x3e, 0x3e, "ldov", IORESOURCE_REG
, },
165 static const struct resource ldo11_resources
[] = {
166 {0x42, 0x42, "ldov", IORESOURCE_REG
, },
169 static const struct resource ldo12_resources
[] = {
170 {0x46, 0x46, "ldov", IORESOURCE_REG
, },
173 static const struct resource ldo13_resources
[] = {
174 {0x4a, 0x4a, "ldov", IORESOURCE_REG
, },
177 static const struct resource ldo14_resources
[] = {
178 {0x4e, 0x4e, "ldov", IORESOURCE_REG
, },
181 static const struct resource ldo15_resources
[] = {
182 {0x52, 0x52, "ldov", IORESOURCE_REG
, },
185 static const struct resource ldo16_resources
[] = {
186 {0x12, 0x12, "ldov", IORESOURCE_REG
, },
189 static const struct resource ldo17_resources
[] = {
190 {0x16, 0x16, "ldov", IORESOURCE_REG
, },
193 static const struct resource ldo18_resources
[] = {
194 {0x74, 0x74, "ldov", IORESOURCE_REG
, },
197 static const struct resource ldo19_resources
[] = {
198 {0x5e, 0x5e, "ldov", IORESOURCE_REG
, },
201 static const struct resource ldo20_resources
[] = {
202 {0x9e, 0x9e, "ldov", IORESOURCE_REG
, },
205 static struct mfd_cell reg_devs
[] = {
207 .name
= "max8925-regulator",
209 .num_resources
= ARRAY_SIZE(sd1_resources
),
210 .resources
= sd1_resources
,
212 .name
= "max8925-regulator",
214 .num_resources
= ARRAY_SIZE(sd2_resources
),
215 .resources
= sd2_resources
,
217 .name
= "max8925-regulator",
219 .num_resources
= ARRAY_SIZE(sd3_resources
),
220 .resources
= sd3_resources
,
222 .name
= "max8925-regulator",
224 .num_resources
= ARRAY_SIZE(ldo1_resources
),
225 .resources
= ldo1_resources
,
227 .name
= "max8925-regulator",
229 .num_resources
= ARRAY_SIZE(ldo2_resources
),
230 .resources
= ldo2_resources
,
232 .name
= "max8925-regulator",
234 .num_resources
= ARRAY_SIZE(ldo3_resources
),
235 .resources
= ldo3_resources
,
237 .name
= "max8925-regulator",
239 .num_resources
= ARRAY_SIZE(ldo4_resources
),
240 .resources
= ldo4_resources
,
242 .name
= "max8925-regulator",
244 .num_resources
= ARRAY_SIZE(ldo5_resources
),
245 .resources
= ldo5_resources
,
247 .name
= "max8925-regulator",
249 .num_resources
= ARRAY_SIZE(ldo6_resources
),
250 .resources
= ldo6_resources
,
252 .name
= "max8925-regulator",
254 .num_resources
= ARRAY_SIZE(ldo7_resources
),
255 .resources
= ldo7_resources
,
257 .name
= "max8925-regulator",
259 .num_resources
= ARRAY_SIZE(ldo8_resources
),
260 .resources
= ldo8_resources
,
262 .name
= "max8925-regulator",
264 .num_resources
= ARRAY_SIZE(ldo9_resources
),
265 .resources
= ldo9_resources
,
267 .name
= "max8925-regulator",
269 .num_resources
= ARRAY_SIZE(ldo10_resources
),
270 .resources
= ldo10_resources
,
272 .name
= "max8925-regulator",
274 .num_resources
= ARRAY_SIZE(ldo11_resources
),
275 .resources
= ldo11_resources
,
277 .name
= "max8925-regulator",
279 .num_resources
= ARRAY_SIZE(ldo12_resources
),
280 .resources
= ldo12_resources
,
282 .name
= "max8925-regulator",
284 .num_resources
= ARRAY_SIZE(ldo13_resources
),
285 .resources
= ldo13_resources
,
287 .name
= "max8925-regulator",
289 .num_resources
= ARRAY_SIZE(ldo14_resources
),
290 .resources
= ldo14_resources
,
292 .name
= "max8925-regulator",
294 .num_resources
= ARRAY_SIZE(ldo15_resources
),
295 .resources
= ldo15_resources
,
297 .name
= "max8925-regulator",
299 .num_resources
= ARRAY_SIZE(ldo16_resources
),
300 .resources
= ldo16_resources
,
302 .name
= "max8925-regulator",
304 .num_resources
= ARRAY_SIZE(ldo17_resources
),
305 .resources
= ldo17_resources
,
307 .name
= "max8925-regulator",
309 .num_resources
= ARRAY_SIZE(ldo18_resources
),
310 .resources
= ldo18_resources
,
312 .name
= "max8925-regulator",
314 .num_resources
= ARRAY_SIZE(ldo19_resources
),
315 .resources
= ldo19_resources
,
317 .name
= "max8925-regulator",
319 .num_resources
= ARRAY_SIZE(ldo20_resources
),
320 .resources
= ldo20_resources
,
325 FLAGS_ADC
= 1, /* register in ADC component */
326 FLAGS_RTC
, /* register in RTC component */
329 struct max8925_irq_data
{
332 int enable
; /* enable or not */
333 int offs
; /* bit offset in mask register */
338 static struct max8925_irq_data max8925_irqs
[] = {
339 [MAX8925_IRQ_VCHG_DC_OVP
] = {
340 .reg
= MAX8925_CHG_IRQ1
,
341 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
344 [MAX8925_IRQ_VCHG_DC_F
] = {
345 .reg
= MAX8925_CHG_IRQ1
,
346 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
349 [MAX8925_IRQ_VCHG_DC_R
] = {
350 .reg
= MAX8925_CHG_IRQ1
,
351 .mask_reg
= MAX8925_CHG_IRQ1_MASK
,
354 [MAX8925_IRQ_VCHG_THM_OK_R
] = {
355 .reg
= MAX8925_CHG_IRQ2
,
356 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
359 [MAX8925_IRQ_VCHG_THM_OK_F
] = {
360 .reg
= MAX8925_CHG_IRQ2
,
361 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
364 [MAX8925_IRQ_VCHG_SYSLOW_F
] = {
365 .reg
= MAX8925_CHG_IRQ2
,
366 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
369 [MAX8925_IRQ_VCHG_SYSLOW_R
] = {
370 .reg
= MAX8925_CHG_IRQ2
,
371 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
374 [MAX8925_IRQ_VCHG_RST
] = {
375 .reg
= MAX8925_CHG_IRQ2
,
376 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
379 [MAX8925_IRQ_VCHG_DONE
] = {
380 .reg
= MAX8925_CHG_IRQ2
,
381 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
384 [MAX8925_IRQ_VCHG_TOPOFF
] = {
385 .reg
= MAX8925_CHG_IRQ2
,
386 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
389 [MAX8925_IRQ_VCHG_TMR_FAULT
] = {
390 .reg
= MAX8925_CHG_IRQ2
,
391 .mask_reg
= MAX8925_CHG_IRQ2_MASK
,
394 [MAX8925_IRQ_GPM_RSTIN
] = {
395 .reg
= MAX8925_ON_OFF_IRQ1
,
396 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
399 [MAX8925_IRQ_GPM_MPL
] = {
400 .reg
= MAX8925_ON_OFF_IRQ1
,
401 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
404 [MAX8925_IRQ_GPM_SW_3SEC
] = {
405 .reg
= MAX8925_ON_OFF_IRQ1
,
406 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
409 [MAX8925_IRQ_GPM_EXTON_F
] = {
410 .reg
= MAX8925_ON_OFF_IRQ1
,
411 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
414 [MAX8925_IRQ_GPM_EXTON_R
] = {
415 .reg
= MAX8925_ON_OFF_IRQ1
,
416 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
419 [MAX8925_IRQ_GPM_SW_1SEC
] = {
420 .reg
= MAX8925_ON_OFF_IRQ1
,
421 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
424 [MAX8925_IRQ_GPM_SW_F
] = {
425 .reg
= MAX8925_ON_OFF_IRQ1
,
426 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
429 [MAX8925_IRQ_GPM_SW_R
] = {
430 .reg
= MAX8925_ON_OFF_IRQ1
,
431 .mask_reg
= MAX8925_ON_OFF_IRQ1_MASK
,
434 [MAX8925_IRQ_GPM_SYSCKEN_F
] = {
435 .reg
= MAX8925_ON_OFF_IRQ2
,
436 .mask_reg
= MAX8925_ON_OFF_IRQ2_MASK
,
439 [MAX8925_IRQ_GPM_SYSCKEN_R
] = {
440 .reg
= MAX8925_ON_OFF_IRQ2
,
441 .mask_reg
= MAX8925_ON_OFF_IRQ2_MASK
,
444 [MAX8925_IRQ_RTC_ALARM1
] = {
445 .reg
= MAX8925_RTC_IRQ
,
446 .mask_reg
= MAX8925_RTC_IRQ_MASK
,
450 [MAX8925_IRQ_RTC_ALARM0
] = {
451 .reg
= MAX8925_RTC_IRQ
,
452 .mask_reg
= MAX8925_RTC_IRQ_MASK
,
456 [MAX8925_IRQ_TSC_STICK
] = {
457 .reg
= MAX8925_TSC_IRQ
,
458 .mask_reg
= MAX8925_TSC_IRQ_MASK
,
463 [MAX8925_IRQ_TSC_NSTICK
] = {
464 .reg
= MAX8925_TSC_IRQ
,
465 .mask_reg
= MAX8925_TSC_IRQ_MASK
,
472 static inline struct max8925_irq_data
*irq_to_max8925(struct max8925_chip
*chip
,
475 return &max8925_irqs
[irq
- chip
->irq_base
];
478 static irqreturn_t
max8925_irq(int irq
, void *data
)
480 struct max8925_chip
*chip
= data
;
481 struct max8925_irq_data
*irq_data
;
482 struct i2c_client
*i2c
;
483 int read_reg
= -1, value
= 0;
486 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
487 irq_data
= &max8925_irqs
[i
];
488 /* TSC IRQ should be serviced in max8925_tsc_irq() */
489 if (irq_data
->tsc_irq
)
491 if (irq_data
->flags
== FLAGS_RTC
)
493 else if (irq_data
->flags
== FLAGS_ADC
)
497 if (read_reg
!= irq_data
->reg
) {
498 read_reg
= irq_data
->reg
;
499 value
= max8925_reg_read(i2c
, irq_data
->reg
);
501 if (value
& irq_data
->enable
)
502 handle_nested_irq(chip
->irq_base
+ i
);
507 static irqreturn_t
max8925_tsc_irq(int irq
, void *data
)
509 struct max8925_chip
*chip
= data
;
510 struct max8925_irq_data
*irq_data
;
511 struct i2c_client
*i2c
;
512 int read_reg
= -1, value
= 0;
515 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
516 irq_data
= &max8925_irqs
[i
];
517 /* non TSC IRQ should be serviced in max8925_irq() */
518 if (!irq_data
->tsc_irq
)
520 if (irq_data
->flags
== FLAGS_RTC
)
522 else if (irq_data
->flags
== FLAGS_ADC
)
526 if (read_reg
!= irq_data
->reg
) {
527 read_reg
= irq_data
->reg
;
528 value
= max8925_reg_read(i2c
, irq_data
->reg
);
530 if (value
& irq_data
->enable
)
531 handle_nested_irq(chip
->irq_base
+ i
);
536 static void max8925_irq_lock(struct irq_data
*data
)
538 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
540 mutex_lock(&chip
->irq_lock
);
543 static void max8925_irq_sync_unlock(struct irq_data
*data
)
545 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
546 struct max8925_irq_data
*irq_data
;
547 static unsigned char cache_chg
[2] = {0xff, 0xff};
548 static unsigned char cache_on
[2] = {0xff, 0xff};
549 static unsigned char cache_rtc
= 0xff, cache_tsc
= 0xff;
550 unsigned char irq_chg
[2], irq_on
[2];
551 unsigned char irq_rtc
, irq_tsc
;
554 /* Load cached value. In initial, all IRQs are masked */
555 irq_chg
[0] = cache_chg
[0];
556 irq_chg
[1] = cache_chg
[1];
557 irq_on
[0] = cache_on
[0];
558 irq_on
[1] = cache_on
[1];
561 for (i
= 0; i
< ARRAY_SIZE(max8925_irqs
); i
++) {
562 irq_data
= &max8925_irqs
[i
];
563 /* 1 -- disable, 0 -- enable */
564 switch (irq_data
->mask_reg
) {
565 case MAX8925_CHG_IRQ1_MASK
:
566 irq_chg
[0] &= ~irq_data
->enable
;
568 case MAX8925_CHG_IRQ2_MASK
:
569 irq_chg
[1] &= ~irq_data
->enable
;
571 case MAX8925_ON_OFF_IRQ1_MASK
:
572 irq_on
[0] &= ~irq_data
->enable
;
574 case MAX8925_ON_OFF_IRQ2_MASK
:
575 irq_on
[1] &= ~irq_data
->enable
;
577 case MAX8925_RTC_IRQ_MASK
:
578 irq_rtc
&= ~irq_data
->enable
;
580 case MAX8925_TSC_IRQ_MASK
:
581 irq_tsc
&= ~irq_data
->enable
;
584 dev_err(chip
->dev
, "wrong IRQ\n");
588 /* update mask into registers */
589 if (cache_chg
[0] != irq_chg
[0]) {
590 cache_chg
[0] = irq_chg
[0];
591 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ1_MASK
,
594 if (cache_chg
[1] != irq_chg
[1]) {
595 cache_chg
[1] = irq_chg
[1];
596 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ2_MASK
,
599 if (cache_on
[0] != irq_on
[0]) {
600 cache_on
[0] = irq_on
[0];
601 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ1_MASK
,
604 if (cache_on
[1] != irq_on
[1]) {
605 cache_on
[1] = irq_on
[1];
606 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ2_MASK
,
609 if (cache_rtc
!= irq_rtc
) {
611 max8925_reg_write(chip
->rtc
, MAX8925_RTC_IRQ_MASK
, irq_rtc
);
613 if (cache_tsc
!= irq_tsc
) {
615 max8925_reg_write(chip
->adc
, MAX8925_TSC_IRQ_MASK
, irq_tsc
);
618 mutex_unlock(&chip
->irq_lock
);
621 static void max8925_irq_enable(struct irq_data
*data
)
623 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
625 max8925_irqs
[data
->irq
- chip
->irq_base
].enable
626 = max8925_irqs
[data
->irq
- chip
->irq_base
].offs
;
629 static void max8925_irq_disable(struct irq_data
*data
)
631 struct max8925_chip
*chip
= irq_data_get_irq_chip_data(data
);
633 max8925_irqs
[data
->irq
- chip
->irq_base
].enable
= 0;
636 static struct irq_chip max8925_irq_chip
= {
638 .irq_bus_lock
= max8925_irq_lock
,
639 .irq_bus_sync_unlock
= max8925_irq_sync_unlock
,
640 .irq_enable
= max8925_irq_enable
,
641 .irq_disable
= max8925_irq_disable
,
644 static int max8925_irq_domain_map(struct irq_domain
*d
, unsigned int virq
,
647 irq_set_chip_data(virq
, d
->host_data
);
648 irq_set_chip_and_handler(virq
, &max8925_irq_chip
, handle_edge_irq
);
649 irq_set_nested_thread(virq
, 1);
650 irq_set_noprobe(virq
);
655 static const struct irq_domain_ops max8925_irq_domain_ops
= {
656 .map
= max8925_irq_domain_map
,
657 .xlate
= irq_domain_xlate_onetwocell
,
661 static int max8925_irq_init(struct max8925_chip
*chip
, int irq
,
662 struct max8925_platform_data
*pdata
)
664 unsigned long flags
= IRQF_TRIGGER_FALLING
| IRQF_ONESHOT
;
666 struct device_node
*node
= chip
->dev
->of_node
;
668 /* clear all interrupts */
669 max8925_reg_read(chip
->i2c
, MAX8925_CHG_IRQ1
);
670 max8925_reg_read(chip
->i2c
, MAX8925_CHG_IRQ2
);
671 max8925_reg_read(chip
->i2c
, MAX8925_ON_OFF_IRQ1
);
672 max8925_reg_read(chip
->i2c
, MAX8925_ON_OFF_IRQ2
);
673 max8925_reg_read(chip
->rtc
, MAX8925_RTC_IRQ
);
674 max8925_reg_read(chip
->adc
, MAX8925_TSC_IRQ
);
675 /* mask all interrupts except for TSC */
676 max8925_reg_write(chip
->rtc
, MAX8925_ALARM0_CNTL
, 0);
677 max8925_reg_write(chip
->rtc
, MAX8925_ALARM1_CNTL
, 0);
678 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ1_MASK
, 0xff);
679 max8925_reg_write(chip
->i2c
, MAX8925_CHG_IRQ2_MASK
, 0xff);
680 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ1_MASK
, 0xff);
681 max8925_reg_write(chip
->i2c
, MAX8925_ON_OFF_IRQ2_MASK
, 0xff);
682 max8925_reg_write(chip
->rtc
, MAX8925_RTC_IRQ_MASK
, 0xff);
684 mutex_init(&chip
->irq_lock
);
685 chip
->irq_base
= irq_alloc_descs(-1, 0, MAX8925_NR_IRQS
, 0);
686 if (chip
->irq_base
< 0) {
687 dev_err(chip
->dev
, "Failed to allocate interrupts, ret:%d\n",
692 irq_domain_add_legacy(node
, MAX8925_NR_IRQS
, chip
->irq_base
, 0,
693 &max8925_irq_domain_ops
, chip
);
695 /* request irq handler for pmic main irq*/
696 chip
->core_irq
= irq
;
699 ret
= request_threaded_irq(irq
, NULL
, max8925_irq
, flags
| IRQF_ONESHOT
,
702 dev_err(chip
->dev
, "Failed to request core IRQ: %d\n", ret
);
707 /* request irq handler for pmic tsc irq*/
709 /* mask TSC interrupt */
710 max8925_reg_write(chip
->adc
, MAX8925_TSC_IRQ_MASK
, 0x0f);
712 if (!pdata
->tsc_irq
) {
713 dev_warn(chip
->dev
, "No interrupt support on TSC IRQ\n");
716 chip
->tsc_irq
= pdata
->tsc_irq
;
717 ret
= request_threaded_irq(chip
->tsc_irq
, NULL
, max8925_tsc_irq
,
718 flags
| IRQF_ONESHOT
, "max8925-tsc", chip
);
720 dev_err(chip
->dev
, "Failed to request TSC IRQ: %d\n", ret
);
726 static void init_regulator(struct max8925_chip
*chip
,
727 struct max8925_platform_data
*pdata
)
734 reg_devs
[0].platform_data
= pdata
->sd1
;
735 reg_devs
[0].pdata_size
= sizeof(struct regulator_init_data
);
738 reg_devs
[1].platform_data
= pdata
->sd2
;
739 reg_devs
[1].pdata_size
= sizeof(struct regulator_init_data
);
742 reg_devs
[2].platform_data
= pdata
->sd3
;
743 reg_devs
[2].pdata_size
= sizeof(struct regulator_init_data
);
746 reg_devs
[3].platform_data
= pdata
->ldo1
;
747 reg_devs
[3].pdata_size
= sizeof(struct regulator_init_data
);
750 reg_devs
[4].platform_data
= pdata
->ldo2
;
751 reg_devs
[4].pdata_size
= sizeof(struct regulator_init_data
);
754 reg_devs
[5].platform_data
= pdata
->ldo3
;
755 reg_devs
[5].pdata_size
= sizeof(struct regulator_init_data
);
758 reg_devs
[6].platform_data
= pdata
->ldo4
;
759 reg_devs
[6].pdata_size
= sizeof(struct regulator_init_data
);
762 reg_devs
[7].platform_data
= pdata
->ldo5
;
763 reg_devs
[7].pdata_size
= sizeof(struct regulator_init_data
);
766 reg_devs
[8].platform_data
= pdata
->ldo6
;
767 reg_devs
[8].pdata_size
= sizeof(struct regulator_init_data
);
770 reg_devs
[9].platform_data
= pdata
->ldo7
;
771 reg_devs
[9].pdata_size
= sizeof(struct regulator_init_data
);
774 reg_devs
[10].platform_data
= pdata
->ldo8
;
775 reg_devs
[10].pdata_size
= sizeof(struct regulator_init_data
);
778 reg_devs
[11].platform_data
= pdata
->ldo9
;
779 reg_devs
[11].pdata_size
= sizeof(struct regulator_init_data
);
782 reg_devs
[12].platform_data
= pdata
->ldo10
;
783 reg_devs
[12].pdata_size
= sizeof(struct regulator_init_data
);
786 reg_devs
[13].platform_data
= pdata
->ldo11
;
787 reg_devs
[13].pdata_size
= sizeof(struct regulator_init_data
);
790 reg_devs
[14].platform_data
= pdata
->ldo12
;
791 reg_devs
[14].pdata_size
= sizeof(struct regulator_init_data
);
794 reg_devs
[15].platform_data
= pdata
->ldo13
;
795 reg_devs
[15].pdata_size
= sizeof(struct regulator_init_data
);
798 reg_devs
[16].platform_data
= pdata
->ldo14
;
799 reg_devs
[16].pdata_size
= sizeof(struct regulator_init_data
);
802 reg_devs
[17].platform_data
= pdata
->ldo15
;
803 reg_devs
[17].pdata_size
= sizeof(struct regulator_init_data
);
806 reg_devs
[18].platform_data
= pdata
->ldo16
;
807 reg_devs
[18].pdata_size
= sizeof(struct regulator_init_data
);
810 reg_devs
[19].platform_data
= pdata
->ldo17
;
811 reg_devs
[19].pdata_size
= sizeof(struct regulator_init_data
);
814 reg_devs
[20].platform_data
= pdata
->ldo18
;
815 reg_devs
[20].pdata_size
= sizeof(struct regulator_init_data
);
818 reg_devs
[21].platform_data
= pdata
->ldo19
;
819 reg_devs
[21].pdata_size
= sizeof(struct regulator_init_data
);
822 reg_devs
[22].platform_data
= pdata
->ldo20
;
823 reg_devs
[22].pdata_size
= sizeof(struct regulator_init_data
);
825 ret
= mfd_add_devices(chip
->dev
, 0, reg_devs
, ARRAY_SIZE(reg_devs
),
828 dev_err(chip
->dev
, "Failed to add regulator subdev\n");
833 int max8925_device_init(struct max8925_chip
*chip
,
834 struct max8925_platform_data
*pdata
)
838 max8925_irq_init(chip
, chip
->i2c
->irq
, pdata
);
840 if (pdata
&& (pdata
->power
|| pdata
->touch
)) {
841 /* enable ADC to control internal reference */
842 max8925_set_bits(chip
->i2c
, MAX8925_RESET_CNFG
, 1, 1);
843 /* enable internal reference for ADC */
844 max8925_set_bits(chip
->adc
, MAX8925_TSC_CNFG1
, 3, 2);
845 /* check for internal reference IRQ */
847 ret
= max8925_reg_read(chip
->adc
, MAX8925_TSC_IRQ
);
848 } while (ret
& MAX8925_NREF_OK
);
849 /* enaable ADC scheduler, interval is 1 second */
850 max8925_set_bits(chip
->adc
, MAX8925_ADC_SCHED
, 3, 2);
853 /* enable Momentary Power Loss */
854 max8925_set_bits(chip
->rtc
, MAX8925_MPL_CNTL
, 1 << 4, 1 << 4);
856 ret
= mfd_add_devices(chip
->dev
, 0, &rtc_devs
[0],
857 ARRAY_SIZE(rtc_devs
),
858 NULL
, chip
->irq_base
, NULL
);
860 dev_err(chip
->dev
, "Failed to add rtc subdev\n");
864 ret
= mfd_add_devices(chip
->dev
, 0, &onkey_devs
[0],
865 ARRAY_SIZE(onkey_devs
),
866 NULL
, chip
->irq_base
, NULL
);
868 dev_err(chip
->dev
, "Failed to add onkey subdev\n");
872 init_regulator(chip
, pdata
);
874 if (pdata
&& pdata
->backlight
) {
875 bk_devs
[0].platform_data
= &pdata
->backlight
;
876 bk_devs
[0].pdata_size
= sizeof(struct max8925_backlight_pdata
);
878 ret
= mfd_add_devices(chip
->dev
, 0, bk_devs
, ARRAY_SIZE(bk_devs
),
881 dev_err(chip
->dev
, "Failed to add backlight subdev\n");
885 ret
= mfd_add_devices(chip
->dev
, 0, &power_devs
[0],
886 ARRAY_SIZE(power_devs
),
890 "Failed to add power supply subdev, err = %d\n", ret
);
894 if (pdata
&& pdata
->touch
) {
895 ret
= mfd_add_devices(chip
->dev
, 0, &touch_devs
[0],
896 ARRAY_SIZE(touch_devs
),
897 NULL
, chip
->tsc_irq
, NULL
);
899 dev_err(chip
->dev
, "Failed to add touch subdev\n");
906 mfd_remove_devices(chip
->dev
);
911 void max8925_device_exit(struct max8925_chip
*chip
)
914 free_irq(chip
->core_irq
, chip
);
916 free_irq(chip
->tsc_irq
, chip
);
917 mfd_remove_devices(chip
->dev
);