drivers/misc/habanalabs/common/firmware_if.c

   1 // SPDX-License-Identifier: GPL-2.0
   2
   3 /*
   4  * Copyright 2016-2019 HabanaLabs, Ltd.
   5  * All Rights Reserved.
   6  */
   7
   8 #include "habanalabs.h"
   9 #include "../include/common/hl_boot_if.h"
  10
  11 #include <linux/firmware.h>
  12 #include <linux/slab.h>
  13
  14 #define FW_FILE_MAX_SIZE        0x1400000 /* maximum size of 20MB */
  15 /**
  16  * hl_fw_load_fw_to_device() - Load F/W code to device's memory.
  17  *
  18  * @hdev: pointer to hl_device structure.
  19  * @fw_name: the firmware image name
  20  * @dst: IO memory mapped address space to copy firmware to
  21  * @src_offset: offset in src FW to copy from
  22  * @size: amount of bytes to copy (0 to copy the whole binary)
  23  *
  24  * Copy fw code from firmware file to device memory.
  25  *
  26  * Return: 0 on success, non-zero for failure.
  27  */
  28 int hl_fw_load_fw_to_device(struct hl_device *hdev, const char *fw_name,
  29                                 void __iomem *dst, u32 src_offset, u32 size)
  30 {
  31         const struct firmware *fw;
  32         const void *fw_data;
  33         size_t fw_size;
  34         int rc;
  35
  36         rc = request_firmware(&fw, fw_name, hdev->dev);
  37         if (rc) {
  38                 dev_err(hdev->dev, "Firmware file %s is not found!\n", fw_name);
  39                 goto out;
  40         }
  41
  42         fw_size = fw->size;
  43         if ((fw_size % 4) != 0) {
  44                 dev_err(hdev->dev, "Illegal %s firmware size %zu\n",
  45                         fw_name, fw_size);
  46                 rc = -EINVAL;
  47                 goto out;
  48         }
  49
  50         dev_dbg(hdev->dev, "%s firmware size == %zu\n", fw_name, fw_size);
  51
  52         if (fw_size > FW_FILE_MAX_SIZE) {
  53                 dev_err(hdev->dev,
  54                         "FW file size %zu exceeds maximum of %u bytes\n",
  55                         fw_size, FW_FILE_MAX_SIZE);
  56                 rc = -EINVAL;
  57                 goto out;
  58         }
  59
  60         if (size - src_offset > fw_size) {
  61                 dev_err(hdev->dev,
  62                         "size to copy(%u) and offset(%u) are invalid\n",
  63                         size, src_offset);
  64                 rc = -EINVAL;
  65                 goto out;
  66         }
  67
  68         if (size)
  69                 fw_size = size;
  70
  71         fw_data = (const void *) fw->data;
  72
  73         memcpy_toio(dst, fw_data + src_offset, fw_size);
  74
  75 out:
  76         release_firmware(fw);
  77         return rc;
  78 }
  79
  80 int hl_fw_send_pci_access_msg(struct hl_device *hdev, u32 opcode)
  81 {
  82         struct cpucp_packet pkt = {};
  83
  84         pkt.ctl = cpu_to_le32(opcode << CPUCP_PKT_CTL_OPCODE_SHIFT);
  85
  86         return hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt,
  87                                                 sizeof(pkt), 0, NULL);
  88 }
  89
  90 int hl_fw_send_cpu_message(struct hl_device *hdev, u32 hw_queue_id, u32 *msg,
  91                                 u16 len, u32 timeout, u64 *result)
  92 {
  93         struct cpucp_packet *pkt;
  94         dma_addr_t pkt_dma_addr;
  95         u32 tmp;
  96         int rc = 0;
  97
  98         pkt = hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev, len,
  99                                                                 &pkt_dma_addr);
 100         if (!pkt) {
 101                 dev_err(hdev->dev,
 102                         "Failed to allocate DMA memory for packet to CPU\n");
 103                 return -ENOMEM;
 104         }
 105
 106         memcpy(pkt, msg, len);
 107
 108         mutex_lock(&hdev->send_cpu_message_lock);
 109
 110         if (hdev->disabled)
 111                 goto out;
 112
 113         if (hdev->device_cpu_disabled) {
 114                 rc = -EIO;
 115                 goto out;
 116         }
 117
 118         rc = hl_hw_queue_send_cb_no_cmpl(hdev, hw_queue_id, len, pkt_dma_addr);
 119         if (rc) {
 120                 dev_err(hdev->dev, "Failed to send CB on CPU PQ (%d)\n", rc);
 121                 goto out;
 122         }
 123
 124         rc = hl_poll_timeout_memory(hdev, &pkt->fence, tmp,
 125                                 (tmp == CPUCP_PACKET_FENCE_VAL), 1000,
 126                                 timeout, true);
 127
 128         hl_hw_queue_inc_ci_kernel(hdev, hw_queue_id);
 129
 130         if (rc == -ETIMEDOUT) {
 131                 dev_err(hdev->dev, "Device CPU packet timeout (0x%x)\n", tmp);
 132                 hdev->device_cpu_disabled = true;
 133                 goto out;
 134         }
 135
 136         tmp = le32_to_cpu(pkt->ctl);
 137
 138         rc = (tmp & CPUCP_PKT_CTL_RC_MASK) >> CPUCP_PKT_CTL_RC_SHIFT;
 139         if (rc) {
 140                 dev_err(hdev->dev, "F/W ERROR %d for CPU packet %d\n",
 141                         rc,
 142                         (tmp & CPUCP_PKT_CTL_OPCODE_MASK)
 143                                                 >> CPUCP_PKT_CTL_OPCODE_SHIFT);
 144                 rc = -EIO;
 145         } else if (result) {
 146                 *result = le64_to_cpu(pkt->result);
 147         }
 148
 149 out:
 150         mutex_unlock(&hdev->send_cpu_message_lock);
 151
 152         hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, len, pkt);
 153
 154         return rc;
 155 }
 156
 157 int hl_fw_unmask_irq(struct hl_device *hdev, u16 event_type)
 158 {
 159         struct cpucp_packet pkt;
 160         u64 result;
 161         int rc;
 162
 163         memset(&pkt, 0, sizeof(pkt));
 164
 165         pkt.ctl = cpu_to_le32(CPUCP_PACKET_UNMASK_RAZWI_IRQ <<
 166                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 167         pkt.value = cpu_to_le64(event_type);
 168
 169         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 170                                                 0, &result);
 171
 172         if (rc)
 173                 dev_err(hdev->dev, "failed to unmask RAZWI IRQ %d", event_type);
 174
 175         return rc;
 176 }
 177
 178 int hl_fw_unmask_irq_arr(struct hl_device *hdev, const u32 *irq_arr,
 179                 size_t irq_arr_size)
 180 {
 181         struct cpucp_unmask_irq_arr_packet *pkt;
 182         size_t total_pkt_size;
 183         u64 result;
 184         int rc;
 185
 186         total_pkt_size = sizeof(struct cpucp_unmask_irq_arr_packet) +
 187                         irq_arr_size;
 188
 189         /* data should be aligned to 8 bytes in order to CPU-CP to copy it */
 190         total_pkt_size = (total_pkt_size + 0x7) & ~0x7;
 191
 192         /* total_pkt_size is casted to u16 later on */
 193         if (total_pkt_size > USHRT_MAX) {
 194                 dev_err(hdev->dev, "too many elements in IRQ array\n");
 195                 return -EINVAL;
 196         }
 197
 198         pkt = kzalloc(total_pkt_size, GFP_KERNEL);
 199         if (!pkt)
 200                 return -ENOMEM;
 201
 202         pkt->length = cpu_to_le32(irq_arr_size / sizeof(irq_arr[0]));
 203         memcpy(&pkt->irqs, irq_arr, irq_arr_size);
 204
 205         pkt->cpucp_pkt.ctl = cpu_to_le32(CPUCP_PACKET_UNMASK_RAZWI_IRQ_ARRAY <<
 206                                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 207
 208         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) pkt,
 209                                                 total_pkt_size, 0, &result);
 210
 211         if (rc)
 212                 dev_err(hdev->dev, "failed to unmask IRQ array\n");
 213
 214         kfree(pkt);
 215
 216         return rc;
 217 }
 218
 219 int hl_fw_test_cpu_queue(struct hl_device *hdev)
 220 {
 221         struct cpucp_packet test_pkt = {};
 222         u64 result;
 223         int rc;
 224
 225         test_pkt.ctl = cpu_to_le32(CPUCP_PACKET_TEST <<
 226                                         CPUCP_PKT_CTL_OPCODE_SHIFT);
 227         test_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
 228
 229         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &test_pkt,
 230                                                 sizeof(test_pkt), 0, &result);
 231
 232         if (!rc) {
 233                 if (result != CPUCP_PACKET_FENCE_VAL)
 234                         dev_err(hdev->dev,
 235                                 "CPU queue test failed (%#08llx)\n", result);
 236         } else {
 237                 dev_err(hdev->dev, "CPU queue test failed, error %d\n", rc);
 238         }
 239
 240         return rc;
 241 }
 242
 243 void *hl_fw_cpu_accessible_dma_pool_alloc(struct hl_device *hdev, size_t size,
 244                                                 dma_addr_t *dma_handle)
 245 {
 246         u64 kernel_addr;
 247
 248         kernel_addr = gen_pool_alloc(hdev->cpu_accessible_dma_pool, size);
 249
 250         *dma_handle = hdev->cpu_accessible_dma_address +
 251                 (kernel_addr - (u64) (uintptr_t) hdev->cpu_accessible_dma_mem);
 252
 253         return (void *) (uintptr_t) kernel_addr;
 254 }
 255
 256 void hl_fw_cpu_accessible_dma_pool_free(struct hl_device *hdev, size_t size,
 257                                         void *vaddr)
 258 {
 259         gen_pool_free(hdev->cpu_accessible_dma_pool, (u64) (uintptr_t) vaddr,
 260                         size);
 261 }
 262
 263 int hl_fw_send_heartbeat(struct hl_device *hdev)
 264 {
 265         struct cpucp_packet hb_pkt = {};
 266         u64 result;
 267         int rc;
 268
 269         hb_pkt.ctl = cpu_to_le32(CPUCP_PACKET_TEST <<
 270                                         CPUCP_PKT_CTL_OPCODE_SHIFT);
 271         hb_pkt.value = cpu_to_le64(CPUCP_PACKET_FENCE_VAL);
 272
 273         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &hb_pkt,
 274                                                 sizeof(hb_pkt), 0, &result);
 275
 276         if ((rc) || (result != CPUCP_PACKET_FENCE_VAL))
 277                 rc = -EIO;
 278
 279         return rc;
 280 }
 281
 282 int hl_fw_cpucp_info_get(struct hl_device *hdev,
 283                         u32 cpu_security_boot_status_reg)
 284 {
 285         struct asic_fixed_properties *prop = &hdev->asic_prop;
 286         struct cpucp_packet pkt = {};
 287         void *cpucp_info_cpu_addr;
 288         dma_addr_t cpucp_info_dma_addr;
 289         u64 result;
 290         int rc;
 291
 292         cpucp_info_cpu_addr =
 293                         hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
 294                                         sizeof(struct cpucp_info),
 295                                         &cpucp_info_dma_addr);
 296         if (!cpucp_info_cpu_addr) {
 297                 dev_err(hdev->dev,
 298                         "Failed to allocate DMA memory for CPU-CP info packet\n");
 299                 return -ENOMEM;
 300         }
 301
 302         memset(cpucp_info_cpu_addr, 0, sizeof(struct cpucp_info));
 303
 304         pkt.ctl = cpu_to_le32(CPUCP_PACKET_INFO_GET <<
 305                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 306         pkt.addr = cpu_to_le64(cpucp_info_dma_addr);
 307         pkt.data_max_size = cpu_to_le32(sizeof(struct cpucp_info));
 308
 309         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 310                                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 311         if (rc) {
 312                 dev_err(hdev->dev,
 313                         "Failed to handle CPU-CP info pkt, error %d\n", rc);
 314                 goto out;
 315         }
 316
 317         memcpy(&prop->cpucp_info, cpucp_info_cpu_addr,
 318                         sizeof(prop->cpucp_info));
 319
 320         rc = hl_build_hwmon_channel_info(hdev, prop->cpucp_info.sensors);
 321         if (rc) {
 322                 dev_err(hdev->dev,
 323                         "Failed to build hwmon channel info, error %d\n", rc);
 324                 rc = -EFAULT;
 325                 goto out;
 326         }
 327
 328         /* Read FW application security bits again */
 329         if (hdev->asic_prop.fw_security_status_valid)
 330                 hdev->asic_prop.fw_app_security_map =
 331                                 RREG32(cpu_security_boot_status_reg);
 332
 333 out:
 334         hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev,
 335                         sizeof(struct cpucp_info), cpucp_info_cpu_addr);
 336
 337         return rc;
 338 }
 339
 340 int hl_fw_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
 341 {
 342         struct cpucp_packet pkt = {};
 343         void *eeprom_info_cpu_addr;
 344         dma_addr_t eeprom_info_dma_addr;
 345         u64 result;
 346         int rc;
 347
 348         eeprom_info_cpu_addr =
 349                         hdev->asic_funcs->cpu_accessible_dma_pool_alloc(hdev,
 350                                         max_size, &eeprom_info_dma_addr);
 351         if (!eeprom_info_cpu_addr) {
 352                 dev_err(hdev->dev,
 353                         "Failed to allocate DMA memory for CPU-CP EEPROM packet\n");
 354                 return -ENOMEM;
 355         }
 356
 357         memset(eeprom_info_cpu_addr, 0, max_size);
 358
 359         pkt.ctl = cpu_to_le32(CPUCP_PACKET_EEPROM_DATA_GET <<
 360                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 361         pkt.addr = cpu_to_le64(eeprom_info_dma_addr);
 362         pkt.data_max_size = cpu_to_le32(max_size);
 363
 364         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 365                         HL_CPUCP_EEPROM_TIMEOUT_USEC, &result);
 366
 367         if (rc) {
 368                 dev_err(hdev->dev,
 369                         "Failed to handle CPU-CP EEPROM packet, error %d\n",
 370                         rc);
 371                 goto out;
 372         }
 373
 374         /* result contains the actual size */
 375         memcpy(data, eeprom_info_cpu_addr, min((size_t)result, max_size));
 376
 377 out:
 378         hdev->asic_funcs->cpu_accessible_dma_pool_free(hdev, max_size,
 379                         eeprom_info_cpu_addr);
 380
 381         return rc;
 382 }
 383
 384 int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
 385                 struct hl_info_pci_counters *counters)
 386 {
 387         struct cpucp_packet pkt = {};
 388         u64 result;
 389         int rc;
 390
 391         pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_THROUGHPUT_GET <<
 392                         CPUCP_PKT_CTL_OPCODE_SHIFT);
 393
 394         /* Fetch PCI rx counter */
 395         pkt.index = cpu_to_le32(cpucp_pcie_throughput_rx);
 396         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 397                                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 398         if (rc) {
 399                 dev_err(hdev->dev,
 400                         "Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
 401                 return rc;
 402         }
 403         counters->rx_throughput = result;
 404
 405         /* Fetch PCI tx counter */
 406         pkt.index = cpu_to_le32(cpucp_pcie_throughput_tx);
 407         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 408                                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 409         if (rc) {
 410                 dev_err(hdev->dev,
 411                         "Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
 412                 return rc;
 413         }
 414         counters->tx_throughput = result;
 415
 416         /* Fetch PCI replay counter */
 417         pkt.ctl = cpu_to_le32(CPUCP_PACKET_PCIE_REPLAY_CNT_GET <<
 418                         CPUCP_PKT_CTL_OPCODE_SHIFT);
 419
 420         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 421                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 422         if (rc) {
 423                 dev_err(hdev->dev,
 424                         "Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
 425                 return rc;
 426         }
 427         counters->replay_cnt = (u32) result;
 428
 429         return rc;
 430 }
 431
 432 int hl_fw_cpucp_total_energy_get(struct hl_device *hdev, u64 *total_energy)
 433 {
 434         struct cpucp_packet pkt = {};
 435         u64 result;
 436         int rc;
 437
 438         pkt.ctl = cpu_to_le32(CPUCP_PACKET_TOTAL_ENERGY_GET <<
 439                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 440
 441         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 442                                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 443         if (rc) {
 444                 dev_err(hdev->dev,
 445                         "Failed to handle CpuCP total energy pkt, error %d\n",
 446                                 rc);
 447                 return rc;
 448         }
 449
 450         *total_energy = result;
 451
 452         return rc;
 453 }
 454
 455 int hl_fw_cpucp_pll_info_get(struct hl_device *hdev, u16 pll_index,
 456                 u16 *pll_freq_arr)
 457 {
 458         struct cpucp_packet pkt;
 459         u64 result;
 460         int rc;
 461
 462         memset(&pkt, 0, sizeof(pkt));
 463
 464         pkt.ctl = cpu_to_le32(CPUCP_PACKET_PLL_INFO_GET <<
 465                                 CPUCP_PKT_CTL_OPCODE_SHIFT);
 466         pkt.pll_type = __cpu_to_le16(pll_index);
 467
 468         rc = hdev->asic_funcs->send_cpu_message(hdev, (u32 *) &pkt, sizeof(pkt),
 469                         HL_CPUCP_INFO_TIMEOUT_USEC, &result);
 470         if (rc)
 471                 dev_err(hdev->dev, "Failed to read PLL info, error %d\n", rc);
 472
 473         pll_freq_arr[0] = FIELD_GET(CPUCP_PKT_RES_PLL_OUT0_MASK, result);
 474         pll_freq_arr[1] = FIELD_GET(CPUCP_PKT_RES_PLL_OUT1_MASK, result);
 475         pll_freq_arr[2] = FIELD_GET(CPUCP_PKT_RES_PLL_OUT2_MASK, result);
 476         pll_freq_arr[3] = FIELD_GET(CPUCP_PKT_RES_PLL_OUT3_MASK, result);
 477
 478         return rc;
 479 }
 480
 481 static void fw_read_errors(struct hl_device *hdev, u32 boot_err0_reg,
 482                 u32 cpu_security_boot_status_reg)
 483 {
 484         u32 err_val, security_val;
 485
 486         /* Some of the firmware status codes are deprecated in newer f/w
 487          * versions. In those versions, the errors are reported
 488          * in different registers. Therefore, we need to check those
 489          * registers and print the exact errors. Moreover, there
 490          * may be multiple errors, so we need to report on each error
 491          * separately. Some of the error codes might indicate a state
 492          * that is not an error per-se, but it is an error in production
 493          * environment
 494          */
 495         err_val = RREG32(boot_err0_reg);
 496         if (!(err_val & CPU_BOOT_ERR0_ENABLED))
 497                 return;
 498
 499         if (err_val & CPU_BOOT_ERR0_DRAM_INIT_FAIL)
 500                 dev_err(hdev->dev,
 501                         "Device boot error - DRAM initialization failed\n");
 502         if (err_val & CPU_BOOT_ERR0_FIT_CORRUPTED)
 503                 dev_err(hdev->dev, "Device boot error - FIT image corrupted\n");
 504         if (err_val & CPU_BOOT_ERR0_TS_INIT_FAIL)
 505                 dev_err(hdev->dev,
 506                         "Device boot error - Thermal Sensor initialization failed\n");
 507         if (err_val & CPU_BOOT_ERR0_DRAM_SKIPPED)
 508                 dev_warn(hdev->dev,
 509                         "Device boot warning - Skipped DRAM initialization\n");
 510         if (err_val & CPU_BOOT_ERR0_BMC_WAIT_SKIPPED)
 511                 dev_warn(hdev->dev,
 512                         "Device boot error - Skipped waiting for BMC\n");
 513         if (err_val & CPU_BOOT_ERR0_NIC_DATA_NOT_RDY)
 514                 dev_err(hdev->dev,
 515                         "Device boot error - Serdes data from BMC not available\n");
 516         if (err_val & CPU_BOOT_ERR0_NIC_FW_FAIL)
 517                 dev_err(hdev->dev,
 518                         "Device boot error - NIC F/W initialization failed\n");
 519         if (err_val & CPU_BOOT_ERR0_SECURITY_NOT_RDY)
 520                 dev_warn(hdev->dev,
 521                         "Device boot warning - security not ready\n");
 522         if (err_val & CPU_BOOT_ERR0_SECURITY_FAIL)
 523                 dev_err(hdev->dev, "Device boot error - security failure\n");
 524         if (err_val & CPU_BOOT_ERR0_EFUSE_FAIL)
 525                 dev_err(hdev->dev, "Device boot error - eFuse failure\n");
 526
 527         security_val = RREG32(cpu_security_boot_status_reg);
 528         if (security_val & CPU_BOOT_DEV_STS0_ENABLED)
 529                 dev_dbg(hdev->dev, "Device security status %#x\n",
 530                                 security_val);
 531 }
 532
 533 static void detect_cpu_boot_status(struct hl_device *hdev, u32 status)
 534 {
 535         /* Some of the status codes below are deprecated in newer f/w
 536          * versions but we keep them here for backward compatibility
 537          */
 538         switch (status) {
 539         case CPU_BOOT_STATUS_NA:
 540                 dev_err(hdev->dev,
 541                         "Device boot error - BTL did NOT run\n");
 542                 break;
 543         case CPU_BOOT_STATUS_IN_WFE:
 544                 dev_err(hdev->dev,
 545                         "Device boot error - Stuck inside WFE loop\n");
 546                 break;
 547         case CPU_BOOT_STATUS_IN_BTL:
 548                 dev_err(hdev->dev,
 549                         "Device boot error - Stuck in BTL\n");
 550                 break;
 551         case CPU_BOOT_STATUS_IN_PREBOOT:
 552                 dev_err(hdev->dev,
 553                         "Device boot error - Stuck in Preboot\n");
 554                 break;
 555         case CPU_BOOT_STATUS_IN_SPL:
 556                 dev_err(hdev->dev,
 557                         "Device boot error - Stuck in SPL\n");
 558                 break;
 559         case CPU_BOOT_STATUS_IN_UBOOT:
 560                 dev_err(hdev->dev,
 561                         "Device boot error - Stuck in u-boot\n");
 562                 break;
 563         case CPU_BOOT_STATUS_DRAM_INIT_FAIL:
 564                 dev_err(hdev->dev,
 565                         "Device boot error - DRAM initialization failed\n");
 566                 break;
 567         case CPU_BOOT_STATUS_UBOOT_NOT_READY:
 568                 dev_err(hdev->dev,
 569                         "Device boot error - u-boot stopped by user\n");
 570                 break;
 571         case CPU_BOOT_STATUS_TS_INIT_FAIL:
 572                 dev_err(hdev->dev,
 573                         "Device boot error - Thermal Sensor initialization failed\n");
 574                 break;
 575         default:
 576                 dev_err(hdev->dev,
 577                         "Device boot error - Invalid status code %d\n",
 578                         status);
 579                 break;
 580         }
 581 }
 582
 583 int hl_fw_read_preboot_status(struct hl_device *hdev, u32 cpu_boot_status_reg,
 584                 u32 cpu_security_boot_status_reg, u32 boot_err0_reg,
 585                 u32 timeout)
 586 {
 587         struct asic_fixed_properties *prop = &hdev->asic_prop;
 588         u32 status, security_status;
 589         int rc;
 590
 591         if (!hdev->cpu_enable)
 592                 return 0;
 593
 594         /* Need to check two possible scenarios:
 595          *
 596          * CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT - for newer firmwares where
 597          * the preboot is waiting for the boot fit
 598          *
 599          * All other status values - for older firmwares where the uboot was
 600          * loaded from the FLASH
 601          */
 602         rc = hl_poll_timeout(
 603                 hdev,
 604                 cpu_boot_status_reg,
 605                 status,
 606                 (status == CPU_BOOT_STATUS_IN_UBOOT) ||
 607                 (status == CPU_BOOT_STATUS_DRAM_RDY) ||
 608                 (status == CPU_BOOT_STATUS_NIC_FW_RDY) ||
 609                 (status == CPU_BOOT_STATUS_READY_TO_BOOT) ||
 610                 (status == CPU_BOOT_STATUS_SRAM_AVAIL) ||
 611                 (status == CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT),
 612                 10000,
 613                 timeout);
 614
 615         if (rc) {
 616                 dev_err(hdev->dev, "Failed to read preboot version\n");
 617                 detect_cpu_boot_status(hdev, status);
 618                 fw_read_errors(hdev, boot_err0_reg,
 619                                 cpu_security_boot_status_reg);
 620                 return -EIO;
 621         }
 622
 623         rc = hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_PREBOOT);
 624         if (rc)
 625                 return rc;
 626
 627         security_status = RREG32(cpu_security_boot_status_reg);
 628
 629         /* We read security status multiple times during boot:
 630          * 1. preboot - a. Check whether the security status bits are valid
 631          *              b. Check whether fw security is enabled
 632          *              c. Check whether hard reset is done by preboot
 633          * 2. boot cpu - a. Fetch boot cpu security status
 634          *               b. Check whether hard reset is done by boot cpu
 635          * 3. FW application - a. Fetch fw application security status
 636          *                     b. Check whether hard reset is done by fw app
 637          *
 638          * Preboot:
 639          * Check security status bit (CPU_BOOT_DEV_STS0_ENABLED), if it is set
 640          * check security enabled bit (CPU_BOOT_DEV_STS0_SECURITY_EN)
 641          */
 642         if (security_status & CPU_BOOT_DEV_STS0_ENABLED) {
 643                 prop->fw_security_status_valid = 1;
 644
 645                 if (security_status & CPU_BOOT_DEV_STS0_SECURITY_EN)
 646                         prop->fw_security_disabled = false;
 647                 else
 648                         prop->fw_security_disabled = true;
 649
 650                 if (security_status & CPU_BOOT_DEV_STS0_FW_HARD_RST_EN)
 651                         prop->hard_reset_done_by_fw = true;
 652         } else {
 653                 prop->fw_security_status_valid = 0;
 654                 prop->fw_security_disabled = true;
 655         }
 656
 657         dev_dbg(hdev->dev, "Firmware preboot hard-reset is %s\n",
 658                         prop->hard_reset_done_by_fw ? "enabled" : "disabled");
 659
 660         dev_info(hdev->dev, "firmware-level security is %s\n",
 661                         prop->fw_security_disabled ? "disabled" : "enabled");
 662
 663         return 0;
 664 }
 665
 666 int hl_fw_init_cpu(struct hl_device *hdev, u32 cpu_boot_status_reg,
 667                         u32 msg_to_cpu_reg, u32 cpu_msg_status_reg,
 668                         u32 cpu_security_boot_status_reg, u32 boot_err0_reg,
 669                         bool skip_bmc, u32 cpu_timeout, u32 boot_fit_timeout)
 670 {
 671         struct asic_fixed_properties *prop = &hdev->asic_prop;
 672         u32 status;
 673         int rc;
 674
 675         if (!(hdev->fw_loading & FW_TYPE_BOOT_CPU))
 676                 return 0;
 677
 678         dev_info(hdev->dev, "Going to wait for device boot (up to %lds)\n",
 679                 cpu_timeout / USEC_PER_SEC);
 680
 681         /* Wait for boot FIT request */
 682         rc = hl_poll_timeout(
 683                 hdev,
 684                 cpu_boot_status_reg,
 685                 status,
 686                 status == CPU_BOOT_STATUS_WAITING_FOR_BOOT_FIT,
 687                 10000,
 688                 boot_fit_timeout);
 689
 690         if (rc) {
 691                 dev_dbg(hdev->dev,
 692                         "No boot fit request received, resuming boot\n");
 693         } else {
 694                 rc = hdev->asic_funcs->load_boot_fit_to_device(hdev);
 695                 if (rc)
 696                         goto out;
 697
 698                 /* Clear device CPU message status */
 699                 WREG32(cpu_msg_status_reg, CPU_MSG_CLR);
 700
 701                 /* Signal device CPU that boot loader is ready */
 702                 WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);
 703
 704                 /* Poll for CPU device ack */
 705                 rc = hl_poll_timeout(
 706                         hdev,
 707                         cpu_msg_status_reg,
 708                         status,
 709                         status == CPU_MSG_OK,
 710                         10000,
 711                         boot_fit_timeout);
 712
 713                 if (rc) {
 714                         dev_err(hdev->dev,
 715                                 "Timeout waiting for boot fit load ack\n");
 716                         goto out;
 717                 }
 718
 719                 /* Clear message */
 720                 WREG32(msg_to_cpu_reg, KMD_MSG_NA);
 721         }
 722
 723         /* Make sure CPU boot-loader is running */
 724         rc = hl_poll_timeout(
 725                 hdev,
 726                 cpu_boot_status_reg,
 727                 status,
 728                 (status == CPU_BOOT_STATUS_DRAM_RDY) ||
 729                 (status == CPU_BOOT_STATUS_NIC_FW_RDY) ||
 730                 (status == CPU_BOOT_STATUS_READY_TO_BOOT) ||
 731                 (status == CPU_BOOT_STATUS_SRAM_AVAIL),
 732                 10000,
 733                 cpu_timeout);
 734
 735         dev_dbg(hdev->dev, "uboot status = %d\n", status);
 736
 737         /* Read U-Boot version now in case we will later fail */
 738         hdev->asic_funcs->read_device_fw_version(hdev, FW_COMP_UBOOT);
 739
 740         /* Clear reset status since we need to read it again from boot CPU */
 741         prop->hard_reset_done_by_fw = false;
 742
 743         /* Read boot_cpu security bits */
 744         if (prop->fw_security_status_valid) {
 745                 prop->fw_boot_cpu_security_map =
 746                                 RREG32(cpu_security_boot_status_reg);
 747
 748                 if (prop->fw_boot_cpu_security_map &
 749                                 CPU_BOOT_DEV_STS0_FW_HARD_RST_EN)
 750                         prop->hard_reset_done_by_fw = true;
 751         }
 752
 753         dev_dbg(hdev->dev, "Firmware boot CPU hard-reset is %s\n",
 754                         prop->hard_reset_done_by_fw ? "enabled" : "disabled");
 755
 756         if (rc) {
 757                 detect_cpu_boot_status(hdev, status);
 758                 rc = -EIO;
 759                 goto out;
 760         }
 761
 762         if (!(hdev->fw_loading & FW_TYPE_LINUX)) {
 763                 dev_info(hdev->dev, "Skip loading Linux F/W\n");
 764                 goto out;
 765         }
 766
 767         if (status == CPU_BOOT_STATUS_SRAM_AVAIL)
 768                 goto out;
 769
 770         dev_info(hdev->dev,
 771                 "Loading firmware to device, may take some time...\n");
 772
 773         rc = hdev->asic_funcs->load_firmware_to_device(hdev);
 774         if (rc)
 775                 goto out;
 776
 777         if (skip_bmc) {
 778                 WREG32(msg_to_cpu_reg, KMD_MSG_SKIP_BMC);
 779
 780                 rc = hl_poll_timeout(
 781                         hdev,
 782                         cpu_boot_status_reg,
 783                         status,
 784                         (status == CPU_BOOT_STATUS_BMC_WAITING_SKIPPED),
 785                         10000,
 786                         cpu_timeout);
 787
 788                 if (rc) {
 789                         dev_err(hdev->dev,
 790                                 "Failed to get ACK on skipping BMC, %d\n",
 791                                 status);
 792                         WREG32(msg_to_cpu_reg, KMD_MSG_NA);
 793                         rc = -EIO;
 794                         goto out;
 795                 }
 796         }
 797
 798         WREG32(msg_to_cpu_reg, KMD_MSG_FIT_RDY);
 799
 800         rc = hl_poll_timeout(
 801                 hdev,
 802                 cpu_boot_status_reg,
 803                 status,
 804                 (status == CPU_BOOT_STATUS_SRAM_AVAIL),
 805                 10000,
 806                 cpu_timeout);
 807
 808         /* Clear message */
 809         WREG32(msg_to_cpu_reg, KMD_MSG_NA);
 810
 811         if (rc) {
 812                 if (status == CPU_BOOT_STATUS_FIT_CORRUPTED)
 813                         dev_err(hdev->dev,
 814                                 "Device reports FIT image is corrupted\n");
 815                 else
 816                         dev_err(hdev->dev,
 817                                 "Failed to load firmware to device, %d\n",
 818                                 status);
 819
 820                 rc = -EIO;
 821                 goto out;
 822         }
 823
 824         /* Clear reset status since we need to read again from app */
 825         prop->hard_reset_done_by_fw = false;
 826
 827         /* Read FW application security bits */
 828         if (prop->fw_security_status_valid) {
 829                 prop->fw_app_security_map =
 830                                 RREG32(cpu_security_boot_status_reg);
 831
 832                 if (prop->fw_app_security_map &
 833                                 CPU_BOOT_DEV_STS0_FW_HARD_RST_EN)
 834                         prop->hard_reset_done_by_fw = true;
 835         }
 836
 837         dev_dbg(hdev->dev, "Firmware application CPU hard-reset is %s\n",
 838                         prop->hard_reset_done_by_fw ? "enabled" : "disabled");
 839
 840         dev_info(hdev->dev, "Successfully loaded firmware to device\n");
 841
 842 out:
 843         fw_read_errors(hdev, boot_err0_reg, cpu_security_boot_status_reg);
 844
 845         return rc;
 846 }