1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
4 * found on some Ricoh RL5c476 II cardbus bridge
6 * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
13 #include <linux/delay.h>
14 #include <linux/highmem.h>
15 #include <linux/module.h>
16 #include <linux/pci.h>
17 #include <linux/ioport.h>
18 #include <linux/iopoll.h>
19 #include <linux/scatterlist.h>
21 #include <pcmcia/cistpl.h>
22 #include <pcmcia/ds.h>
25 #include <linux/mmc/host.h>
26 #include <linux/mmc/mmc.h>
28 #define DRIVER_NAME "sdricoh_cs"
30 static unsigned int switchlocked
;
33 #define SDRICOH_PCI_REGION 0
34 #define SDRICOH_PCI_REGION_SIZE 0x1000
37 #define R104_VERSION 0x104
38 #define R200_CMD 0x200
39 #define R204_CMD_ARG 0x204
40 #define R208_DATAIO 0x208
41 #define R20C_RESP 0x20c
42 #define R21C_STATUS 0x21c
43 #define R2E0_INIT 0x2e0
44 #define R2E4_STATUS_RESP 0x2e4
45 #define R2F0_RESET 0x2f0
46 #define R224_MODE 0x224
47 #define R226_BLOCKSIZE 0x226
48 #define R228_POWER 0x228
49 #define R230_DATA 0x230
51 /* flags for the R21C_STATUS register */
52 #define STATUS_CMD_FINISHED 0x00000001
53 #define STATUS_TRANSFER_FINISHED 0x00000004
54 #define STATUS_CARD_INSERTED 0x00000020
55 #define STATUS_CARD_LOCKED 0x00000080
56 #define STATUS_CMD_TIMEOUT 0x00400000
57 #define STATUS_READY_TO_READ 0x01000000
58 #define STATUS_READY_TO_WRITE 0x02000000
59 #define STATUS_BUSY 0x40000000
62 #define SDRICOH_CMD_TIMEOUT_US 1000000
63 #define SDRICOH_DATA_TIMEOUT_US 1000000
65 /* list of supported pcmcia devices */
66 static const struct pcmcia_device_id pcmcia_ids
[] = {
67 /* vendor and device strings followed by their crc32 hashes */
68 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
70 PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
75 MODULE_DEVICE_TABLE(pcmcia
, pcmcia_ids
);
80 struct mmc_host
*mmc
; /* MMC structure */
81 unsigned char __iomem
*iobase
;
82 struct pci_dev
*pci_dev
;
86 /***************** register i/o helper functions *****************************/
88 static inline unsigned int sdricoh_readl(struct sdricoh_host
*host
,
91 unsigned int value
= readl(host
->iobase
+ reg
);
92 dev_vdbg(host
->dev
, "rl %x 0x%x\n", reg
, value
);
96 static inline void sdricoh_writel(struct sdricoh_host
*host
, unsigned int reg
,
99 writel(value
, host
->iobase
+ reg
);
100 dev_vdbg(host
->dev
, "wl %x 0x%x\n", reg
, value
);
104 static inline unsigned int sdricoh_readw(struct sdricoh_host
*host
,
107 unsigned int value
= readw(host
->iobase
+ reg
);
108 dev_vdbg(host
->dev
, "rb %x 0x%x\n", reg
, value
);
112 static inline void sdricoh_writew(struct sdricoh_host
*host
, unsigned int reg
,
113 unsigned short value
)
115 writew(value
, host
->iobase
+ reg
);
116 dev_vdbg(host
->dev
, "ww %x 0x%x\n", reg
, value
);
119 static inline unsigned int sdricoh_readb(struct sdricoh_host
*host
,
122 unsigned int value
= readb(host
->iobase
+ reg
);
123 dev_vdbg(host
->dev
, "rb %x 0x%x\n", reg
, value
);
127 static bool sdricoh_status_ok(struct sdricoh_host
*host
, unsigned int status
,
130 sdricoh_writel(host
, R2E4_STATUS_RESP
, status
);
131 return status
& wanted
;
134 static int sdricoh_query_status(struct sdricoh_host
*host
, unsigned int wanted
)
137 unsigned int status
= 0;
138 struct device
*dev
= host
->dev
;
140 ret
= read_poll_timeout(sdricoh_readl
, status
,
141 sdricoh_status_ok(host
, status
, wanted
),
142 32, SDRICOH_DATA_TIMEOUT_US
, false,
145 dev_err(dev
, "query_status: timeout waiting for %x\n", wanted
);
149 /* do not do this check in the loop as some commands fail otherwise */
150 if (status
& 0x7F0000) {
151 dev_err(dev
, "waiting for status bit %x failed\n", wanted
);
158 static int sdricoh_mmc_cmd(struct sdricoh_host
*host
, struct mmc_command
*cmd
)
160 unsigned int status
, timeout_us
;
162 unsigned char opcode
= cmd
->opcode
;
164 /* reset status reg? */
165 sdricoh_writel(host
, R21C_STATUS
, 0x18);
167 /* MMC_APP_CMDs need some special handling */
171 } else if (opcode
== MMC_APP_CMD
)
174 /* fill parameters */
175 sdricoh_writel(host
, R204_CMD_ARG
, cmd
->arg
);
176 sdricoh_writel(host
, R200_CMD
, (0x10000 << 8) | opcode
);
178 /* wait for command completion */
182 timeout_us
= cmd
->busy_timeout
? cmd
->busy_timeout
* 1000 :
183 SDRICOH_CMD_TIMEOUT_US
;
185 ret
= read_poll_timeout(sdricoh_readl
, status
,
186 sdricoh_status_ok(host
, status
, STATUS_CMD_FINISHED
),
187 32, timeout_us
, false,
191 * Don't check for timeout status in the loop, as it's not always reset
194 if (ret
|| status
& STATUS_CMD_TIMEOUT
)
200 static int sdricoh_reset(struct sdricoh_host
*host
)
202 dev_dbg(host
->dev
, "reset\n");
203 sdricoh_writel(host
, R2F0_RESET
, 0x10001);
204 sdricoh_writel(host
, R2E0_INIT
, 0x10000);
205 if (sdricoh_readl(host
, R2E0_INIT
) != 0x10000)
207 sdricoh_writel(host
, R2E0_INIT
, 0x10007);
209 sdricoh_writel(host
, R224_MODE
, 0x2000000);
210 sdricoh_writel(host
, R228_POWER
, 0xe0);
213 /* status register ? */
214 sdricoh_writel(host
, R21C_STATUS
, 0x18);
219 static int sdricoh_blockio(struct sdricoh_host
*host
, int read
,
224 /* wait until the data is available */
226 if (sdricoh_query_status(host
, STATUS_READY_TO_READ
))
228 sdricoh_writel(host
, R21C_STATUS
, 0x18);
231 data
= sdricoh_readl(host
, R230_DATA
);
242 if (sdricoh_query_status(host
, STATUS_READY_TO_WRITE
))
244 sdricoh_writel(host
, R21C_STATUS
, 0x18);
251 data
|= (u32
)*buf
<< 24;
255 sdricoh_writel(host
, R230_DATA
, data
);
262 static void sdricoh_request(struct mmc_host
*mmc
, struct mmc_request
*mrq
)
264 struct sdricoh_host
*host
= mmc_priv(mmc
);
265 struct mmc_command
*cmd
= mrq
->cmd
;
266 struct mmc_data
*data
= cmd
->data
;
267 struct device
*dev
= host
->dev
;
270 dev_dbg(dev
, "=============================\n");
271 dev_dbg(dev
, "sdricoh_request opcode=%i\n", cmd
->opcode
);
273 sdricoh_writel(host
, R21C_STATUS
, 0x18);
275 /* read/write commands seem to require this */
277 sdricoh_writew(host
, R226_BLOCKSIZE
, data
->blksz
);
278 sdricoh_writel(host
, R208_DATAIO
, 0);
281 cmd
->error
= sdricoh_mmc_cmd(host
, cmd
);
283 /* read response buffer */
284 if (cmd
->flags
& MMC_RSP_PRESENT
) {
285 if (cmd
->flags
& MMC_RSP_136
) {
286 /* CRC is stripped so we need to do some shifting. */
287 for (i
= 0; i
< 4; i
++) {
290 R20C_RESP
+ (3 - i
) * 4) << 8;
293 sdricoh_readb(host
, R20C_RESP
+
297 cmd
->resp
[0] = sdricoh_readl(host
, R20C_RESP
);
301 if (data
&& cmd
->error
== 0) {
302 dev_dbg(dev
, "transfer: blksz %i blocks %i sg_len %i "
303 "sg length %i\n", data
->blksz
, data
->blocks
,
304 data
->sg_len
, data
->sg
->length
);
306 /* enter data reading mode */
307 sdricoh_writel(host
, R21C_STATUS
, 0x837f031e);
308 for (i
= 0; i
< data
->blocks
; i
++) {
309 size_t len
= data
->blksz
;
313 page
= sg_page(data
->sg
);
315 buf
= kmap(page
) + data
->sg
->offset
+ (len
* i
);
317 sdricoh_blockio(host
,
318 data
->flags
& MMC_DATA_READ
, buf
, len
);
320 flush_dcache_page(page
);
322 dev_err(dev
, "sdricoh_request: cmd %i "
323 "block transfer failed\n", cmd
->opcode
);
327 data
->bytes_xfered
+= len
;
330 sdricoh_writel(host
, R208_DATAIO
, 1);
332 if (sdricoh_query_status(host
, STATUS_TRANSFER_FINISHED
)) {
333 dev_err(dev
, "sdricoh_request: transfer end error\n");
334 cmd
->error
= -EINVAL
;
337 /* FIXME check busy flag */
339 mmc_request_done(mmc
, mrq
);
340 dev_dbg(dev
, "=============================\n");
343 static void sdricoh_set_ios(struct mmc_host
*mmc
, struct mmc_ios
*ios
)
345 struct sdricoh_host
*host
= mmc_priv(mmc
);
346 dev_dbg(host
->dev
, "set_ios\n");
348 if (ios
->power_mode
== MMC_POWER_ON
) {
349 sdricoh_writel(host
, R228_POWER
, 0xc0e0);
351 if (ios
->bus_width
== MMC_BUS_WIDTH_4
) {
352 sdricoh_writel(host
, R224_MODE
, 0x2000300);
353 sdricoh_writel(host
, R228_POWER
, 0x40e0);
355 sdricoh_writel(host
, R224_MODE
, 0x2000340);
358 } else if (ios
->power_mode
== MMC_POWER_UP
) {
359 sdricoh_writel(host
, R224_MODE
, 0x2000320);
360 sdricoh_writel(host
, R228_POWER
, 0xe0);
364 static int sdricoh_get_ro(struct mmc_host
*mmc
)
366 struct sdricoh_host
*host
= mmc_priv(mmc
);
369 status
= sdricoh_readl(host
, R21C_STATUS
);
370 sdricoh_writel(host
, R2E4_STATUS_RESP
, status
);
372 /* some notebooks seem to have the locked flag switched */
374 return !(status
& STATUS_CARD_LOCKED
);
376 return (status
& STATUS_CARD_LOCKED
);
379 static const struct mmc_host_ops sdricoh_ops
= {
380 .request
= sdricoh_request
,
381 .set_ios
= sdricoh_set_ios
,
382 .get_ro
= sdricoh_get_ro
,
385 /* initialize the control and register it to the mmc framework */
386 static int sdricoh_init_mmc(struct pci_dev
*pci_dev
,
387 struct pcmcia_device
*pcmcia_dev
)
390 void __iomem
*iobase
;
391 struct mmc_host
*mmc
;
392 struct sdricoh_host
*host
;
393 struct device
*dev
= &pcmcia_dev
->dev
;
395 if (pci_resource_len(pci_dev
, SDRICOH_PCI_REGION
) !=
396 SDRICOH_PCI_REGION_SIZE
) {
397 dev_dbg(dev
, "unexpected pci resource len\n");
401 pci_iomap(pci_dev
, SDRICOH_PCI_REGION
, SDRICOH_PCI_REGION_SIZE
);
403 dev_err(dev
, "unable to map iobase\n");
407 if (readl(iobase
+ R104_VERSION
) != 0x4000) {
408 dev_dbg(dev
, "no supported mmc controller found\n");
412 /* allocate privdata */
413 mmc
= pcmcia_dev
->priv
=
414 mmc_alloc_host(sizeof(struct sdricoh_host
), &pcmcia_dev
->dev
);
416 dev_err(dev
, "mmc_alloc_host failed\n");
420 host
= mmc_priv(mmc
);
422 host
->iobase
= iobase
;
424 host
->pci_dev
= pci_dev
;
426 mmc
->ops
= &sdricoh_ops
;
428 /* FIXME: frequency and voltage handling is done by the controller
431 mmc
->f_max
= 24000000;
432 mmc
->ocr_avail
= MMC_VDD_32_33
| MMC_VDD_33_34
;
433 mmc
->caps
|= MMC_CAP_4_BIT_DATA
;
435 mmc
->max_seg_size
= 1024 * 512;
436 mmc
->max_blk_size
= 512;
438 /* reset the controller */
439 if (sdricoh_reset(host
)) {
440 dev_dbg(dev
, "could not reset\n");
445 result
= mmc_add_host(mmc
);
448 dev_dbg(dev
, "mmc host registered\n");
454 pci_iounmap(pci_dev
, iobase
);
458 /* search for supported mmc controllers */
459 static int sdricoh_pcmcia_probe(struct pcmcia_device
*pcmcia_dev
)
461 struct pci_dev
*pci_dev
= NULL
;
463 dev_info(&pcmcia_dev
->dev
, "Searching MMC controller for pcmcia device"
464 " %s %s ...\n", pcmcia_dev
->prod_id
[0], pcmcia_dev
->prod_id
[1]);
466 /* search pci cardbus bridge that contains the mmc controller */
467 /* the io region is already claimed by yenta_socket... */
469 pci_get_device(PCI_VENDOR_ID_RICOH
, PCI_DEVICE_ID_RICOH_RL5C476
,
471 /* try to init the device */
472 if (!sdricoh_init_mmc(pci_dev
, pcmcia_dev
)) {
473 dev_info(&pcmcia_dev
->dev
, "MMC controller found\n");
478 dev_err(&pcmcia_dev
->dev
, "No MMC controller was found.\n");
482 static void sdricoh_pcmcia_detach(struct pcmcia_device
*link
)
484 struct mmc_host
*mmc
= link
->priv
;
486 dev_dbg(&link
->dev
, "detach\n");
488 /* remove mmc host */
490 struct sdricoh_host
*host
= mmc_priv(mmc
);
491 mmc_remove_host(mmc
);
492 pci_iounmap(host
->pci_dev
, host
->iobase
);
493 pci_dev_put(host
->pci_dev
);
496 pcmcia_disable_device(link
);
501 static int sdricoh_pcmcia_suspend(struct pcmcia_device
*link
)
503 dev_dbg(&link
->dev
, "suspend\n");
507 static int sdricoh_pcmcia_resume(struct pcmcia_device
*link
)
509 struct mmc_host
*mmc
= link
->priv
;
510 dev_dbg(&link
->dev
, "resume\n");
511 sdricoh_reset(mmc_priv(mmc
));
515 #define sdricoh_pcmcia_suspend NULL
516 #define sdricoh_pcmcia_resume NULL
519 static struct pcmcia_driver sdricoh_driver
= {
521 .probe
= sdricoh_pcmcia_probe
,
522 .remove
= sdricoh_pcmcia_detach
,
523 .id_table
= pcmcia_ids
,
524 .suspend
= sdricoh_pcmcia_suspend
,
525 .resume
= sdricoh_pcmcia_resume
,
527 module_pcmcia_driver(sdricoh_driver
);
529 module_param(switchlocked
, uint
, 0444);
531 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
532 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
533 MODULE_LICENSE("GPL");
535 MODULE_PARM_DESC(switchlocked
, "Switch the cards locked status."
536 "Use this when unlocked cards are shown readonly (default 0)");