1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "RAM/ROM/Flash chip drivers"
6 tristate "Detect flash chips by Common Flash Interface (CFI) probe"
10 The Common Flash Interface specification was developed by Intel,
11 AMD and other flash manufactures that provides a universal method
12 for probing the capabilities of flash devices. If you wish to
13 support any device that is CFI-compliant, you need to enable this
14 option. Visit <https://www.amd.com/products/nvd/overview/cfi.html>
15 for more information on CFI.
18 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
22 This option enables JEDEC-style probing of flash chips which are not
23 compatible with the Common Flash Interface, but will use the common
24 CFI-targeted flash drivers for any chips which are identified which
25 are in fact compatible in all but the probe method. This actually
26 covers most AMD/Fujitsu-compatible chips and also non-CFI
32 config MTD_CFI_ADV_OPTIONS
33 bool "Flash chip driver advanced configuration options"
34 depends on MTD_GEN_PROBE
36 If you need to specify a specific endianness for access to flash
37 chips, or if you wish to reduce the size of the kernel by including
38 support for only specific arrangements of flash chips, say 'Y'. This
39 option does not directly affect the code, but will enable other
40 configuration options which allow you to do so.
45 prompt "Flash cmd/query data swapping"
46 depends on MTD_CFI_ADV_OPTIONS
47 default MTD_CFI_NOSWAP
49 This option defines the way in which the CPU attempts to arrange
50 data bits when writing the 'magic' commands to the chips. Saying
51 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
52 enabled, means that the CPU will not do any swapping; the chips
53 are expected to be wired to the CPU in 'host-endian' form.
54 Specific arrangements are possible with the BIG_ENDIAN_BYTE and
55 LITTLE_ENDIAN_BYTE, if the bytes are reversed.
60 config MTD_CFI_BE_BYTE_SWAP
61 bool "BIG_ENDIAN_BYTE"
63 config MTD_CFI_LE_BYTE_SWAP
64 bool "LITTLE_ENDIAN_BYTE"
68 config MTD_CFI_GEOMETRY
69 bool "Specific CFI Flash geometry selection"
70 depends on MTD_CFI_ADV_OPTIONS
71 select MTD_MAP_BANK_WIDTH_1 if !(MTD_MAP_BANK_WIDTH_2 || \
72 MTD_MAP_BANK_WIDTH_4 || MTD_MAP_BANK_WIDTH_8 || \
73 MTD_MAP_BANK_WIDTH_16 || MTD_MAP_BANK_WIDTH_32)
74 select MTD_CFI_I1 if !(MTD_CFI_I2 || MTD_CFI_I4 || MTD_CFI_I8)
76 This option does not affect the code directly, but will enable
77 some other configuration options which would allow you to reduce
78 the size of the kernel by including support for only certain
79 arrangements of CFI chips. If unsure, say 'N' and all options
80 which are supported by the current code will be enabled.
82 config MTD_MAP_BANK_WIDTH_1
83 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
86 If you wish to support CFI devices on a physical bus which is
89 config MTD_MAP_BANK_WIDTH_2
90 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
93 If you wish to support CFI devices on a physical bus which is
94 16 bits wide, say 'Y'.
96 config MTD_MAP_BANK_WIDTH_4
97 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
100 If you wish to support CFI devices on a physical bus which is
101 32 bits wide, say 'Y'.
103 config MTD_MAP_BANK_WIDTH_8
104 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
107 If you wish to support CFI devices on a physical bus which is
108 64 bits wide, say 'Y'.
110 config MTD_MAP_BANK_WIDTH_16
111 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
114 If you wish to support CFI devices on a physical bus which is
115 128 bits wide, say 'Y'.
117 config MTD_MAP_BANK_WIDTH_32
118 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
119 select MTD_COMPLEX_MAPPINGS if HAS_IOMEM
122 If you wish to support CFI devices on a physical bus which is
123 256 bits wide, say 'Y'.
126 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
129 If your flash chips are not interleaved - i.e. you only have one
130 flash chip addressed by each bus cycle, then say 'Y'.
133 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
136 If your flash chips are interleaved in pairs - i.e. you have two
137 flash chips addressed by each bus cycle, then say 'Y'.
140 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
143 If your flash chips are interleaved in fours - i.e. you have four
144 flash chips addressed by each bus cycle, then say 'Y'.
147 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
150 If your flash chips are interleaved in eights - i.e. you have eight
151 flash chips addressed by each bus cycle, then say 'Y'.
154 bool "Protection Registers aka one-time programmable (OTP) bits"
155 depends on MTD_CFI_ADV_OPTIONS
158 This enables support for reading, writing and locking so called
159 "Protection Registers" present on some flash chips.
160 A subset of them are pre-programmed at the factory with a
161 unique set of values. The rest is user-programmable.
163 The user-programmable Protection Registers contain one-time
164 programmable (OTP) bits; when programmed, register bits cannot be
165 erased. Each Protection Register can be accessed multiple times to
166 program individual bits, as long as the register remains unlocked.
168 Each Protection Register has an associated Lock Register bit. When a
169 Lock Register bit is programmed, the associated Protection Register
170 can only be read; it can no longer be programmed. Additionally,
171 because the Lock Register bits themselves are OTP, when programmed,
172 Lock Register bits cannot be erased. Therefore, when a Protection
173 Register is locked, it cannot be unlocked.
175 This feature should therefore be used with extreme care. Any mistake
176 in the programming of OTP bits will waste them.
178 config MTD_CFI_INTELEXT
179 tristate "Support for CFI command set 0001 (Intel/Sharp chips)"
180 depends on MTD_GEN_PROBE
183 The Common Flash Interface defines a number of different command
184 sets which a CFI-compliant chip may claim to implement. This code
185 provides support for command set 0001, used on Intel StrataFlash
188 config MTD_CFI_AMDSTD
189 tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"
190 depends on MTD_GEN_PROBE
193 The Common Flash Interface defines a number of different command
194 sets which a CFI-compliant chip may claim to implement. This code
195 provides support for command set 0002, used on chips including
199 tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"
200 depends on MTD_GEN_PROBE
203 The Common Flash Interface defines a number of different command
204 sets which a CFI-compliant chip may claim to implement. This code
205 provides support for command set 0020.
211 tristate "Support for RAM chips in bus mapping"
213 This option enables basic support for RAM chips accessed through
214 a bus mapping driver.
217 tristate "Support for ROM chips in bus mapping"
219 This option enables basic support for ROM chips accessed through
220 a bus mapping driver.
223 tristate "Support for absent chips in bus mapping"
225 This option enables support for a dummy probing driver used to
226 allocated placeholder MTD devices on systems that have socketed
227 or removable media. Use of this driver as a fallback chip probe
228 preserves the expected registration order of MTD device nodes on
229 the system regardless of media presence. Device nodes created
230 with this driver will return -ENODEV upon access.
233 bool "XIP aware MTD support"
234 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
235 default y if XIP_KERNEL
237 This allows MTD support to work with flash memory which is also
238 used for XIP purposes. If you're not sure what this is all about