drivers/net/wireless/intersil/prism54/islpci_dev.h

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  *  Copyright (C) 2002 Intersil Americas Inc.
   4  *  Copyright (C) 2003 Herbert Valerio Riedel <hvr@gnu.org>
   5  *  Copyright (C) 2003 Luis R. Rodriguez <mcgrof@ruslug.rutgers.edu>
   6  *  Copyright (C) 2003 Aurelien Alleaume <slts@free.fr>
   7  */
   8
   9 #ifndef _ISLPCI_DEV_H
  10 #define _ISLPCI_DEV_H
  11
  12 #include <linux/irqreturn.h>
  13 #include <linux/netdevice.h>
  14 #include <linux/wireless.h>
  15 #include <net/iw_handler.h>
  16 #include <linux/list.h>
  17 #include <linux/mutex.h>
  18
  19 #include "isl_38xx.h"
  20 #include "isl_oid.h"
  21 #include "islpci_mgt.h"
  22
  23 /* some states might not be superflous and may be removed when
  24    design is finalized (hvr) */
  25 typedef enum {
  26         PRV_STATE_OFF = 0,      /* this means hw_unavailable is != 0 */
  27         PRV_STATE_PREBOOT,      /* we are in a pre-boot state (empty RAM) */
  28         PRV_STATE_BOOT,         /* boot state (fw upload, run fw) */
  29         PRV_STATE_POSTBOOT,     /* after boot state, need reset now */
  30         PRV_STATE_PREINIT,      /* pre-init state */
  31         PRV_STATE_INIT,         /* init state (restore MIB backup to device) */
  32         PRV_STATE_READY,        /* driver&device are in operational state */
  33         PRV_STATE_SLEEP         /* device in sleep mode */
  34 } islpci_state_t;
  35
  36 /* ACL using MAC address */
  37 struct mac_entry {
  38    struct list_head _list;
  39    char addr[ETH_ALEN];
  40 };
  41
  42 struct islpci_acl {
  43    enum { MAC_POLICY_OPEN=0, MAC_POLICY_ACCEPT=1, MAC_POLICY_REJECT=2 } policy;
  44    struct list_head mac_list;  /* a list of mac_entry */
  45    int size;   /* size of queue */
  46    struct mutex lock;   /* accessed in ioctls and trap_work */
  47 };
  48
  49 struct islpci_membuf {
  50         int size;                   /* size of memory */
  51         void *mem;                  /* address of memory as seen by CPU */
  52         dma_addr_t pci_addr;        /* address of memory as seen by device */
  53 };
  54
  55 #define MAX_BSS_WPA_IE_COUNT 64
  56 #define MAX_WPA_IE_LEN 64
  57 struct islpci_bss_wpa_ie {
  58         struct list_head list;
  59         unsigned long last_update;
  60         u8 bssid[ETH_ALEN];
  61         u8 wpa_ie[MAX_WPA_IE_LEN];
  62         size_t wpa_ie_len;
  63
  64 };
  65
  66 typedef struct {
  67         spinlock_t slock;       /* generic spinlock; */
  68
  69         u32 priv_oid;
  70
  71         /* our mib cache */
  72         u32 iw_mode;
  73         struct rw_semaphore mib_sem;
  74         void **mib;
  75         char nickname[IW_ESSID_MAX_SIZE+1];
  76
  77         /* Take care of the wireless stats */
  78         struct work_struct stats_work;
  79         struct mutex stats_lock;
  80         /* remember when we last updated the stats */
  81         unsigned long stats_timestamp;
  82         /* The first is accessed under semaphore locking.
  83          * The second is the clean one we return to iwconfig.
  84          */
  85         struct iw_statistics local_iwstatistics;
  86         struct iw_statistics iwstatistics;
  87
  88         struct iw_spy_data spy_data; /* iwspy support */
  89
  90         struct iw_public_data wireless_data;
  91
  92         int monitor_type; /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_PRISM */
  93
  94         struct islpci_acl acl;
  95
  96         /* PCI bus allocation & configuration members */
  97         struct pci_dev *pdev;   /* PCI structure information */
  98         char firmware[33];
  99
 100         void __iomem *device_base;      /* ioremapped device base address */
 101
 102         /* consistent DMA region */
 103         void *driver_mem_address;       /* base DMA address */
 104         dma_addr_t device_host_address; /* base DMA address (bus address) */
 105         dma_addr_t device_psm_buffer;   /* host memory for PSM buffering (bus address) */
 106
 107         /* our network_device structure  */
 108         struct net_device *ndev;
 109
 110         /* device queue interface members */
 111         struct isl38xx_cb *control_block;       /* device control block
 112                                                            (== driver_mem_address!) */
 113
 114         /* Each queue has three indexes:
 115          *   free/index_mgmt/data_rx/tx (called index, see below),
 116          *   driver_curr_frag, and device_curr_frag (in the control block)
 117          * All indexes are ever-increasing, but interpreted modulo the
 118          * device queue size when used.
 119          *   index <= device_curr_frag <= driver_curr_frag  at all times
 120          * For rx queues, [index, device_curr_frag) contains fragments
 121          * that the interrupt processing needs to handle (owned by driver).
 122          * [device_curr_frag, driver_curr_frag) is the free space in the
 123          * rx queue, waiting for data (owned by device).  The driver
 124          * increments driver_curr_frag to indicate to the device that more
 125          * buffers are available.
 126          * If device_curr_frag == driver_curr_frag, no more rx buffers are
 127          * available, and the rx DMA engine of the device is halted.
 128          * For tx queues, [index, device_curr_frag) contains fragments
 129          * where tx is done; they need to be freed (owned by driver).
 130          * [device_curr_frag, driver_curr_frag) contains the frames
 131          * that are being transferred (owned by device).  The driver
 132          * increments driver_curr_frag to indicate that more tx work
 133          * needs to be done.
 134          */
 135         u32 index_mgmt_rx;              /* real index mgmt rx queue */
 136         u32 index_mgmt_tx;              /* read index mgmt tx queue */
 137         u32 free_data_rx;       /* free pointer data rx queue */
 138         u32 free_data_tx;       /* free pointer data tx queue */
 139         u32 data_low_tx_full;   /* full detected flag */
 140
 141         /* frame memory buffers for the device queues */
 142         struct islpci_membuf mgmt_tx[ISL38XX_CB_MGMT_QSIZE];
 143         struct islpci_membuf mgmt_rx[ISL38XX_CB_MGMT_QSIZE];
 144         struct sk_buff *data_low_tx[ISL38XX_CB_TX_QSIZE];
 145         struct sk_buff *data_low_rx[ISL38XX_CB_RX_QSIZE];
 146         dma_addr_t pci_map_tx_address[ISL38XX_CB_TX_QSIZE];
 147         dma_addr_t pci_map_rx_address[ISL38XX_CB_RX_QSIZE];
 148
 149         /* wait for a reset interrupt */
 150         wait_queue_head_t reset_done;
 151
 152         /* used by islpci_mgt_transaction */
 153         struct mutex mgmt_lock; /* serialize access to mailbox and wqueue */
 154         struct islpci_mgmtframe *mgmt_received;   /* mbox for incoming frame */
 155         wait_queue_head_t mgmt_wqueue;            /* waitqueue for mbox */
 156
 157         /* state machine */
 158         islpci_state_t state;
 159         int state_off;          /* enumeration of off-state, if 0 then
 160                                  * we're not in any off-state */
 161
 162         /* WPA stuff */
 163         int wpa; /* WPA mode enabled */
 164         struct list_head bss_wpa_list;
 165         int num_bss_wpa;
 166         struct mutex wpa_lock;
 167         u8 wpa_ie[MAX_WPA_IE_LEN];
 168         size_t wpa_ie_len;
 169
 170         struct work_struct reset_task;
 171         int reset_task_pending;
 172 } islpci_private;
 173
 174 static inline islpci_state_t
 175 islpci_get_state(islpci_private *priv)
 176 {
 177         /* lock */
 178         return priv->state;
 179         /* unlock */
 180 }
 181
 182 islpci_state_t islpci_set_state(islpci_private *priv, islpci_state_t new_state);
 183
 184 #define ISLPCI_TX_TIMEOUT               (2*HZ)
 185
 186 irqreturn_t islpci_interrupt(int, void *);
 187
 188 int prism54_post_setup(islpci_private *, int);
 189 int islpci_reset(islpci_private *, int);
 190
 191 static inline void
 192 islpci_trigger(islpci_private *priv)
 193 {
 194         isl38xx_trigger_device(islpci_get_state(priv) == PRV_STATE_SLEEP,
 195                                priv->device_base);
 196 }
 197
 198 int islpci_free_memory(islpci_private *);
 199 struct net_device *islpci_setup(struct pci_dev *);
 200
 201 #define DRV_NAME        "prism54"
 202 #define DRV_VERSION     "1.2"
 203
 204 #endif                          /* _ISLPCI_DEV_H */