1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
5 #include <linux/iopoll.h>
12 #define RTW_EFUSE_BANK_WIFI 0x0
14 static void switch_efuse_bank(struct rtw_dev
*rtwdev
)
16 rtw_write32_mask(rtwdev
, REG_LDO_EFUSE_CTRL
, BIT_MASK_EFUSE_BANK_SEL
,
20 #define invalid_efuse_header(hdr1, hdr2) \
21 ((hdr1) == 0xff || (((hdr1) & 0x1f) == 0xf && (hdr2) == 0xff))
22 #define invalid_efuse_content(word_en, i) \
23 (((word_en) & BIT(i)) != 0x0)
24 #define get_efuse_blk_idx_2_byte(hdr1, hdr2) \
25 ((((hdr2) & 0xf0) >> 1) | (((hdr1) >> 5) & 0x07))
26 #define get_efuse_blk_idx_1_byte(hdr1) \
27 (((hdr1) & 0xf0) >> 4)
28 #define block_idx_to_logical_idx(blk_idx, i) \
29 (((blk_idx) << 3) + ((i) << 1))
31 /* efuse header format
33 * | 7 5 4 0 | 7 4 3 0 | 15 8 7 0 |
34 * block[2:0] 0 1111 block[6:3] word_en[3:0] byte0 byte1
35 * | header 1 (optional) | header 2 | word N |
37 * word_en: 4 bits each word. 0 -> write; 1 -> not write
38 * N: 1~4, depends on word_en
40 static int rtw_dump_logical_efuse_map(struct rtw_dev
*rtwdev
, u8
*phy_map
,
43 u32 physical_size
= rtwdev
->efuse
.physical_size
;
44 u32 protect_size
= rtwdev
->efuse
.protect_size
;
45 u32 logical_size
= rtwdev
->efuse
.logical_size
;
52 for (phy_idx
= 0; phy_idx
< physical_size
- protect_size
;) {
53 hdr1
= phy_map
[phy_idx
];
54 hdr2
= phy_map
[phy_idx
+ 1];
55 if (invalid_efuse_header(hdr1
, hdr2
))
58 if ((hdr1
& 0x1f) == 0xf) {
59 /* 2-byte header format */
60 blk_idx
= get_efuse_blk_idx_2_byte(hdr1
, hdr2
);
64 /* 1-byte header format */
65 blk_idx
= get_efuse_blk_idx_1_byte(hdr1
);
70 for (i
= 0; i
< 4; i
++) {
71 if (invalid_efuse_content(word_en
, i
))
74 log_idx
= block_idx_to_logical_idx(blk_idx
, i
);
75 if (phy_idx
+ 1 > physical_size
- protect_size
||
76 log_idx
+ 1 > logical_size
)
79 log_map
[log_idx
] = phy_map
[phy_idx
];
80 log_map
[log_idx
+ 1] = phy_map
[phy_idx
+ 1];
87 static int rtw_dump_physical_efuse_map(struct rtw_dev
*rtwdev
, u8
*map
)
89 struct rtw_chip_info
*chip
= rtwdev
->chip
;
90 u32 size
= rtwdev
->efuse
.physical_size
;
95 rtw_chip_efuse_grant_on(rtwdev
);
97 switch_efuse_bank(rtwdev
);
99 /* disable 2.5V LDO */
100 chip
->ops
->cfg_ldo25(rtwdev
, false);
102 efuse_ctl
= rtw_read32(rtwdev
, REG_EFUSE_CTRL
);
104 for (addr
= 0; addr
< size
; addr
++) {
105 efuse_ctl
&= ~(BIT_MASK_EF_DATA
| BITS_EF_ADDR
);
106 efuse_ctl
|= (addr
& BIT_MASK_EF_ADDR
) << BIT_SHIFT_EF_ADDR
;
107 rtw_write32(rtwdev
, REG_EFUSE_CTRL
, efuse_ctl
& (~BIT_EF_FLAG
));
112 efuse_ctl
= rtw_read32(rtwdev
, REG_EFUSE_CTRL
);
115 } while (!(efuse_ctl
& BIT_EF_FLAG
));
117 *(map
+ addr
) = (u8
)(efuse_ctl
& BIT_MASK_EF_DATA
);
120 rtw_chip_efuse_grant_off(rtwdev
);
125 int rtw_read8_physical_efuse(struct rtw_dev
*rtwdev
, u16 addr
, u8
*data
)
130 rtw_write32_mask(rtwdev
, REG_EFUSE_CTRL
, 0x3ff00, addr
);
131 rtw_write32_clr(rtwdev
, REG_EFUSE_CTRL
, BIT_EF_FLAG
);
133 ret
= read_poll_timeout(rtw_read32
, efuse_ctl
, efuse_ctl
& BIT_EF_FLAG
,
134 1000, 100000, false, rtwdev
, REG_EFUSE_CTRL
);
136 *data
= EFUSE_READ_FAIL
;
140 *data
= rtw_read8(rtwdev
, REG_EFUSE_CTRL
);
144 EXPORT_SYMBOL(rtw_read8_physical_efuse
);
146 int rtw_parse_efuse_map(struct rtw_dev
*rtwdev
)
148 struct rtw_chip_info
*chip
= rtwdev
->chip
;
149 struct rtw_efuse
*efuse
= &rtwdev
->efuse
;
150 u32 phy_size
= efuse
->physical_size
;
151 u32 log_size
= efuse
->logical_size
;
156 phy_map
= kmalloc(phy_size
, GFP_KERNEL
);
157 log_map
= kmalloc(log_size
, GFP_KERNEL
);
158 if (!phy_map
|| !log_map
) {
163 ret
= rtw_dump_physical_efuse_map(rtwdev
, phy_map
);
165 rtw_err(rtwdev
, "failed to dump efuse physical map\n");
169 memset(log_map
, 0xff, log_size
);
170 ret
= rtw_dump_logical_efuse_map(rtwdev
, phy_map
, log_map
);
172 rtw_err(rtwdev
, "failed to dump efuse logical map\n");
176 ret
= chip
->ops
->read_efuse(rtwdev
, log_map
);
178 rtw_err(rtwdev
, "failed to read efuse map\n");