1 // SPDX-License-Identifier: GPL-2.0+
3 * i.MX8 OCOTP fusebox driver
7 * Peng Fan <peng.fan@nxp.com>
10 #include <linux/arm-smccc.h>
11 #include <linux/firmware/imx/sci.h>
12 #include <linux/module.h>
13 #include <linux/nvmem-provider.h>
14 #include <linux/of_device.h>
15 #include <linux/platform_device.h>
16 #include <linux/slab.h>
18 #define IMX_SIP_OTP_WRITE 0xc200000B
25 #define ECC_REGION BIT(0)
26 #define HOLE_REGION BIT(1)
34 struct ocotp_devtype_data
{
38 struct ocotp_region region
[];
43 const struct ocotp_devtype_data
*data
;
44 struct imx_sc_ipc
*nvmem_ipc
;
47 struct imx_sc_msg_misc_fuse_read
{
48 struct imx_sc_rpc_msg hdr
;
52 static DEFINE_MUTEX(scu_ocotp_mutex
);
54 static struct ocotp_devtype_data imx8qxp_data
= {
59 {0x10, 0x10f, ECC_REGION
},
60 {0x110, 0x21F, HOLE_REGION
},
61 {0x220, 0x31F, ECC_REGION
},
65 static struct ocotp_devtype_data imx8qm_data
= {
70 {0x10, 0x10f, ECC_REGION
},
71 {0x1a0, 0x1ff, ECC_REGION
},
75 static bool in_hole(void *context
, u32 index
)
77 struct ocotp_priv
*priv
= context
;
78 const struct ocotp_devtype_data
*data
= priv
->data
;
81 for (i
= 0; i
< data
->num_region
; i
++) {
82 if (data
->region
[i
].flag
& HOLE_REGION
) {
83 if ((index
>= data
->region
[i
].start
) &&
84 (index
<= data
->region
[i
].end
))
92 static bool in_ecc(void *context
, u32 index
)
94 struct ocotp_priv
*priv
= context
;
95 const struct ocotp_devtype_data
*data
= priv
->data
;
98 for (i
= 0; i
< data
->num_region
; i
++) {
99 if (data
->region
[i
].flag
& ECC_REGION
) {
100 if ((index
>= data
->region
[i
].start
) &&
101 (index
<= data
->region
[i
].end
))
109 static int imx_sc_misc_otp_fuse_read(struct imx_sc_ipc
*ipc
, u32 word
,
112 struct imx_sc_msg_misc_fuse_read msg
;
113 struct imx_sc_rpc_msg
*hdr
= &msg
.hdr
;
116 hdr
->ver
= IMX_SC_RPC_VERSION
;
117 hdr
->svc
= IMX_SC_RPC_SVC_MISC
;
118 hdr
->func
= IMX_SC_MISC_FUNC_OTP_FUSE_READ
;
123 ret
= imx_scu_call_rpc(ipc
, &msg
, true);
132 static int imx_scu_ocotp_read(void *context
, unsigned int offset
,
133 void *val
, size_t bytes
)
135 struct ocotp_priv
*priv
= context
;
136 u32 count
, index
, num_bytes
;
142 num_bytes
= round_up(bytes
, 4);
143 count
= num_bytes
>> 2;
145 if (count
> (priv
->data
->nregs
- index
))
146 count
= priv
->data
->nregs
- index
;
148 p
= kzalloc(num_bytes
, GFP_KERNEL
);
152 mutex_lock(&scu_ocotp_mutex
);
156 for (i
= index
; i
< (index
+ count
); i
++) {
157 if (in_hole(context
, i
)) {
162 ret
= imx_sc_misc_otp_fuse_read(priv
->nvmem_ipc
, i
, buf
);
164 mutex_unlock(&scu_ocotp_mutex
);
171 memcpy(val
, (u8
*)p
, bytes
);
173 mutex_unlock(&scu_ocotp_mutex
);
180 static int imx_scu_ocotp_write(void *context
, unsigned int offset
,
181 void *val
, size_t bytes
)
183 struct ocotp_priv
*priv
= context
;
184 struct arm_smccc_res res
;
190 /* allow only writing one complete OTP word at a time */
196 if (in_hole(context
, index
))
199 if (in_ecc(context
, index
)) {
200 pr_warn("ECC region, only program once\n");
201 mutex_lock(&scu_ocotp_mutex
);
202 ret
= imx_sc_misc_otp_fuse_read(priv
->nvmem_ipc
, index
, &tmp
);
203 mutex_unlock(&scu_ocotp_mutex
);
207 pr_warn("ECC region, already has value: %x\n", tmp
);
212 mutex_lock(&scu_ocotp_mutex
);
214 arm_smccc_smc(IMX_SIP_OTP_WRITE
, index
, *buf
, 0, 0, 0, 0, 0, &res
);
216 mutex_unlock(&scu_ocotp_mutex
);
221 static struct nvmem_config imx_scu_ocotp_nvmem_config
= {
222 .name
= "imx-scu-ocotp",
226 .owner
= THIS_MODULE
,
227 .reg_read
= imx_scu_ocotp_read
,
228 .reg_write
= imx_scu_ocotp_write
,
231 static const struct of_device_id imx_scu_ocotp_dt_ids
[] = {
232 { .compatible
= "fsl,imx8qxp-scu-ocotp", (void *)&imx8qxp_data
},
233 { .compatible
= "fsl,imx8qm-scu-ocotp", (void *)&imx8qm_data
},
236 MODULE_DEVICE_TABLE(of
, imx_scu_ocotp_dt_ids
);
238 static int imx_scu_ocotp_probe(struct platform_device
*pdev
)
240 struct device
*dev
= &pdev
->dev
;
241 struct ocotp_priv
*priv
;
242 struct nvmem_device
*nvmem
;
245 priv
= devm_kzalloc(dev
, sizeof(*priv
), GFP_KERNEL
);
249 ret
= imx_scu_get_handle(&priv
->nvmem_ipc
);
253 priv
->data
= of_device_get_match_data(dev
);
255 imx_scu_ocotp_nvmem_config
.size
= 4 * priv
->data
->nregs
;
256 imx_scu_ocotp_nvmem_config
.dev
= dev
;
257 imx_scu_ocotp_nvmem_config
.priv
= priv
;
258 nvmem
= devm_nvmem_register(dev
, &imx_scu_ocotp_nvmem_config
);
260 return PTR_ERR_OR_ZERO(nvmem
);
263 static struct platform_driver imx_scu_ocotp_driver
= {
264 .probe
= imx_scu_ocotp_probe
,
266 .name
= "imx_scu_ocotp",
267 .of_match_table
= imx_scu_ocotp_dt_ids
,
270 module_platform_driver(imx_scu_ocotp_driver
);
272 MODULE_AUTHOR("Peng Fan <peng.fan@nxp.com>");
273 MODULE_DESCRIPTION("i.MX8 SCU OCOTP fuse box driver");
274 MODULE_LICENSE("GPL v2");