1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Low-level parallel-support for PC-style hardware integrated in the
4 * LASI-Controller (on GSC-Bus) for HP-PARISC Workstations
6 * (C) 1999-2001 by Helge Deller <deller@gmx.de>
8 * based on parport_pc.c by
9 * Grant Guenther <grant@torque.net>
10 * Phil Blundell <philb@gnu.org>
11 * Tim Waugh <tim@cyberelk.demon.co.uk>
12 * Jose Renau <renau@acm.org>
17 #undef DEBUG /* undef for production */
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/interrupt.h>
24 #include <linux/ioport.h>
25 #include <linux/kernel.h>
26 #include <linux/slab.h>
27 #include <linux/pci.h>
28 #include <linux/sysctl.h>
32 #include <linux/uaccess.h>
33 #include <asm/superio.h>
35 #include <linux/parport.h>
37 #include <asm/parisc-device.h>
38 #include <asm/hardware.h>
39 #include "parport_gsc.h"
42 MODULE_AUTHOR("Helge Deller <deller@gmx.de>");
43 MODULE_DESCRIPTION("HP-PARISC PC-style parallel port driver");
44 MODULE_SUPPORTED_DEVICE("integrated PC-style parallel port");
45 MODULE_LICENSE("GPL");
49 * Clear TIMEOUT BIT in EPP MODE
51 * This is also used in SPP detection.
53 static int clear_epp_timeout(struct parport
*pb
)
57 if (!(parport_gsc_read_status(pb
) & 0x01))
60 /* To clear timeout some chips require double read */
61 parport_gsc_read_status(pb
);
62 r
= parport_gsc_read_status(pb
);
63 parport_writeb (r
| 0x01, STATUS (pb
)); /* Some reset by writing 1 */
64 parport_writeb (r
& 0xfe, STATUS (pb
)); /* Others by writing 0 */
65 r
= parport_gsc_read_status(pb
);
73 * Most of these aren't static because they may be used by the
74 * parport_xxx_yyy macros. extern __inline__ versions of several
75 * of these are in parport_gsc.h.
78 void parport_gsc_init_state(struct pardevice
*dev
, struct parport_state
*s
)
80 s
->u
.pc
.ctr
= 0xc | (dev
->irq_func
? 0x10 : 0x0);
83 void parport_gsc_save_state(struct parport
*p
, struct parport_state
*s
)
85 s
->u
.pc
.ctr
= parport_readb (CONTROL (p
));
88 void parport_gsc_restore_state(struct parport
*p
, struct parport_state
*s
)
90 parport_writeb (s
->u
.pc
.ctr
, CONTROL (p
));
93 struct parport_operations parport_gsc_ops
=
95 .write_data
= parport_gsc_write_data
,
96 .read_data
= parport_gsc_read_data
,
98 .write_control
= parport_gsc_write_control
,
99 .read_control
= parport_gsc_read_control
,
100 .frob_control
= parport_gsc_frob_control
,
102 .read_status
= parport_gsc_read_status
,
104 .enable_irq
= parport_gsc_enable_irq
,
105 .disable_irq
= parport_gsc_disable_irq
,
107 .data_forward
= parport_gsc_data_forward
,
108 .data_reverse
= parport_gsc_data_reverse
,
110 .init_state
= parport_gsc_init_state
,
111 .save_state
= parport_gsc_save_state
,
112 .restore_state
= parport_gsc_restore_state
,
114 .epp_write_data
= parport_ieee1284_epp_write_data
,
115 .epp_read_data
= parport_ieee1284_epp_read_data
,
116 .epp_write_addr
= parport_ieee1284_epp_write_addr
,
117 .epp_read_addr
= parport_ieee1284_epp_read_addr
,
119 .ecp_write_data
= parport_ieee1284_ecp_write_data
,
120 .ecp_read_data
= parport_ieee1284_ecp_read_data
,
121 .ecp_write_addr
= parport_ieee1284_ecp_write_addr
,
123 .compat_write_data
= parport_ieee1284_write_compat
,
124 .nibble_read_data
= parport_ieee1284_read_nibble
,
125 .byte_read_data
= parport_ieee1284_read_byte
,
127 .owner
= THIS_MODULE
,
130 /* --- Mode detection ------------------------------------- */
133 * Checks for port existence, all ports support SPP MODE
135 static int parport_SPP_supported(struct parport
*pb
)
140 * first clear an eventually pending EPP timeout
141 * I (sailer@ife.ee.ethz.ch) have an SMSC chipset
142 * that does not even respond to SPP cycles if an EPP
145 clear_epp_timeout(pb
);
147 /* Do a simple read-write test to make sure the port exists. */
149 parport_writeb (w
, CONTROL (pb
));
151 /* Is there a control register that we can read from? Some
152 * ports don't allow reads, so read_control just returns a
153 * software copy. Some ports _do_ allow reads, so bypass the
154 * software copy here. In addition, some bits aren't
156 r
= parport_readb (CONTROL (pb
));
157 if ((r
& 0xf) == w
) {
159 parport_writeb (w
, CONTROL (pb
));
160 r
= parport_readb (CONTROL (pb
));
161 parport_writeb (0xc, CONTROL (pb
));
163 return PARPORT_MODE_PCSPP
;
166 /* Try the data register. The data lines aren't tri-stated at
167 * this stage, so we expect back what we wrote. */
169 parport_gsc_write_data (pb
, w
);
170 r
= parport_gsc_read_data (pb
);
173 parport_gsc_write_data (pb
, w
);
174 r
= parport_gsc_read_data (pb
);
176 return PARPORT_MODE_PCSPP
;
182 /* Detect PS/2 support.
184 * Bit 5 (0x20) sets the PS/2 data direction; setting this high
185 * allows us to read data from the data lines. In theory we would get back
186 * 0xff but any peripheral attached to the port may drag some or all of the
187 * lines down to zero. So if we get back anything that isn't the contents
188 * of the data register we deem PS/2 support to be present.
190 * Some SPP ports have "half PS/2" ability - you can't turn off the line
191 * drivers, but an external peripheral with sufficiently beefy drivers of
192 * its own can overpower them and assert its own levels onto the bus, from
193 * where they can then be read back as normal. Ports with this property
194 * and the right type of device attached are likely to fail the SPP test,
195 * (as they will appear to have stuck bits) and so the fact that they might
196 * be misdetected here is rather academic.
199 static int parport_PS2_supported(struct parport
*pb
)
203 clear_epp_timeout(pb
);
205 /* try to tri-state the buffer */
206 parport_gsc_data_reverse (pb
);
208 parport_gsc_write_data(pb
, 0x55);
209 if (parport_gsc_read_data(pb
) != 0x55) ok
++;
211 parport_gsc_write_data(pb
, 0xaa);
212 if (parport_gsc_read_data(pb
) != 0xaa) ok
++;
214 /* cancel input mode */
215 parport_gsc_data_forward (pb
);
218 pb
->modes
|= PARPORT_MODE_TRISTATE
;
220 struct parport_gsc_private
*priv
= pb
->private_data
;
221 priv
->ctr_writable
&= ~0x20;
228 /* --- Initialisation code -------------------------------- */
230 struct parport
*parport_gsc_probe_port(unsigned long base
,
231 unsigned long base_hi
, int irq
,
232 int dma
, struct parisc_device
*padev
)
234 struct parport_gsc_private
*priv
;
235 struct parport_operations
*ops
;
237 struct parport
*p
= &tmp
;
239 priv
= kzalloc (sizeof (struct parport_gsc_private
), GFP_KERNEL
);
241 printk(KERN_DEBUG
"parport (0x%lx): no memory!\n", base
);
244 ops
= kmemdup(&parport_gsc_ops
, sizeof(struct parport_operations
),
247 printk(KERN_DEBUG
"parport (0x%lx): no memory for ops!\n",
253 priv
->ctr_writable
= 0xff;
254 priv
->dma_buf
= NULL
;
255 priv
->dma_handle
= 0;
257 p
->base_hi
= base_hi
;
260 p
->modes
= PARPORT_MODE_PCSPP
| PARPORT_MODE_SAFEININT
;
262 p
->private_data
= priv
;
264 if (!parport_SPP_supported (p
)) {
270 parport_PS2_supported (p
);
272 if (!(p
= parport_register_port(base
, PARPORT_IRQ_NONE
,
273 PARPORT_DMA_NONE
, ops
))) {
279 p
->dev
= &padev
->dev
;
280 p
->base_hi
= base_hi
;
281 p
->modes
= tmp
.modes
;
282 p
->size
= (p
->modes
& PARPORT_MODE_EPP
)?8:3;
283 p
->private_data
= priv
;
285 pr_info("%s: PC-style at 0x%lx", p
->name
, p
->base
);
287 if (p
->irq
== PARPORT_IRQ_AUTO
) {
288 p
->irq
= PARPORT_IRQ_NONE
;
290 if (p
->irq
!= PARPORT_IRQ_NONE
) {
291 pr_cont(", irq %d", p
->irq
);
293 if (p
->dma
== PARPORT_DMA_AUTO
) {
294 p
->dma
= PARPORT_DMA_NONE
;
297 if (p
->dma
== PARPORT_DMA_AUTO
) /* To use DMA, giving the irq
298 is mandatory (see above) */
299 p
->dma
= PARPORT_DMA_NONE
;
302 #define printmode(x) \
304 if (p->modes & PARPORT_MODE_##x) \
305 pr_cont("%s%s", f++ ? "," : "", #x); \
319 if (p
->irq
!= PARPORT_IRQ_NONE
) {
320 if (request_irq (p
->irq
, parport_irq_handler
,
322 pr_warn("%s: irq %d in use, resorting to polled operation\n",
324 p
->irq
= PARPORT_IRQ_NONE
;
325 p
->dma
= PARPORT_DMA_NONE
;
329 /* Done probing. Now put the port into a sensible start-up state. */
331 parport_gsc_write_data(p
, 0);
332 parport_gsc_data_forward (p
);
334 /* Now that we've told the sharing engine about the port, and
335 found out its characteristics, let the high-level drivers
337 parport_announce_port (p
);
343 #define PARPORT_GSC_OFFSET 0x800
345 static int parport_count
;
347 static int __init
parport_init_chip(struct parisc_device
*dev
)
353 pr_warn("IRQ not found for parallel device at 0x%llx\n",
354 (unsigned long long)dev
->hpa
.start
);
358 port
= dev
->hpa
.start
+ PARPORT_GSC_OFFSET
;
360 /* some older machines with ASP-chip don't support
361 * the enhanced parport modes.
363 if (boot_cpu_data
.cpu_type
> pcxt
&& !pdc_add_valid(port
+4)) {
365 /* Initialize bidirectional-mode (0x10) & data-tranfer-mode #1 (0x20) */
366 pr_info("%s: initialize bidirectional-mode\n", __func__
);
367 parport_writeb ( (0x10 + 0x20), port
+ 4);
370 pr_info("%s: enhanced parport-modes not supported\n", __func__
);
373 p
= parport_gsc_probe_port(port
, 0, dev
->irq
,
374 /* PARPORT_IRQ_NONE */ PARPORT_DMA_NONE
, dev
);
377 dev_set_drvdata(&dev
->dev
, p
);
382 static int __exit
parport_remove_chip(struct parisc_device
*dev
)
384 struct parport
*p
= dev_get_drvdata(&dev
->dev
);
386 struct parport_gsc_private
*priv
= p
->private_data
;
387 struct parport_operations
*ops
= p
->ops
;
388 parport_remove_port(p
);
389 if (p
->dma
!= PARPORT_DMA_NONE
)
391 if (p
->irq
!= PARPORT_IRQ_NONE
)
394 pci_free_consistent(priv
->dev
, PAGE_SIZE
,
397 kfree (p
->private_data
);
399 kfree (ops
); /* hope no-one cached it */
404 static const struct parisc_device_id parport_tbl
[] __initconst
= {
405 { HPHW_FIO
, HVERSION_REV_ANY_ID
, HVERSION_ANY_ID
, 0x74 },
409 MODULE_DEVICE_TABLE(parisc
, parport_tbl
);
411 static struct parisc_driver parport_driver __refdata
= {
413 .id_table
= parport_tbl
,
414 .probe
= parport_init_chip
,
415 .remove
= __exit_p(parport_remove_chip
),
418 int parport_gsc_init(void)
420 return register_parisc_driver(&parport_driver
);
423 static void parport_gsc_exit(void)
425 unregister_parisc_driver(&parport_driver
);
428 module_init(parport_gsc_init
);
429 module_exit(parport_gsc_exit
);