1 # SPDX-License-Identifier: GPL-2.0-only
3 # Phy drivers for Qualcomm and Atheros platforms
6 tristate "Atheros AR71XX/9XXX USB PHY driver"
7 depends on OF && (ATH79 || COMPILE_TEST)
8 default y if USB_EHCI_HCD_PLATFORM || USB_OHCI_HCD_PLATFORM
9 select RESET_CONTROLLER
12 Enable this to support the USB PHY on Atheros AR71XX/9XXX SoCs.
14 config PHY_QCOM_APQ8064_SATA
15 tristate "Qualcomm APQ8064 SATA SerDes/PHY driver"
21 config PHY_QCOM_IPQ4019_USB
22 tristate "Qualcomm IPQ4019 USB PHY driver"
23 depends on OF && (ARCH_QCOM || COMPILE_TEST)
26 Support for the USB PHY-s on Qualcomm IPQ40xx SoC-s.
28 config PHY_QCOM_IPQ806X_SATA
29 tristate "Qualcomm IPQ806x SATA SerDes/PHY driver"
36 tristate "Qualcomm PCIe Gen2 PHY Driver"
37 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
40 Enable this to support the Qualcomm PCIe PHY, used with the Synopsys
41 based PCIe controller.
44 tristate "Qualcomm QMP PHY Driver"
45 depends on OF && COMMON_CLK && (ARCH_QCOM || COMPILE_TEST)
48 Enable this to support the QMP PHY transceiver that is used
49 with controllers such as PCIe, UFS, and USB on Qualcomm chips.
52 tristate "Qualcomm QUSB2 PHY Driver"
53 depends on OF && (ARCH_QCOM || COMPILE_TEST)
54 depends on NVMEM || !NVMEM
57 Enable this to support the HighSpeed QUSB2 PHY transceiver for USB
58 controllers on Qualcomm chips. This driver supports the high-speed
59 PHY which is usually paired with either the ChipIdea or Synopsys DWC3
62 config PHY_QCOM_USB_HS
63 tristate "Qualcomm USB HS PHY module"
64 depends on USB_ULPI_BUS
65 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
68 Support for the USB high-speed ULPI compliant phy on Qualcomm
71 config PHY_QCOM_USB_SNPS_FEMTO_V2
72 tristate "Qualcomm SNPS FEMTO USB HS PHY V2 module"
73 depends on OF && (ARCH_QCOM || COMPILE_TEST)
76 Enable support for the USB high-speed SNPS Femto phy on Qualcomm
77 chipsets. This PHY has differences in the register map compared
78 to the V1 variants. The PHY is paired with a Synopsys DWC3 USB
79 controller on Qualcomm SOCs.
81 config PHY_QCOM_USB_HSIC
82 tristate "Qualcomm USB HSIC ULPI PHY module"
83 depends on USB_ULPI_BUS
86 Support for the USB HSIC ULPI compliant PHY on QCOM chipsets.
88 config PHY_QCOM_USB_HS_28NM
89 tristate "Qualcomm 28nm High-Speed PHY"
90 depends on OF && (ARCH_QCOM || COMPILE_TEST)
91 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
94 Enable this to support the Qualcomm Synopsys DesignWare Core 28nm
95 High-Speed PHY driver. This driver supports the Hi-Speed PHY which
96 is usually paired with either the ChipIdea or Synopsys DWC3 USB
99 config PHY_QCOM_USB_SS
100 tristate "Qualcomm USB Super-Speed PHY driver"
101 depends on OF && (ARCH_QCOM || COMPILE_TEST)
102 depends on EXTCON || !EXTCON # if EXTCON=m, this cannot be built-in
105 Enable this to support the Super-Speed USB transceiver on various
108 config PHY_QCOM_IPQ806X_USB
109 tristate "Qualcomm IPQ806x DWC3 USB PHY driver"
111 depends on OF && (ARCH_QCOM || COMPILE_TEST)
114 This option enables support for the Synopsis PHYs present inside the
115 Qualcomm USB3.0 DWC3 controller on ipq806x SoC. This driver supports
116 both HS and SS PHY controllers.