Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / pwm / pwm-cros-ec.c
blobc1c337969e4ecb45520c3e03b2f3c38047f8bd75
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Expose a PWM controlled by the ChromeOS EC to the host processor.
5 * Copyright (C) 2016 Google, Inc.
6 */
8 #include <linux/module.h>
9 #include <linux/platform_data/cros_ec_commands.h>
10 #include <linux/platform_data/cros_ec_proto.h>
11 #include <linux/platform_device.h>
12 #include <linux/pwm.h>
13 #include <linux/slab.h>
15 /**
16 * struct cros_ec_pwm_device - Driver data for EC PWM
18 * @dev: Device node
19 * @ec: Pointer to EC device
20 * @chip: PWM controller chip
22 struct cros_ec_pwm_device {
23 struct device *dev;
24 struct cros_ec_device *ec;
25 struct pwm_chip chip;
28 /**
29 * struct cros_ec_pwm - per-PWM driver data
30 * @duty_cycle: cached duty cycle
32 struct cros_ec_pwm {
33 u16 duty_cycle;
36 static inline struct cros_ec_pwm_device *pwm_to_cros_ec_pwm(struct pwm_chip *c)
38 return container_of(c, struct cros_ec_pwm_device, chip);
41 static int cros_ec_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
43 struct cros_ec_pwm *channel;
45 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
46 if (!channel)
47 return -ENOMEM;
49 pwm_set_chip_data(pwm, channel);
51 return 0;
54 static void cros_ec_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
56 struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
58 kfree(channel);
61 static int cros_ec_pwm_set_duty(struct cros_ec_device *ec, u8 index, u16 duty)
63 struct {
64 struct cros_ec_command msg;
65 struct ec_params_pwm_set_duty params;
66 } __packed buf;
67 struct ec_params_pwm_set_duty *params = &buf.params;
68 struct cros_ec_command *msg = &buf.msg;
70 memset(&buf, 0, sizeof(buf));
72 msg->version = 0;
73 msg->command = EC_CMD_PWM_SET_DUTY;
74 msg->insize = 0;
75 msg->outsize = sizeof(*params);
77 params->duty = duty;
78 params->pwm_type = EC_PWM_TYPE_GENERIC;
79 params->index = index;
81 return cros_ec_cmd_xfer_status(ec, msg);
84 static int cros_ec_pwm_get_duty(struct cros_ec_device *ec, u8 index)
86 struct {
87 struct cros_ec_command msg;
88 union {
89 struct ec_params_pwm_get_duty params;
90 struct ec_response_pwm_get_duty resp;
92 } __packed buf;
93 struct ec_params_pwm_get_duty *params = &buf.params;
94 struct ec_response_pwm_get_duty *resp = &buf.resp;
95 struct cros_ec_command *msg = &buf.msg;
96 int ret;
98 memset(&buf, 0, sizeof(buf));
100 msg->version = 0;
101 msg->command = EC_CMD_PWM_GET_DUTY;
102 msg->insize = sizeof(*resp);
103 msg->outsize = sizeof(*params);
105 params->pwm_type = EC_PWM_TYPE_GENERIC;
106 params->index = index;
108 ret = cros_ec_cmd_xfer_status(ec, msg);
109 if (ret < 0)
110 return ret;
112 return resp->duty;
115 static int cros_ec_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
116 const struct pwm_state *state)
118 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
119 struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
120 u16 duty_cycle;
121 int ret;
123 /* The EC won't let us change the period */
124 if (state->period != EC_PWM_MAX_DUTY)
125 return -EINVAL;
128 * EC doesn't separate the concept of duty cycle and enabled, but
129 * kernel does. Translate.
131 duty_cycle = state->enabled ? state->duty_cycle : 0;
133 ret = cros_ec_pwm_set_duty(ec_pwm->ec, pwm->hwpwm, duty_cycle);
134 if (ret < 0)
135 return ret;
137 channel->duty_cycle = state->duty_cycle;
139 return 0;
142 static void cros_ec_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm,
143 struct pwm_state *state)
145 struct cros_ec_pwm_device *ec_pwm = pwm_to_cros_ec_pwm(chip);
146 struct cros_ec_pwm *channel = pwm_get_chip_data(pwm);
147 int ret;
149 ret = cros_ec_pwm_get_duty(ec_pwm->ec, pwm->hwpwm);
150 if (ret < 0) {
151 dev_err(chip->dev, "error getting initial duty: %d\n", ret);
152 return;
155 state->enabled = (ret > 0);
156 state->period = EC_PWM_MAX_DUTY;
159 * Note that "disabled" and "duty cycle == 0" are treated the same. If
160 * the cached duty cycle is not zero, used the cached duty cycle. This
161 * ensures that the configured duty cycle is kept across a disable and
162 * enable operation and avoids potentially confusing consumers.
164 * For the case of the initial hardware readout, channel->duty_cycle
165 * will be 0 and the actual duty cycle read from the EC is used.
167 if (ret == 0 && channel->duty_cycle > 0)
168 state->duty_cycle = channel->duty_cycle;
169 else
170 state->duty_cycle = ret;
173 static struct pwm_device *
174 cros_ec_pwm_xlate(struct pwm_chip *pc, const struct of_phandle_args *args)
176 struct pwm_device *pwm;
178 if (args->args[0] >= pc->npwm)
179 return ERR_PTR(-EINVAL);
181 pwm = pwm_request_from_chip(pc, args->args[0], NULL);
182 if (IS_ERR(pwm))
183 return pwm;
185 /* The EC won't let us change the period */
186 pwm->args.period = EC_PWM_MAX_DUTY;
188 return pwm;
191 static const struct pwm_ops cros_ec_pwm_ops = {
192 .request = cros_ec_pwm_request,
193 .free = cros_ec_pwm_free,
194 .get_state = cros_ec_pwm_get_state,
195 .apply = cros_ec_pwm_apply,
196 .owner = THIS_MODULE,
200 * Determine the number of supported PWMs. The EC does not return the number
201 * of PWMs it supports directly, so we have to read the pwm duty cycle for
202 * subsequent channels until we get an error.
204 static int cros_ec_num_pwms(struct cros_ec_device *ec)
206 int i, ret;
208 /* The index field is only 8 bits */
209 for (i = 0; i <= U8_MAX; i++) {
210 ret = cros_ec_pwm_get_duty(ec, i);
212 * We look for SUCCESS, INVALID_COMMAND, or INVALID_PARAM
213 * responses; everything else is treated as an error.
214 * The EC error codes map to -EOPNOTSUPP and -EINVAL,
215 * so check for those.
217 switch (ret) {
218 case -EOPNOTSUPP: /* invalid command */
219 return -ENODEV;
220 case -EINVAL: /* invalid parameter */
221 return i;
222 default:
223 if (ret < 0)
224 return ret;
225 break;
229 return U8_MAX;
232 static int cros_ec_pwm_probe(struct platform_device *pdev)
234 struct cros_ec_device *ec = dev_get_drvdata(pdev->dev.parent);
235 struct device *dev = &pdev->dev;
236 struct cros_ec_pwm_device *ec_pwm;
237 struct pwm_chip *chip;
238 int ret;
240 if (!ec) {
241 dev_err(dev, "no parent EC device\n");
242 return -EINVAL;
245 ec_pwm = devm_kzalloc(dev, sizeof(*ec_pwm), GFP_KERNEL);
246 if (!ec_pwm)
247 return -ENOMEM;
248 chip = &ec_pwm->chip;
249 ec_pwm->ec = ec;
251 /* PWM chip */
252 chip->dev = dev;
253 chip->ops = &cros_ec_pwm_ops;
254 chip->of_xlate = cros_ec_pwm_xlate;
255 chip->of_pwm_n_cells = 1;
256 chip->base = -1;
257 ret = cros_ec_num_pwms(ec);
258 if (ret < 0) {
259 dev_err(dev, "Couldn't find PWMs: %d\n", ret);
260 return ret;
262 chip->npwm = ret;
263 dev_dbg(dev, "Probed %u PWMs\n", chip->npwm);
265 ret = pwmchip_add(chip);
266 if (ret < 0) {
267 dev_err(dev, "cannot register PWM: %d\n", ret);
268 return ret;
271 platform_set_drvdata(pdev, ec_pwm);
273 return ret;
276 static int cros_ec_pwm_remove(struct platform_device *dev)
278 struct cros_ec_pwm_device *ec_pwm = platform_get_drvdata(dev);
279 struct pwm_chip *chip = &ec_pwm->chip;
281 return pwmchip_remove(chip);
284 #ifdef CONFIG_OF
285 static const struct of_device_id cros_ec_pwm_of_match[] = {
286 { .compatible = "google,cros-ec-pwm" },
289 MODULE_DEVICE_TABLE(of, cros_ec_pwm_of_match);
290 #endif
292 static struct platform_driver cros_ec_pwm_driver = {
293 .probe = cros_ec_pwm_probe,
294 .remove = cros_ec_pwm_remove,
295 .driver = {
296 .name = "cros-ec-pwm",
297 .of_match_table = of_match_ptr(cros_ec_pwm_of_match),
300 module_platform_driver(cros_ec_pwm_driver);
302 MODULE_ALIAS("platform:cros-ec-pwm");
303 MODULE_DESCRIPTION("ChromeOS EC PWM driver");
304 MODULE_LICENSE("GPL v2");