1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * CXL Flash Device Driver
5 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
6 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
8 * Copyright (C) 2015 IBM Corporation
11 #ifndef _CXLFLASH_MAIN_H
12 #define _CXLFLASH_MAIN_H
14 #include <linux/list.h>
15 #include <linux/types.h>
16 #include <scsi/scsi.h>
17 #include <scsi/scsi_device.h>
21 #define CXLFLASH_NAME "cxlflash"
22 #define CXLFLASH_ADAPTER_NAME "IBM POWER CXL Flash Adapter"
23 #define CXLFLASH_MAX_ADAPTERS 32
25 #define PCI_DEVICE_ID_IBM_CORSA 0x04F0
26 #define PCI_DEVICE_ID_IBM_FLASH_GT 0x0600
27 #define PCI_DEVICE_ID_IBM_BRIARD 0x0624
29 /* Since there is only one target, make it 0 */
30 #define CXLFLASH_TARGET 0
31 #define CXLFLASH_MAX_CDB_LEN 16
33 /* Really only one target per bus since the Texan is directly attached */
34 #define CXLFLASH_MAX_NUM_TARGETS_PER_BUS 1
35 #define CXLFLASH_MAX_NUM_LUNS_PER_TARGET 65536
37 #define CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT (120 * HZ)
40 #define FC_MTIP_CMDCONFIG 0x010
41 #define FC_MTIP_STATUS 0x018
42 #define FC_MAX_NUM_LUNS 0x080 /* Max LUNs host can provision for port */
43 #define FC_CUR_NUM_LUNS 0x088 /* Cur number LUNs provisioned for port */
44 #define FC_MAX_CAP_PORT 0x090 /* Max capacity all LUNs for port (4K blocks) */
45 #define FC_CUR_CAP_PORT 0x098 /* Cur capacity all LUNs for port (4K blocks) */
47 #define FC_PNAME 0x300
48 #define FC_CONFIG 0x320
49 #define FC_CONFIG2 0x328
50 #define FC_STATUS 0x330
51 #define FC_ERROR 0x380
52 #define FC_ERRCAP 0x388
53 #define FC_ERRMSK 0x390
54 #define FC_CNT_CRCERR 0x538
55 #define FC_CRC_THRESH 0x580
57 #define FC_MTIP_CMDCONFIG_ONLINE 0x20ULL
58 #define FC_MTIP_CMDCONFIG_OFFLINE 0x40ULL
60 #define FC_MTIP_STATUS_MASK 0x30ULL
61 #define FC_MTIP_STATUS_ONLINE 0x20ULL
62 #define FC_MTIP_STATUS_OFFLINE 0x10ULL
64 /* TIMEOUT and RETRY definitions */
66 /* AFU command timeout values */
67 #define MC_AFU_SYNC_TIMEOUT 5 /* 5 secs */
68 #define MC_LUN_PROV_TIMEOUT 5 /* 5 secs */
69 #define MC_AFU_DEBUG_TIMEOUT 5 /* 5 secs */
71 /* AFU command room retry limit */
72 #define MC_ROOM_RETRY_CNT 10
74 /* FC CRC clear periodic timer */
75 #define MC_CRC_THRESH 100 /* threshold in 5 mins */
77 #define FC_PORT_STATUS_RETRY_CNT 100 /* 100 100ms retries = 10 seconds */
78 #define FC_PORT_STATUS_RETRY_INTERVAL_US 100000 /* microseconds */
81 #define CXLFLASH_VPD_LEN 256
83 #define WWPN_BUF_LEN (WWPN_LEN + 1)
93 struct dev_dependent_vals
{
96 #define CXLFLASH_NOTIFY_SHUTDOWN 0x0000000000000001ULL
97 #define CXLFLASH_WWPN_VPD_REQUIRED 0x0000000000000002ULL
98 #define CXLFLASH_OCXL_DEV 0x0000000000000004ULL
101 static inline const struct cxlflash_backend_ops
*
102 cxlflash_assign_ops(struct dev_dependent_vals
*ddv
)
104 const struct cxlflash_backend_ops
*ops
= NULL
;
106 #ifdef CONFIG_OCXL_BASE
107 if (ddv
->flags
& CXLFLASH_OCXL_DEV
)
108 ops
= &cxlflash_ocxl_ops
;
111 #ifdef CONFIG_CXL_BASE
112 if (!(ddv
->flags
& CXLFLASH_OCXL_DEV
))
113 ops
= &cxlflash_cxl_ops
;
119 struct asyc_intr_info
{
124 #define CLR_FC_ERROR 0x01
125 #define LINK_RESET 0x02
126 #define SCAN_HOST 0x04
129 #endif /* _CXLFLASH_MAIN_H */