1 /*****************************************************************************/
2 /* ips.c -- driver for the Adaptec / IBM ServeRAID controller */
4 /* Written By: Keith Mitchell, IBM Corporation */
5 /* Jack Hammer, Adaptec, Inc. */
6 /* David Jeffery, Adaptec, Inc. */
8 /* Copyright (C) 2000 IBM Corporation */
9 /* Copyright (C) 2002,2003 Adaptec, Inc. */
11 /* This program is free software; you can redistribute it and/or modify */
12 /* it under the terms of the GNU General Public License as published by */
13 /* the Free Software Foundation; either version 2 of the License, or */
14 /* (at your option) any later version. */
16 /* This program is distributed in the hope that it will be useful, */
17 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
18 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
19 /* GNU General Public License for more details. */
22 /* THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR */
23 /* CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT */
24 /* LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, */
25 /* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is */
26 /* solely responsible for determining the appropriateness of using and */
27 /* distributing the Program and assumes all risks associated with its */
28 /* exercise of rights under this Agreement, including but not limited to */
29 /* the risks and costs of program errors, damage to or loss of data, */
30 /* programs or equipment, and unavailability or interruption of operations. */
32 /* DISCLAIMER OF LIABILITY */
33 /* NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY */
34 /* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL */
35 /* DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND */
36 /* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR */
37 /* TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE */
38 /* USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED */
39 /* HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES */
41 /* You should have received a copy of the GNU General Public License */
42 /* along with this program; if not, write to the Free Software */
43 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */
45 /* Bugs/Comments/Suggestions about this driver should be mailed to: */
46 /* ipslinux@adaptec.com */
48 /* For system support issues, contact your local IBM Customer support. */
49 /* Directions to find IBM Customer Support for each country can be found at: */
50 /* http://www.ibm.com/planetwide/ */
52 /*****************************************************************************/
54 /*****************************************************************************/
57 /* 0.99.02 - Breakup commands that are bigger than 8 * the stripe size */
58 /* 0.99.03 - Make interrupt routine handle all completed request on the */
59 /* adapter not just the first one */
60 /* - Make sure passthru commands get woken up if we run out of */
62 /* - Send all of the commands on the queue at once rather than */
63 /* one at a time since the card will support it. */
64 /* 0.99.04 - Fix race condition in the passthru mechanism -- this required */
65 /* the interface to the utilities to change */
66 /* - Fix error recovery code */
67 /* 0.99.05 - Fix an oops when we get certain passthru commands */
68 /* 1.00.00 - Initial Public Release */
69 /* Functionally equivalent to 0.99.05 */
70 /* 3.60.00 - Bump max commands to 128 for use with firmware 3.60 */
71 /* - Change version to 3.60 to coincide with release numbering. */
72 /* 3.60.01 - Remove bogus error check in passthru routine */
73 /* 3.60.02 - Make DCDB direction based on lookup table */
74 /* - Only allow one DCDB command to a SCSI ID at a time */
75 /* 4.00.00 - Add support for ServeRAID 4 */
76 /* 4.00.01 - Add support for First Failure Data Capture */
77 /* 4.00.02 - Fix problem with PT DCDB with no buffer */
78 /* 4.00.03 - Add alternative passthru interface */
79 /* - Add ability to flash BIOS */
80 /* 4.00.04 - Rename structures/constants to be prefixed with IPS_ */
81 /* 4.00.05 - Remove wish_block from init routine */
82 /* - Use linux/spinlock.h instead of asm/spinlock.h for kernels */
83 /* 2.3.18 and later */
84 /* - Sync with other changes from the 2.3 kernels */
85 /* 4.00.06 - Fix timeout with initial FFDC command */
86 /* 4.00.06a - Port to 2.4 (trivial) -- Christoph Hellwig <hch@infradead.org> */
87 /* 4.10.00 - Add support for ServeRAID 4M/4L */
88 /* 4.10.13 - Fix for dynamic unload and proc file system */
89 /* 4.20.03 - Rename version to coincide with new release schedules */
90 /* Performance fixes */
91 /* Fix truncation of /proc files with cat */
92 /* Merge in changes through kernel 2.4.0test1ac21 */
93 /* 4.20.13 - Fix some failure cases / reset code */
94 /* - Hook into the reboot_notifier to flush the controller cache */
95 /* 4.50.01 - Fix problem when there is a hole in logical drive numbering */
96 /* 4.70.09 - Use a Common ( Large Buffer ) for Flashing from the JCRM CD */
97 /* - Add IPSSEND Flash Support */
98 /* - Set Sense Data for Unknown SCSI Command */
99 /* - Use Slot Number from NVRAM Page 5 */
100 /* - Restore caller's DCDB Structure */
101 /* 4.70.12 - Corrective actions for bad controller ( during initialization )*/
102 /* 4.70.13 - Don't Send CDB's if we already know the device is not present */
103 /* - Don't release HA Lock in ips_next() until SC taken off queue */
104 /* - Unregister SCSI device in ips_release() */
105 /* 4.70.15 - Fix Breakup for very large ( non-SG ) requests in ips_done() */
106 /* 4.71.00 - Change all memory allocations to not use GFP_DMA flag */
107 /* Code Clean-Up for 2.4.x kernel */
108 /* 4.72.00 - Allow for a Scatter-Gather Element to exceed MAX_XFER Size */
109 /* 4.72.01 - I/O Mapped Memory release ( so "insmod ips" does not Fail ) */
110 /* - Don't Issue Internal FFDC Command if there are Active Commands */
111 /* - Close Window for getting too many IOCTL's active */
112 /* 4.80.00 - Make ia64 Safe */
113 /* 4.80.04 - Eliminate calls to strtok() if 2.4.x or greater */
114 /* - Adjustments to Device Queue Depth */
115 /* 4.80.14 - Take all semaphores off stack */
116 /* - Clean Up New_IOCTL path */
117 /* 4.80.20 - Set max_sectors in Scsi_Host structure ( if >= 2.4.7 kernel ) */
118 /* - 5 second delay needed after resetting an i960 adapter */
119 /* 4.80.26 - Clean up potential code problems ( Arjan's recommendations ) */
120 /* 4.90.01 - Version Matching for FirmWare, BIOS, and Driver */
121 /* 4.90.05 - Use New PCI Architecture to facilitate Hot Plug Development */
122 /* 4.90.08 - Increase Delays in Flashing ( Trombone Only - 4H ) */
123 /* 4.90.08 - Data Corruption if First Scatter Gather Element is > 64K */
124 /* 4.90.11 - Don't actually RESET unless it's physically required */
125 /* - Remove unused compile options */
126 /* 5.00.01 - Sarasota ( 5i ) adapters must always be scanned first */
127 /* - Get rid on IOCTL_NEW_COMMAND code */
128 /* - Add Extended DCDB Commands for Tape Support in 5I */
129 /* 5.10.12 - use pci_dma interfaces, update for 2.5 kernel changes */
130 /* 5.10.15 - remove unused code (sem, macros, etc.) */
131 /* 5.30.00 - use __devexit_p() */
132 /* 6.00.00 - Add 6x Adapters and Battery Flash */
133 /* 6.10.00 - Remove 1G Addressing Limitations */
134 /* 6.11.xx - Get VersionInfo buffer off the stack ! DDTS 60401 */
135 /* 6.11.xx - Make Logical Drive Info structure safe for DMA DDTS 60639 */
136 /* 7.10.18 - Add highmem_io flag in SCSI Templete for 2.4 kernels */
137 /* - Fix path/name for scsi_hosts.h include for 2.6 kernels */
138 /* - Fix sort order of 7k */
139 /* - Remove 3 unused "inline" functions */
140 /* 7.12.xx - Use STATIC functions wherever possible */
141 /* - Clean up deprecated MODULE_PARM calls */
142 /* 7.12.05 - Remove Version Matching per IBM request */
143 /*****************************************************************************/
146 * Conditional Compilation directives for this driver:
148 * IPS_DEBUG - Turn on debugging info
152 * debug:<number> - Set debug level to <number>
153 * NOTE: only works when IPS_DEBUG compile directive is used.
154 * 1 - Normal debug messages
155 * 2 - Verbose debug messages
156 * 11 - Method trace (non interrupt)
157 * 12 - Method trace (includes interrupt)
159 * noi2o - Don't use I2O Queues (ServeRAID 4 only)
160 * nommap - Don't use memory mapped I/O
161 * ioctlsize - Initial size of the IOCTL buffer
165 #include <asm/byteorder.h>
166 #include <asm/page.h>
167 #include <linux/stddef.h>
168 #include <linux/string.h>
169 #include <linux/errno.h>
170 #include <linux/kernel.h>
171 #include <linux/ioport.h>
172 #include <linux/slab.h>
173 #include <linux/delay.h>
174 #include <linux/pci.h>
175 #include <linux/proc_fs.h>
176 #include <linux/reboot.h>
177 #include <linux/interrupt.h>
179 #include <linux/blkdev.h>
180 #include <linux/types.h>
181 #include <linux/dma-mapping.h>
185 #include <scsi/scsi_host.h>
189 #include <linux/module.h>
191 #include <linux/stat.h>
193 #include <linux/spinlock.h>
194 #include <linux/init.h>
196 #include <linux/smp.h>
199 static char *ips
= NULL
;
200 module_param(ips
, charp
, 0);
206 #define IPS_VERSION_HIGH IPS_VER_MAJOR_STRING "." IPS_VER_MINOR_STRING
207 #define IPS_VERSION_LOW "." IPS_VER_BUILD_STRING " "
209 #define IPS_DMA_DIR(scb) ((!scb->scsi_cmd || ips_is_passthru(scb->scsi_cmd) || \
210 DMA_NONE == scb->scsi_cmd->sc_data_direction) ? \
211 DMA_BIDIRECTIONAL : \
212 scb->scsi_cmd->sc_data_direction)
215 #define METHOD_TRACE(s, i) if (ips_debug >= (i+10)) printk(KERN_NOTICE s "\n");
216 #define DEBUG(i, s) if (ips_debug >= i) printk(KERN_NOTICE s "\n");
217 #define DEBUG_VAR(i, s, v...) if (ips_debug >= i) printk(KERN_NOTICE s "\n", v);
219 #define METHOD_TRACE(s, i)
221 #define DEBUG_VAR(i, s, v...)
225 * Function prototypes
227 static int ips_eh_abort(struct scsi_cmnd
*);
228 static int ips_eh_reset(struct scsi_cmnd
*);
229 static int ips_queue(struct Scsi_Host
*, struct scsi_cmnd
*);
230 static const char *ips_info(struct Scsi_Host
*);
231 static irqreturn_t
do_ipsintr(int, void *);
232 static int ips_hainit(ips_ha_t
*);
233 static int ips_map_status(ips_ha_t
*, ips_scb_t
*, ips_stat_t
*);
234 static int ips_send_wait(ips_ha_t
*, ips_scb_t
*, int, int);
235 static int ips_send_cmd(ips_ha_t
*, ips_scb_t
*);
236 static int ips_online(ips_ha_t
*, ips_scb_t
*);
237 static int ips_inquiry(ips_ha_t
*, ips_scb_t
*);
238 static int ips_rdcap(ips_ha_t
*, ips_scb_t
*);
239 static int ips_msense(ips_ha_t
*, ips_scb_t
*);
240 static int ips_reqsen(ips_ha_t
*, ips_scb_t
*);
241 static int ips_deallocatescbs(ips_ha_t
*, int);
242 static int ips_allocatescbs(ips_ha_t
*);
243 static int ips_reset_copperhead(ips_ha_t
*);
244 static int ips_reset_copperhead_memio(ips_ha_t
*);
245 static int ips_reset_morpheus(ips_ha_t
*);
246 static int ips_issue_copperhead(ips_ha_t
*, ips_scb_t
*);
247 static int ips_issue_copperhead_memio(ips_ha_t
*, ips_scb_t
*);
248 static int ips_issue_i2o(ips_ha_t
*, ips_scb_t
*);
249 static int ips_issue_i2o_memio(ips_ha_t
*, ips_scb_t
*);
250 static int ips_isintr_copperhead(ips_ha_t
*);
251 static int ips_isintr_copperhead_memio(ips_ha_t
*);
252 static int ips_isintr_morpheus(ips_ha_t
*);
253 static int ips_wait(ips_ha_t
*, int, int);
254 static int ips_write_driver_status(ips_ha_t
*, int);
255 static int ips_read_adapter_status(ips_ha_t
*, int);
256 static int ips_read_subsystem_parameters(ips_ha_t
*, int);
257 static int ips_read_config(ips_ha_t
*, int);
258 static int ips_clear_adapter(ips_ha_t
*, int);
259 static int ips_readwrite_page5(ips_ha_t
*, int, int);
260 static int ips_init_copperhead(ips_ha_t
*);
261 static int ips_init_copperhead_memio(ips_ha_t
*);
262 static int ips_init_morpheus(ips_ha_t
*);
263 static int ips_isinit_copperhead(ips_ha_t
*);
264 static int ips_isinit_copperhead_memio(ips_ha_t
*);
265 static int ips_isinit_morpheus(ips_ha_t
*);
266 static int ips_erase_bios(ips_ha_t
*);
267 static int ips_program_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
268 static int ips_verify_bios(ips_ha_t
*, char *, uint32_t, uint32_t);
269 static int ips_erase_bios_memio(ips_ha_t
*);
270 static int ips_program_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
271 static int ips_verify_bios_memio(ips_ha_t
*, char *, uint32_t, uint32_t);
272 static int ips_flash_copperhead(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
273 static int ips_flash_bios(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
274 static int ips_flash_firmware(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
275 static void ips_free_flash_copperhead(ips_ha_t
* ha
);
276 static void ips_get_bios_version(ips_ha_t
*, int);
277 static void ips_identify_controller(ips_ha_t
*);
278 static void ips_chkstatus(ips_ha_t
*, IPS_STATUS
*);
279 static void ips_enable_int_copperhead(ips_ha_t
*);
280 static void ips_enable_int_copperhead_memio(ips_ha_t
*);
281 static void ips_enable_int_morpheus(ips_ha_t
*);
282 static int ips_intr_copperhead(ips_ha_t
*);
283 static int ips_intr_morpheus(ips_ha_t
*);
284 static void ips_next(ips_ha_t
*, int);
285 static void ipsintr_blocking(ips_ha_t
*, struct ips_scb
*);
286 static void ipsintr_done(ips_ha_t
*, struct ips_scb
*);
287 static void ips_done(ips_ha_t
*, ips_scb_t
*);
288 static void ips_free(ips_ha_t
*);
289 static void ips_init_scb(ips_ha_t
*, ips_scb_t
*);
290 static void ips_freescb(ips_ha_t
*, ips_scb_t
*);
291 static void ips_setup_funclist(ips_ha_t
*);
292 static void ips_statinit(ips_ha_t
*);
293 static void ips_statinit_memio(ips_ha_t
*);
294 static void ips_fix_ffdc_time(ips_ha_t
*, ips_scb_t
*, time64_t
);
295 static void ips_ffdc_reset(ips_ha_t
*, int);
296 static void ips_ffdc_time(ips_ha_t
*);
297 static uint32_t ips_statupd_copperhead(ips_ha_t
*);
298 static uint32_t ips_statupd_copperhead_memio(ips_ha_t
*);
299 static uint32_t ips_statupd_morpheus(ips_ha_t
*);
300 static ips_scb_t
*ips_getscb(ips_ha_t
*);
301 static void ips_putq_scb_head(ips_scb_queue_t
*, ips_scb_t
*);
302 static void ips_putq_wait_tail(ips_wait_queue_entry_t
*, struct scsi_cmnd
*);
303 static void ips_putq_copp_tail(ips_copp_queue_t
*,
304 ips_copp_wait_item_t
*);
305 static ips_scb_t
*ips_removeq_scb_head(ips_scb_queue_t
*);
306 static ips_scb_t
*ips_removeq_scb(ips_scb_queue_t
*, ips_scb_t
*);
307 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_entry_t
*);
308 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_entry_t
*,
310 static ips_copp_wait_item_t
*ips_removeq_copp(ips_copp_queue_t
*,
311 ips_copp_wait_item_t
*);
312 static ips_copp_wait_item_t
*ips_removeq_copp_head(ips_copp_queue_t
*);
314 static int ips_is_passthru(struct scsi_cmnd
*);
315 static int ips_make_passthru(ips_ha_t
*, struct scsi_cmnd
*, ips_scb_t
*, int);
316 static int ips_usrcmd(ips_ha_t
*, ips_passthru_t
*, ips_scb_t
*);
317 static void ips_cleanup_passthru(ips_ha_t
*, ips_scb_t
*);
318 static void ips_scmd_buf_write(struct scsi_cmnd
* scmd
, void *data
,
320 static void ips_scmd_buf_read(struct scsi_cmnd
* scmd
, void *data
,
323 static int ips_write_info(struct Scsi_Host
*, char *, int);
324 static int ips_show_info(struct seq_file
*, struct Scsi_Host
*);
325 static int ips_host_info(ips_ha_t
*, struct seq_file
*);
326 static int ips_abort_init(ips_ha_t
* ha
, int index
);
327 static int ips_init_phase2(int index
);
329 static int ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
);
330 static int ips_register_scsi(int index
);
332 static int ips_poll_for_flush_complete(ips_ha_t
* ha
);
333 static void ips_flush_and_reset(ips_ha_t
*ha
);
338 static const char ips_name
[] = "ips";
339 static struct Scsi_Host
*ips_sh
[IPS_MAX_ADAPTERS
]; /* Array of host controller structures */
340 static ips_ha_t
*ips_ha
[IPS_MAX_ADAPTERS
]; /* Array of HA structures */
341 static unsigned int ips_next_controller
;
342 static unsigned int ips_num_controllers
;
343 static unsigned int ips_released_controllers
;
344 static int ips_hotplug
;
345 static int ips_cmd_timeout
= 60;
346 static int ips_reset_timeout
= 60 * 5;
347 static int ips_force_memio
= 1; /* Always use Memory Mapped I/O */
348 static int ips_force_i2o
= 1; /* Always use I2O command delivery */
349 static int ips_ioctlsize
= IPS_IOCTL_SIZE
; /* Size of the ioctl buffer */
350 static int ips_cd_boot
; /* Booting from Manager CD */
351 static char *ips_FlashData
= NULL
; /* CD Boot - Flash Data Buffer */
352 static dma_addr_t ips_flashbusaddr
;
353 static long ips_FlashDataInUse
; /* CD Boot - Flash Data In Use Flag */
354 static uint32_t MaxLiteCmds
= 32; /* Max Active Cmds for a Lite Adapter */
355 static struct scsi_host_template ips_driver_template
= {
357 .queuecommand
= ips_queue
,
358 .eh_abort_handler
= ips_eh_abort
,
359 .eh_host_reset_handler
= ips_eh_reset
,
361 .show_info
= ips_show_info
,
362 .write_info
= ips_write_info
,
363 .slave_configure
= ips_slave_configure
,
364 .bios_param
= ips_biosparam
,
366 .sg_tablesize
= IPS_MAX_SG
,
372 /* This table describes all ServeRAID Adapters */
373 static struct pci_device_id ips_pci_table
[] = {
374 { 0x1014, 0x002E, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
375 { 0x1014, 0x01BD, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
376 { 0x9005, 0x0250, PCI_ANY_ID
, PCI_ANY_ID
, 0, 0 },
380 MODULE_DEVICE_TABLE( pci
, ips_pci_table
);
382 static char ips_hot_plug_name
[] = "ips";
384 static int ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
);
385 static void ips_remove_device(struct pci_dev
*pci_dev
);
387 static struct pci_driver ips_pci_driver
= {
388 .name
= ips_hot_plug_name
,
389 .id_table
= ips_pci_table
,
390 .probe
= ips_insert_device
,
391 .remove
= ips_remove_device
,
396 * Necessary forward function protoypes
398 static int ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
);
400 #define MAX_ADAPTER_NAME 15
402 static char ips_adapter_name
[][30] = {
405 "ServeRAID on motherboard",
406 "ServeRAID on motherboard",
423 static struct notifier_block ips_notifier
= {
430 static char ips_command_direction
[] = {
431 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
,
432 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
,
433 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
434 IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
435 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_OUT
,
436 IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_OUT
,
437 IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_IN
,
438 IPS_DATA_UNK
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
439 IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_UNK
,
440 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
441 IPS_DATA_OUT
, IPS_DATA_NONE
, IPS_DATA_IN
, IPS_DATA_NONE
, IPS_DATA_NONE
,
442 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
,
443 IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_OUT
,
444 IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_IN
, IPS_DATA_NONE
,
445 IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
,
446 IPS_DATA_NONE
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
,
447 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
448 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
449 IPS_DATA_IN
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
450 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
451 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
452 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
453 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
454 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
455 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
456 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
457 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
458 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
459 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
460 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
461 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
462 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
463 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
464 IPS_DATA_NONE
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_NONE
,
465 IPS_DATA_OUT
, IPS_DATA_UNK
, IPS_DATA_NONE
, IPS_DATA_UNK
, IPS_DATA_OUT
,
466 IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_OUT
, IPS_DATA_NONE
,
467 IPS_DATA_UNK
, IPS_DATA_IN
, IPS_DATA_OUT
, IPS_DATA_IN
, IPS_DATA_IN
,
468 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
469 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
470 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
471 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
472 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
473 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
474 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
475 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
476 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
477 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_OUT
,
478 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
479 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
480 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
,
481 IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
, IPS_DATA_UNK
485 /****************************************************************************/
487 /* Routine Name: ips_setup */
489 /* Routine Description: */
491 /* setup parameters to the driver */
493 /****************************************************************************/
495 ips_setup(char *ips_str
)
501 static const IPS_OPTION options
[] = {
502 {"noi2o", &ips_force_i2o
, 0},
503 {"nommap", &ips_force_memio
, 0},
504 {"ioctlsize", &ips_ioctlsize
, IPS_IOCTL_SIZE
},
505 {"cdboot", &ips_cd_boot
, 0},
506 {"maxcmds", &MaxLiteCmds
, 32},
509 /* Don't use strtok() anymore ( if 2.4 Kernel or beyond ) */
510 /* Search for value */
511 while ((key
= strsep(&ips_str
, ",."))) {
514 value
= strchr(key
, ':');
518 * We now have key/value pairs.
519 * Update the variables
521 for (i
= 0; i
< ARRAY_SIZE(options
); i
++) {
523 (key
, options
[i
].option_name
,
524 strlen(options
[i
].option_name
)) == 0) {
526 *options
[i
].option_flag
=
527 simple_strtoul(value
, NULL
, 0);
529 *options
[i
].option_flag
=
530 options
[i
].option_value
;
539 __setup("ips=", ips_setup
);
541 /****************************************************************************/
543 /* Routine Name: ips_detect */
545 /* Routine Description: */
547 /* Detect and initialize the driver */
549 /* NOTE: this routine is called under the io_request_lock spinlock */
551 /****************************************************************************/
553 ips_detect(struct scsi_host_template
* SHT
)
557 METHOD_TRACE("ips_detect", 1);
564 for (i
= 0; i
< ips_num_controllers
; i
++) {
565 if (ips_register_scsi(i
))
567 ips_released_controllers
++;
570 return (ips_num_controllers
);
573 /****************************************************************************/
574 /* configure the function pointers to use the functions that will work */
575 /* with the found version of the adapter */
576 /****************************************************************************/
578 ips_setup_funclist(ips_ha_t
* ha
)
584 if (IPS_IS_MORPHEUS(ha
) || IPS_IS_MARCO(ha
)) {
585 /* morpheus / marco / sebring */
586 ha
->func
.isintr
= ips_isintr_morpheus
;
587 ha
->func
.isinit
= ips_isinit_morpheus
;
588 ha
->func
.issue
= ips_issue_i2o_memio
;
589 ha
->func
.init
= ips_init_morpheus
;
590 ha
->func
.statupd
= ips_statupd_morpheus
;
591 ha
->func
.reset
= ips_reset_morpheus
;
592 ha
->func
.intr
= ips_intr_morpheus
;
593 ha
->func
.enableint
= ips_enable_int_morpheus
;
594 } else if (IPS_USE_MEMIO(ha
)) {
595 /* copperhead w/MEMIO */
596 ha
->func
.isintr
= ips_isintr_copperhead_memio
;
597 ha
->func
.isinit
= ips_isinit_copperhead_memio
;
598 ha
->func
.init
= ips_init_copperhead_memio
;
599 ha
->func
.statupd
= ips_statupd_copperhead_memio
;
600 ha
->func
.statinit
= ips_statinit_memio
;
601 ha
->func
.reset
= ips_reset_copperhead_memio
;
602 ha
->func
.intr
= ips_intr_copperhead
;
603 ha
->func
.erasebios
= ips_erase_bios_memio
;
604 ha
->func
.programbios
= ips_program_bios_memio
;
605 ha
->func
.verifybios
= ips_verify_bios_memio
;
606 ha
->func
.enableint
= ips_enable_int_copperhead_memio
;
607 if (IPS_USE_I2O_DELIVER(ha
))
608 ha
->func
.issue
= ips_issue_i2o_memio
;
610 ha
->func
.issue
= ips_issue_copperhead_memio
;
613 ha
->func
.isintr
= ips_isintr_copperhead
;
614 ha
->func
.isinit
= ips_isinit_copperhead
;
615 ha
->func
.init
= ips_init_copperhead
;
616 ha
->func
.statupd
= ips_statupd_copperhead
;
617 ha
->func
.statinit
= ips_statinit
;
618 ha
->func
.reset
= ips_reset_copperhead
;
619 ha
->func
.intr
= ips_intr_copperhead
;
620 ha
->func
.erasebios
= ips_erase_bios
;
621 ha
->func
.programbios
= ips_program_bios
;
622 ha
->func
.verifybios
= ips_verify_bios
;
623 ha
->func
.enableint
= ips_enable_int_copperhead
;
625 if (IPS_USE_I2O_DELIVER(ha
))
626 ha
->func
.issue
= ips_issue_i2o
;
628 ha
->func
.issue
= ips_issue_copperhead
;
632 /****************************************************************************/
634 /* Routine Name: ips_release */
636 /* Routine Description: */
638 /* Remove a driver */
640 /****************************************************************************/
642 ips_release(struct Scsi_Host
*sh
)
648 METHOD_TRACE("ips_release", 1);
650 scsi_remove_host(sh
);
652 for (i
= 0; i
< IPS_MAX_ADAPTERS
&& ips_sh
[i
] != sh
; i
++) ;
654 if (i
== IPS_MAX_ADAPTERS
) {
656 "(%s) release, invalid Scsi_Host pointer.\n", ips_name
);
666 /* flush the cache on the controller */
667 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
669 ips_init_scb(ha
, scb
);
671 scb
->timeout
= ips_cmd_timeout
;
672 scb
->cdb
[0] = IPS_CMD_FLUSH
;
674 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
675 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
676 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
677 scb
->cmd
.flush_cache
.reserved
= 0;
678 scb
->cmd
.flush_cache
.reserved2
= 0;
679 scb
->cmd
.flush_cache
.reserved3
= 0;
680 scb
->cmd
.flush_cache
.reserved4
= 0;
682 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
685 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) == IPS_FAILURE
)
686 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Incomplete Flush.\n");
688 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Complete.\n");
693 /* free extra memory */
697 free_irq(ha
->pcidev
->irq
, ha
);
701 ips_released_controllers
++;
706 /****************************************************************************/
708 /* Routine Name: ips_halt */
710 /* Routine Description: */
712 /* Perform cleanup when the system reboots */
714 /****************************************************************************/
716 ips_halt(struct notifier_block
*nb
, ulong event
, void *buf
)
722 if ((event
!= SYS_RESTART
) && (event
!= SYS_HALT
) &&
723 (event
!= SYS_POWER_OFF
))
724 return (NOTIFY_DONE
);
726 for (i
= 0; i
< ips_next_controller
; i
++) {
727 ha
= (ips_ha_t
*) ips_ha
[i
];
735 /* flush the cache on the controller */
736 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
738 ips_init_scb(ha
, scb
);
740 scb
->timeout
= ips_cmd_timeout
;
741 scb
->cdb
[0] = IPS_CMD_FLUSH
;
743 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
744 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
745 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
746 scb
->cmd
.flush_cache
.reserved
= 0;
747 scb
->cmd
.flush_cache
.reserved2
= 0;
748 scb
->cmd
.flush_cache
.reserved3
= 0;
749 scb
->cmd
.flush_cache
.reserved4
= 0;
751 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
, "Flushing Cache.\n");
754 if (ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_ON
) ==
756 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
757 "Incomplete Flush.\n");
759 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
760 "Flushing Complete.\n");
766 /****************************************************************************/
768 /* Routine Name: ips_eh_abort */
770 /* Routine Description: */
772 /* Abort a command (using the new error code stuff) */
773 /* Note: this routine is called under the io_request_lock */
774 /****************************************************************************/
775 int ips_eh_abort(struct scsi_cmnd
*SC
)
778 ips_copp_wait_item_t
*item
;
780 struct Scsi_Host
*host
;
782 METHOD_TRACE("ips_eh_abort", 1);
787 host
= SC
->device
->host
;
788 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
796 spin_lock(host
->host_lock
);
798 /* See if the command is on the copp queue */
799 item
= ha
->copp_waitlist
.head
;
800 while ((item
) && (item
->scsi_cmd
!= SC
))
805 ips_removeq_copp(&ha
->copp_waitlist
, item
);
808 /* See if the command is on the wait queue */
809 } else if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
810 /* command not sent yet */
813 /* command must have already been sent */
817 spin_unlock(host
->host_lock
);
821 /****************************************************************************/
823 /* Routine Name: ips_eh_reset */
825 /* Routine Description: */
827 /* Reset the controller (with new eh error code) */
829 /* NOTE: this routine is called under the io_request_lock spinlock */
831 /****************************************************************************/
832 static int __ips_eh_reset(struct scsi_cmnd
*SC
)
838 ips_copp_wait_item_t
*item
;
840 METHOD_TRACE("ips_eh_reset", 1);
847 DEBUG(1, "Reset called with NULL scsi command");
852 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
855 DEBUG(1, "Reset called with NULL ha struct");
863 /* See if the command is on the copp queue */
864 item
= ha
->copp_waitlist
.head
;
865 while ((item
) && (item
->scsi_cmd
!= SC
))
870 ips_removeq_copp(&ha
->copp_waitlist
, item
);
874 /* See if the command is on the wait queue */
875 if (ips_removeq_wait(&ha
->scb_waitlist
, SC
)) {
876 /* command not sent yet */
880 /* An explanation for the casual observer: */
881 /* Part of the function of a RAID controller is automatic error */
882 /* detection and recovery. As such, the only problem that physically */
883 /* resetting an adapter will ever fix is when, for some reason, */
884 /* the driver is not successfully communicating with the adapter. */
885 /* Therefore, we will attempt to flush this adapter. If that succeeds, */
886 /* then there's no real purpose in a physical reset. This will complete */
887 /* much faster and avoids any problems that might be caused by a */
888 /* physical reset ( such as having to fail all the outstanding I/O's ). */
890 if (ha
->ioctl_reset
== 0) { /* IF Not an IOCTL Requested Reset */
891 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
893 ips_init_scb(ha
, scb
);
895 scb
->timeout
= ips_cmd_timeout
;
896 scb
->cdb
[0] = IPS_CMD_FLUSH
;
898 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
899 scb
->cmd
.flush_cache
.command_id
= IPS_COMMAND_ID(ha
, scb
);
900 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
901 scb
->cmd
.flush_cache
.reserved
= 0;
902 scb
->cmd
.flush_cache
.reserved2
= 0;
903 scb
->cmd
.flush_cache
.reserved3
= 0;
904 scb
->cmd
.flush_cache
.reserved4
= 0;
906 /* Attempt the flush command */
907 ret
= ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_INTR_IORL
);
908 if (ret
== IPS_SUCCESS
) {
909 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
910 "Reset Request - Flushed Cache\n");
915 /* Either we can't communicate with the adapter or it's an IOCTL request */
916 /* from a utility. A physical reset is needed at this point. */
918 ha
->ioctl_reset
= 0; /* Reset the IOCTL Requested Reset Flag */
921 * command must have already been sent
922 * reset the controller
924 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
, "Resetting controller.\n");
925 ret
= (*ha
->func
.reset
) (ha
);
928 struct scsi_cmnd
*scsi_cmd
;
930 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
931 "Controller reset failed - controller now offline.\n");
933 /* Now fail all of the active commands */
934 DEBUG_VAR(1, "(%s%d) Failing active commands",
935 ips_name
, ha
->host_num
);
937 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
938 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
939 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
940 ips_freescb(ha
, scb
);
943 /* Now fail all of the pending commands */
944 DEBUG_VAR(1, "(%s%d) Failing pending commands",
945 ips_name
, ha
->host_num
);
947 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
948 scsi_cmd
->result
= DID_ERROR
;
949 scsi_cmd
->scsi_done(scsi_cmd
);
956 if (!ips_clear_adapter(ha
, IPS_INTR_IORL
)) {
957 struct scsi_cmnd
*scsi_cmd
;
959 IPS_PRINTK(KERN_NOTICE
, ha
->pcidev
,
960 "Controller reset failed - controller now offline.\n");
962 /* Now fail all of the active commands */
963 DEBUG_VAR(1, "(%s%d) Failing active commands",
964 ips_name
, ha
->host_num
);
966 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
967 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
968 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
969 ips_freescb(ha
, scb
);
972 /* Now fail all of the pending commands */
973 DEBUG_VAR(1, "(%s%d) Failing pending commands",
974 ips_name
, ha
->host_num
);
976 while ((scsi_cmd
= ips_removeq_wait_head(&ha
->scb_waitlist
))) {
977 scsi_cmd
->result
= DID_ERROR
<< 16;
978 scsi_cmd
->scsi_done(scsi_cmd
);
986 if (le32_to_cpu(ha
->subsys
->param
[3]) & 0x300000) {
987 ha
->last_ffdc
= ktime_get_real_seconds();
989 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
992 /* Now fail all of the active commands */
993 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name
, ha
->host_num
);
995 while ((scb
= ips_removeq_scb_head(&ha
->scb_activelist
))) {
996 scb
->scsi_cmd
->result
= DID_RESET
<< 16;
997 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
998 ips_freescb(ha
, scb
);
1001 /* Reset DCDB active command bits */
1002 for (i
= 1; i
< ha
->nbus
; i
++)
1003 ha
->dcdb_active
[i
- 1] = 0;
1005 /* Reset the number of active IOCTLs */
1008 ips_next(ha
, IPS_INTR_IORL
);
1011 #endif /* NO_IPS_RESET */
1015 static int ips_eh_reset(struct scsi_cmnd
*SC
)
1019 spin_lock_irq(SC
->device
->host
->host_lock
);
1020 rc
= __ips_eh_reset(SC
);
1021 spin_unlock_irq(SC
->device
->host
->host_lock
);
1026 /****************************************************************************/
1028 /* Routine Name: ips_queue */
1030 /* Routine Description: */
1032 /* Send a command to the controller */
1035 /* Linux obtains io_request_lock before calling this function */
1037 /****************************************************************************/
1038 static int ips_queue_lck(struct scsi_cmnd
*SC
, void (*done
) (struct scsi_cmnd
*))
1043 METHOD_TRACE("ips_queue", 1);
1045 ha
= (ips_ha_t
*) SC
->device
->host
->hostdata
;
1053 if (ips_is_passthru(SC
)) {
1054 if (ha
->copp_waitlist
.count
== IPS_MAX_IOCTL_QUEUE
) {
1055 SC
->result
= DID_BUS_BUSY
<< 16;
1060 } else if (ha
->scb_waitlist
.count
== IPS_MAX_QUEUE
) {
1061 SC
->result
= DID_BUS_BUSY
<< 16;
1067 SC
->scsi_done
= done
;
1069 DEBUG_VAR(2, "(%s%d): ips_queue: cmd 0x%X (%d %d %d)",
1073 SC
->device
->channel
, SC
->device
->id
, SC
->device
->lun
);
1075 /* Check for command to initiator IDs */
1076 if ((scmd_channel(SC
) > 0)
1077 && (scmd_id(SC
) == ha
->ha_id
[scmd_channel(SC
)])) {
1078 SC
->result
= DID_NO_CONNECT
<< 16;
1084 if (ips_is_passthru(SC
)) {
1086 ips_copp_wait_item_t
*scratch
;
1088 /* A Reset IOCTL is only sent by the boot CD in extreme cases. */
1089 /* There can never be any system activity ( network or disk ), but check */
1090 /* anyway just as a good practice. */
1091 pt
= (ips_passthru_t
*) scsi_sglist(SC
);
1092 if ((pt
->CoppCP
.cmd
.reset
.op_code
== IPS_CMD_RESET_CHANNEL
) &&
1093 (pt
->CoppCP
.cmd
.reset
.adapter_flag
== 1)) {
1094 if (ha
->scb_activelist
.count
!= 0) {
1095 SC
->result
= DID_BUS_BUSY
<< 16;
1099 ha
->ioctl_reset
= 1; /* This reset request is from an IOCTL */
1101 SC
->result
= DID_OK
<< 16;
1106 /* allocate space for the scribble */
1107 scratch
= kmalloc(sizeof (ips_copp_wait_item_t
), GFP_ATOMIC
);
1110 SC
->result
= DID_ERROR
<< 16;
1116 scratch
->scsi_cmd
= SC
;
1117 scratch
->next
= NULL
;
1119 ips_putq_copp_tail(&ha
->copp_waitlist
, scratch
);
1121 ips_putq_wait_tail(&ha
->scb_waitlist
, SC
);
1124 ips_next(ha
, IPS_INTR_IORL
);
1129 static DEF_SCSI_QCMD(ips_queue
)
1131 /****************************************************************************/
1133 /* Routine Name: ips_biosparam */
1135 /* Routine Description: */
1137 /* Set bios geometry for the controller */
1139 /****************************************************************************/
1140 static int ips_biosparam(struct scsi_device
*sdev
, struct block_device
*bdev
,
1141 sector_t capacity
, int geom
[])
1143 ips_ha_t
*ha
= (ips_ha_t
*) sdev
->host
->hostdata
;
1148 METHOD_TRACE("ips_biosparam", 1);
1151 /* ?!?! host adater info invalid */
1157 if (!ips_read_adapter_status(ha
, IPS_INTR_ON
))
1158 /* ?!?! Enquiry command failed */
1161 if ((capacity
> 0x400000) && ((ha
->enq
->ucMiscFlag
& 0x8) == 0)) {
1162 heads
= IPS_NORM_HEADS
;
1163 sectors
= IPS_NORM_SECTORS
;
1165 heads
= IPS_COMP_HEADS
;
1166 sectors
= IPS_COMP_SECTORS
;
1169 cylinders
= (unsigned long) capacity
/ (heads
* sectors
);
1171 DEBUG_VAR(2, "Geometry: heads: %d, sectors: %d, cylinders: %d",
1172 heads
, sectors
, cylinders
);
1176 geom
[2] = cylinders
;
1181 /****************************************************************************/
1183 /* Routine Name: ips_slave_configure */
1185 /* Routine Description: */
1187 /* Set queue depths on devices once scan is complete */
1189 /****************************************************************************/
1191 ips_slave_configure(struct scsi_device
* SDptr
)
1196 ha
= IPS_HA(SDptr
->host
);
1197 if (SDptr
->tagged_supported
&& SDptr
->type
== TYPE_DISK
) {
1198 min
= ha
->max_cmds
/ 2;
1199 if (ha
->enq
->ucLogDriveCount
<= 2)
1200 min
= ha
->max_cmds
- 1;
1201 scsi_change_queue_depth(SDptr
, min
);
1204 SDptr
->skip_ms_page_8
= 1;
1205 SDptr
->skip_ms_page_3f
= 1;
1209 /****************************************************************************/
1211 /* Routine Name: do_ipsintr */
1213 /* Routine Description: */
1215 /* Wrapper for the interrupt handler */
1217 /****************************************************************************/
1219 do_ipsintr(int irq
, void *dev_id
)
1222 struct Scsi_Host
*host
;
1225 METHOD_TRACE("do_ipsintr", 2);
1227 ha
= (ips_ha_t
*) dev_id
;
1230 host
= ips_sh
[ha
->host_num
];
1231 /* interrupt during initialization */
1233 (*ha
->func
.intr
) (ha
);
1237 spin_lock(host
->host_lock
);
1240 spin_unlock(host
->host_lock
);
1244 irqstatus
= (*ha
->func
.intr
) (ha
);
1246 spin_unlock(host
->host_lock
);
1248 /* start the next command */
1249 ips_next(ha
, IPS_INTR_ON
);
1250 return IRQ_RETVAL(irqstatus
);
1253 /****************************************************************************/
1255 /* Routine Name: ips_intr_copperhead */
1257 /* Routine Description: */
1259 /* Polling interrupt handler */
1261 /* ASSUMES interrupts are disabled */
1263 /****************************************************************************/
1265 ips_intr_copperhead(ips_ha_t
* ha
)
1272 METHOD_TRACE("ips_intr", 2);
1280 intrstatus
= (*ha
->func
.isintr
) (ha
);
1284 * Unexpected/Shared interrupt
1293 intrstatus
= (*ha
->func
.isintr
) (ha
);
1298 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1300 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1301 /* Spurious Interrupt ? */
1305 ips_chkstatus(ha
, &cstatus
);
1306 scb
= (ips_scb_t
*) sp
->scb_addr
;
1309 * use the callback function to finish things up
1310 * NOTE: interrupts are OFF for this
1312 (*scb
->callback
) (ha
, scb
);
1317 /****************************************************************************/
1319 /* Routine Name: ips_intr_morpheus */
1321 /* Routine Description: */
1323 /* Polling interrupt handler */
1325 /* ASSUMES interrupts are disabled */
1327 /****************************************************************************/
1329 ips_intr_morpheus(ips_ha_t
* ha
)
1336 METHOD_TRACE("ips_intr_morpheus", 2);
1344 intrstatus
= (*ha
->func
.isintr
) (ha
);
1348 * Unexpected/Shared interrupt
1357 intrstatus
= (*ha
->func
.isintr
) (ha
);
1362 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
1364 if (cstatus
.value
== 0xffffffff)
1365 /* No more to process */
1368 if (cstatus
.fields
.command_id
> (IPS_MAX_CMDS
- 1)) {
1369 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1370 "Spurious interrupt; no ccb.\n");
1375 ips_chkstatus(ha
, &cstatus
);
1376 scb
= (ips_scb_t
*) sp
->scb_addr
;
1379 * use the callback function to finish things up
1380 * NOTE: interrupts are OFF for this
1382 (*scb
->callback
) (ha
, scb
);
1387 /****************************************************************************/
1389 /* Routine Name: ips_info */
1391 /* Routine Description: */
1393 /* Return info about the driver */
1395 /****************************************************************************/
1397 ips_info(struct Scsi_Host
*SH
)
1399 static char buffer
[256];
1403 METHOD_TRACE("ips_info", 1);
1411 memset(bp
, 0, sizeof (buffer
));
1413 sprintf(bp
, "%s%s%s Build %d", "IBM PCI ServeRAID ",
1414 IPS_VERSION_HIGH
, IPS_VERSION_LOW
, IPS_BUILD_IDENT
);
1416 if (ha
->ad_type
> 0 && ha
->ad_type
<= MAX_ADAPTER_NAME
) {
1418 strcat(bp
, ips_adapter_name
[ha
->ad_type
- 1]);
1426 ips_write_info(struct Scsi_Host
*host
, char *buffer
, int length
)
1429 ips_ha_t
*ha
= NULL
;
1431 /* Find our host structure */
1432 for (i
= 0; i
< ips_next_controller
; i
++) {
1434 if (ips_sh
[i
] == host
) {
1435 ha
= (ips_ha_t
*) ips_sh
[i
]->hostdata
;
1448 ips_show_info(struct seq_file
*m
, struct Scsi_Host
*host
)
1451 ips_ha_t
*ha
= NULL
;
1453 /* Find our host structure */
1454 for (i
= 0; i
< ips_next_controller
; i
++) {
1456 if (ips_sh
[i
] == host
) {
1457 ha
= (ips_ha_t
*) ips_sh
[i
]->hostdata
;
1466 return ips_host_info(ha
, m
);
1469 /*--------------------------------------------------------------------------*/
1470 /* Helper Functions */
1471 /*--------------------------------------------------------------------------*/
1473 /****************************************************************************/
1475 /* Routine Name: ips_is_passthru */
1477 /* Routine Description: */
1479 /* Determine if the specified SCSI command is really a passthru command */
1481 /****************************************************************************/
1482 static int ips_is_passthru(struct scsi_cmnd
*SC
)
1484 unsigned long flags
;
1486 METHOD_TRACE("ips_is_passthru", 1);
1491 if ((SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) &&
1492 (SC
->device
->channel
== 0) &&
1493 (SC
->device
->id
== IPS_ADAPTER_ID
) &&
1494 (SC
->device
->lun
== 0) && scsi_sglist(SC
)) {
1495 struct scatterlist
*sg
= scsi_sglist(SC
);
1498 /* kmap_atomic() ensures addressability of the user buffer.*/
1499 /* local_irq_save() protects the KM_IRQ0 address slot. */
1500 local_irq_save(flags
);
1501 buffer
= kmap_atomic(sg_page(sg
)) + sg
->offset
;
1502 if (buffer
&& buffer
[0] == 'C' && buffer
[1] == 'O' &&
1503 buffer
[2] == 'P' && buffer
[3] == 'P') {
1504 kunmap_atomic(buffer
- sg
->offset
);
1505 local_irq_restore(flags
);
1508 kunmap_atomic(buffer
- sg
->offset
);
1509 local_irq_restore(flags
);
1514 /****************************************************************************/
1516 /* Routine Name: ips_alloc_passthru_buffer */
1518 /* Routine Description: */
1519 /* allocate a buffer large enough for the ioctl data if the ioctl buffer */
1520 /* is too small or doesn't exist */
1521 /****************************************************************************/
1523 ips_alloc_passthru_buffer(ips_ha_t
* ha
, int length
)
1526 dma_addr_t dma_busaddr
;
1528 if (ha
->ioctl_data
&& length
<= ha
->ioctl_len
)
1530 /* there is no buffer or it's not big enough, allocate a new one */
1531 bigger_buf
= dma_alloc_coherent(&ha
->pcidev
->dev
, length
, &dma_busaddr
,
1534 /* free the old memory */
1535 dma_free_coherent(&ha
->pcidev
->dev
, ha
->ioctl_len
,
1536 ha
->ioctl_data
, ha
->ioctl_busaddr
);
1537 /* use the new memory */
1538 ha
->ioctl_data
= (char *) bigger_buf
;
1539 ha
->ioctl_len
= length
;
1540 ha
->ioctl_busaddr
= dma_busaddr
;
1547 /****************************************************************************/
1549 /* Routine Name: ips_make_passthru */
1551 /* Routine Description: */
1553 /* Make a passthru command out of the info in the Scsi block */
1555 /****************************************************************************/
1557 ips_make_passthru(ips_ha_t
*ha
, struct scsi_cmnd
*SC
, ips_scb_t
*scb
, int intr
)
1562 struct scatterlist
*sg
= scsi_sglist(SC
);
1564 METHOD_TRACE("ips_make_passthru", 1);
1566 scsi_for_each_sg(SC
, sg
, scsi_sg_count(SC
), i
)
1567 length
+= sg
->length
;
1569 if (length
< sizeof (ips_passthru_t
)) {
1571 DEBUG_VAR(1, "(%s%d) Passthru structure wrong size",
1572 ips_name
, ha
->host_num
);
1573 return (IPS_FAILURE
);
1575 if (ips_alloc_passthru_buffer(ha
, length
)) {
1576 /* allocation failure! If ha->ioctl_data exists, use it to return
1577 some error codes. Return a failed command to the scsi layer. */
1578 if (ha
->ioctl_data
) {
1579 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1580 ips_scmd_buf_read(SC
, pt
, sizeof (ips_passthru_t
));
1581 pt
->BasicStatus
= 0x0B;
1582 pt
->ExtendedStatus
= 0x00;
1583 ips_scmd_buf_write(SC
, pt
, sizeof (ips_passthru_t
));
1587 ha
->ioctl_datasize
= length
;
1589 ips_scmd_buf_read(SC
, ha
->ioctl_data
, ha
->ioctl_datasize
);
1590 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1593 * Some notes about the passthru interface used
1595 * IF the scsi op_code == 0x0d then we assume
1596 * that the data came along with/goes with the
1597 * packet we received from the sg driver. In this
1598 * case the CmdBSize field of the pt structure is
1599 * used for the size of the buffer.
1602 switch (pt
->CoppCmd
) {
1604 memcpy(ha
->ioctl_data
+ sizeof (ips_passthru_t
),
1605 &ips_num_controllers
, sizeof (int));
1606 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1607 sizeof (ips_passthru_t
) + sizeof (int));
1608 SC
->result
= DID_OK
<< 16;
1610 return (IPS_SUCCESS_IMM
);
1612 case IPS_COPPUSRCMD
:
1613 case IPS_COPPIOCCMD
:
1614 if (SC
->cmnd
[0] == IPS_IOCTL_COMMAND
) {
1615 if (length
< (sizeof (ips_passthru_t
) + pt
->CmdBSize
)) {
1618 "(%s%d) Passthru structure wrong size",
1619 ips_name
, ha
->host_num
);
1621 return (IPS_FAILURE
);
1624 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
&&
1625 pt
->CoppCP
.cmd
.flashfw
.op_code
==
1626 IPS_CMD_RW_BIOSFW
) {
1627 ret
= ips_flash_copperhead(ha
, pt
, scb
);
1628 ips_scmd_buf_write(SC
, ha
->ioctl_data
,
1629 sizeof (ips_passthru_t
));
1632 if (ips_usrcmd(ha
, pt
, scb
))
1633 return (IPS_SUCCESS
);
1635 return (IPS_FAILURE
);
1642 return (IPS_FAILURE
);
1645 /****************************************************************************/
1646 /* Routine Name: ips_flash_copperhead */
1647 /* Routine Description: */
1648 /* Flash the BIOS/FW on a Copperhead style controller */
1649 /****************************************************************************/
1651 ips_flash_copperhead(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1655 /* Trombone is the only copperhead that can do packet flash, but only
1656 * for firmware. No one said it had to make sense. */
1657 if (IPS_IS_TROMBONE(ha
) && pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
) {
1658 if (ips_usrcmd(ha
, pt
, scb
))
1663 pt
->BasicStatus
= 0x0B;
1664 pt
->ExtendedStatus
= 0;
1665 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1666 /* IF it's OK to Use the "CD BOOT" Flash Buffer, then you can */
1667 /* avoid allocating a huge buffer per adapter ( which can fail ). */
1668 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1669 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1670 pt
->BasicStatus
= 0;
1671 return ips_flash_bios(ha
, pt
, scb
);
1672 } else if (pt
->CoppCP
.cmd
.flashfw
.packet_num
== 0) {
1673 if (ips_FlashData
&& !test_and_set_bit(0, &ips_FlashDataInUse
)){
1674 ha
->flash_data
= ips_FlashData
;
1675 ha
->flash_busaddr
= ips_flashbusaddr
;
1676 ha
->flash_len
= PAGE_SIZE
<< 7;
1677 ha
->flash_datasize
= 0;
1678 } else if (!ha
->flash_data
) {
1679 datasize
= pt
->CoppCP
.cmd
.flashfw
.total_packets
*
1680 pt
->CoppCP
.cmd
.flashfw
.count
;
1681 ha
->flash_data
= dma_alloc_coherent(&ha
->pcidev
->dev
,
1682 datasize
, &ha
->flash_busaddr
, GFP_KERNEL
);
1683 if (!ha
->flash_data
){
1684 printk(KERN_WARNING
"Unable to allocate a flash buffer\n");
1687 ha
->flash_datasize
= 0;
1688 ha
->flash_len
= datasize
;
1692 if (pt
->CoppCP
.cmd
.flashfw
.count
+ ha
->flash_datasize
>
1694 ips_free_flash_copperhead(ha
);
1695 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
1696 "failed size sanity check\n");
1700 if (!ha
->flash_data
)
1702 pt
->BasicStatus
= 0;
1703 memcpy(&ha
->flash_data
[ha
->flash_datasize
], pt
+ 1,
1704 pt
->CoppCP
.cmd
.flashfw
.count
);
1705 ha
->flash_datasize
+= pt
->CoppCP
.cmd
.flashfw
.count
;
1706 if (pt
->CoppCP
.cmd
.flashfw
.packet_num
==
1707 pt
->CoppCP
.cmd
.flashfw
.total_packets
- 1) {
1708 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
)
1709 return ips_flash_bios(ha
, pt
, scb
);
1710 else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
)
1711 return ips_flash_firmware(ha
, pt
, scb
);
1713 return IPS_SUCCESS_IMM
;
1716 /****************************************************************************/
1717 /* Routine Name: ips_flash_bios */
1718 /* Routine Description: */
1719 /* flashes the bios of a copperhead adapter */
1720 /****************************************************************************/
1722 ips_flash_bios(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1725 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1726 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_BIOS
) {
1727 if ((!ha
->func
.programbios
) || (!ha
->func
.erasebios
) ||
1728 (!ha
->func
.verifybios
))
1730 if ((*ha
->func
.erasebios
) (ha
)) {
1732 "(%s%d) flash bios failed - unable to erase flash",
1733 ips_name
, ha
->host_num
);
1736 if ((*ha
->func
.programbios
) (ha
,
1739 ha
->flash_datasize
-
1740 IPS_BIOS_HEADER
, 0)) {
1742 "(%s%d) flash bios failed - unable to flash",
1743 ips_name
, ha
->host_num
);
1746 if ((*ha
->func
.verifybios
) (ha
,
1749 ha
->flash_datasize
-
1750 IPS_BIOS_HEADER
, 0)) {
1752 "(%s%d) flash bios failed - unable to verify flash",
1753 ips_name
, ha
->host_num
);
1756 ips_free_flash_copperhead(ha
);
1757 return IPS_SUCCESS_IMM
;
1758 } else if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_BIOS_IMAGE
&&
1759 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_ERASE_BIOS
) {
1760 if (!ha
->func
.erasebios
)
1762 if ((*ha
->func
.erasebios
) (ha
)) {
1764 "(%s%d) flash bios failed - unable to erase flash",
1765 ips_name
, ha
->host_num
);
1768 return IPS_SUCCESS_IMM
;
1771 pt
->BasicStatus
= 0x0B;
1772 pt
->ExtendedStatus
= 0x00;
1773 ips_free_flash_copperhead(ha
);
1777 /****************************************************************************/
1779 /* Routine Name: ips_fill_scb_sg_single */
1781 /* Routine Description: */
1782 /* Fill in a single scb sg_list element from an address */
1783 /* return a -1 if a breakup occurred */
1784 /****************************************************************************/
1786 ips_fill_scb_sg_single(ips_ha_t
* ha
, dma_addr_t busaddr
,
1787 ips_scb_t
* scb
, int indx
, unsigned int e_len
)
1792 if ((scb
->data_len
+ e_len
) > ha
->max_xfer
) {
1793 e_len
= ha
->max_xfer
- scb
->data_len
;
1794 scb
->breakup
= indx
;
1801 if (IPS_USE_ENH_SGLIST(ha
)) {
1802 scb
->sg_list
.enh_list
[indx
].address_lo
=
1803 cpu_to_le32(lower_32_bits(busaddr
));
1804 scb
->sg_list
.enh_list
[indx
].address_hi
=
1805 cpu_to_le32(upper_32_bits(busaddr
));
1806 scb
->sg_list
.enh_list
[indx
].length
= cpu_to_le32(e_len
);
1808 scb
->sg_list
.std_list
[indx
].address
=
1809 cpu_to_le32(lower_32_bits(busaddr
));
1810 scb
->sg_list
.std_list
[indx
].length
= cpu_to_le32(e_len
);
1814 scb
->data_len
+= e_len
;
1818 /****************************************************************************/
1819 /* Routine Name: ips_flash_firmware */
1820 /* Routine Description: */
1821 /* flashes the firmware of a copperhead adapter */
1822 /****************************************************************************/
1824 ips_flash_firmware(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1826 IPS_SG_LIST sg_list
;
1827 uint32_t cmd_busaddr
;
1829 if (pt
->CoppCP
.cmd
.flashfw
.type
== IPS_FW_IMAGE
&&
1830 pt
->CoppCP
.cmd
.flashfw
.direction
== IPS_WRITE_FW
) {
1831 memset(&pt
->CoppCP
.cmd
, 0, sizeof (IPS_HOST_COMMAND
));
1832 pt
->CoppCP
.cmd
.flashfw
.op_code
= IPS_CMD_DOWNLOAD
;
1833 pt
->CoppCP
.cmd
.flashfw
.count
= cpu_to_le32(ha
->flash_datasize
);
1835 pt
->BasicStatus
= 0x0B;
1836 pt
->ExtendedStatus
= 0x00;
1837 ips_free_flash_copperhead(ha
);
1840 /* Save the S/G list pointer so it doesn't get clobbered */
1841 sg_list
.list
= scb
->sg_list
.list
;
1842 cmd_busaddr
= scb
->scb_busaddr
;
1843 /* copy in the CP */
1844 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1845 /* FIX stuff that might be wrong */
1846 scb
->sg_list
.list
= sg_list
.list
;
1847 scb
->scb_busaddr
= cmd_busaddr
;
1848 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1849 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1850 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1855 scb
->callback
= ipsintr_done
;
1856 scb
->timeout
= ips_cmd_timeout
;
1858 scb
->data_len
= ha
->flash_datasize
;
1860 dma_map_single(&ha
->pcidev
->dev
, ha
->flash_data
, scb
->data_len
,
1862 scb
->flags
|= IPS_SCB_MAP_SINGLE
;
1863 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1864 scb
->cmd
.flashfw
.buffer_addr
= cpu_to_le32(scb
->data_busaddr
);
1866 scb
->timeout
= pt
->TimeOut
;
1867 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1871 /****************************************************************************/
1872 /* Routine Name: ips_free_flash_copperhead */
1873 /* Routine Description: */
1874 /* release the memory resources used to hold the flash image */
1875 /****************************************************************************/
1877 ips_free_flash_copperhead(ips_ha_t
* ha
)
1879 if (ha
->flash_data
== ips_FlashData
)
1880 test_and_clear_bit(0, &ips_FlashDataInUse
);
1881 else if (ha
->flash_data
)
1882 dma_free_coherent(&ha
->pcidev
->dev
, ha
->flash_len
,
1883 ha
->flash_data
, ha
->flash_busaddr
);
1884 ha
->flash_data
= NULL
;
1887 /****************************************************************************/
1889 /* Routine Name: ips_usrcmd */
1891 /* Routine Description: */
1893 /* Process a user command and make it ready to send */
1895 /****************************************************************************/
1897 ips_usrcmd(ips_ha_t
* ha
, ips_passthru_t
* pt
, ips_scb_t
* scb
)
1899 IPS_SG_LIST sg_list
;
1900 uint32_t cmd_busaddr
;
1902 METHOD_TRACE("ips_usrcmd", 1);
1904 if ((!scb
) || (!pt
) || (!ha
))
1907 /* Save the S/G list pointer so it doesn't get clobbered */
1908 sg_list
.list
= scb
->sg_list
.list
;
1909 cmd_busaddr
= scb
->scb_busaddr
;
1910 /* copy in the CP */
1911 memcpy(&scb
->cmd
, &pt
->CoppCP
.cmd
, sizeof (IPS_IOCTL_CMD
));
1912 memcpy(&scb
->dcdb
, &pt
->CoppCP
.dcdb
, sizeof (IPS_DCDB_TABLE
));
1914 /* FIX stuff that might be wrong */
1915 scb
->sg_list
.list
= sg_list
.list
;
1916 scb
->scb_busaddr
= cmd_busaddr
;
1917 scb
->bus
= scb
->scsi_cmd
->device
->channel
;
1918 scb
->target_id
= scb
->scsi_cmd
->device
->id
;
1919 scb
->lun
= scb
->scsi_cmd
->device
->lun
;
1924 scb
->callback
= ipsintr_done
;
1925 scb
->timeout
= ips_cmd_timeout
;
1926 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
1928 /* we don't support DCDB/READ/WRITE Scatter Gather */
1929 if ((scb
->cmd
.basic_io
.op_code
== IPS_CMD_READ_SG
) ||
1930 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_WRITE_SG
) ||
1931 (scb
->cmd
.basic_io
.op_code
== IPS_CMD_DCDB_SG
))
1935 scb
->data_len
= pt
->CmdBSize
;
1936 scb
->data_busaddr
= ha
->ioctl_busaddr
+ sizeof (ips_passthru_t
);
1938 scb
->data_busaddr
= 0L;
1941 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1942 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
1943 (unsigned long) &scb
->
1945 (unsigned long) scb
);
1948 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
)
1949 scb
->dcdb
.buffer_pointer
=
1950 cpu_to_le32(scb
->data_busaddr
);
1952 scb
->cmd
.basic_io
.sg_addr
=
1953 cpu_to_le32(scb
->data_busaddr
);
1958 scb
->timeout
= pt
->TimeOut
;
1960 if (pt
->TimeOut
<= 10)
1961 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
;
1962 else if (pt
->TimeOut
<= 60)
1963 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
;
1965 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
;
1968 /* assume success */
1969 scb
->scsi_cmd
->result
= DID_OK
<< 16;
1975 /****************************************************************************/
1977 /* Routine Name: ips_cleanup_passthru */
1979 /* Routine Description: */
1981 /* Cleanup after a passthru command */
1983 /****************************************************************************/
1985 ips_cleanup_passthru(ips_ha_t
* ha
, ips_scb_t
* scb
)
1989 METHOD_TRACE("ips_cleanup_passthru", 1);
1991 if ((!scb
) || (!scb
->scsi_cmd
) || (!scsi_sglist(scb
->scsi_cmd
))) {
1992 DEBUG_VAR(1, "(%s%d) couldn't cleanup after passthru",
1993 ips_name
, ha
->host_num
);
1997 pt
= (ips_passthru_t
*) ha
->ioctl_data
;
1999 /* Copy data back to the user */
2000 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB
) /* Copy DCDB Back to Caller's Area */
2001 memcpy(&pt
->CoppCP
.dcdb
, &scb
->dcdb
, sizeof (IPS_DCDB_TABLE
));
2003 pt
->BasicStatus
= scb
->basic_status
;
2004 pt
->ExtendedStatus
= scb
->extended_status
;
2005 pt
->AdapterType
= ha
->ad_type
;
2007 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
&&
2008 (scb
->cmd
.flashfw
.op_code
== IPS_CMD_DOWNLOAD
||
2009 scb
->cmd
.flashfw
.op_code
== IPS_CMD_RW_BIOSFW
))
2010 ips_free_flash_copperhead(ha
);
2012 ips_scmd_buf_write(scb
->scsi_cmd
, ha
->ioctl_data
, ha
->ioctl_datasize
);
2015 /****************************************************************************/
2017 /* Routine Name: ips_host_info */
2019 /* Routine Description: */
2021 /* The passthru interface for the driver */
2023 /****************************************************************************/
2025 ips_host_info(ips_ha_t
*ha
, struct seq_file
*m
)
2027 METHOD_TRACE("ips_host_info", 1);
2029 seq_puts(m
, "\nIBM ServeRAID General Information:\n\n");
2031 if ((le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) &&
2032 (le16_to_cpu(ha
->nvram
->adapter_type
) != 0))
2033 seq_printf(m
, "\tController Type : %s\n",
2034 ips_adapter_name
[ha
->ad_type
- 1]);
2036 seq_puts(m
, "\tController Type : Unknown\n");
2040 "\tIO region : 0x%x (%d bytes)\n",
2041 ha
->io_addr
, ha
->io_len
);
2045 "\tMemory region : 0x%x (%d bytes)\n",
2046 ha
->mem_addr
, ha
->mem_len
);
2048 "\tShared memory address : 0x%lx\n",
2049 (unsigned long)ha
->mem_ptr
);
2052 seq_printf(m
, "\tIRQ number : %d\n", ha
->pcidev
->irq
);
2054 /* For the Next 3 lines Check for Binary 0 at the end and don't include it if it's there. */
2055 /* That keeps everything happy for "text" operations on the proc file. */
2057 if (le32_to_cpu(ha
->nvram
->signature
) == IPS_NVRAM_P5_SIG
) {
2058 if (ha
->nvram
->bios_low
[3] == 0) {
2060 "\tBIOS Version : %c%c%c%c%c%c%c\n",
2061 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2062 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2063 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2064 ha
->nvram
->bios_low
[2]);
2068 "\tBIOS Version : %c%c%c%c%c%c%c%c\n",
2069 ha
->nvram
->bios_high
[0], ha
->nvram
->bios_high
[1],
2070 ha
->nvram
->bios_high
[2], ha
->nvram
->bios_high
[3],
2071 ha
->nvram
->bios_low
[0], ha
->nvram
->bios_low
[1],
2072 ha
->nvram
->bios_low
[2], ha
->nvram
->bios_low
[3]);
2077 if (ha
->enq
->CodeBlkVersion
[7] == 0) {
2079 "\tFirmware Version : %c%c%c%c%c%c%c\n",
2080 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2081 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2082 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2083 ha
->enq
->CodeBlkVersion
[6]);
2086 "\tFirmware Version : %c%c%c%c%c%c%c%c\n",
2087 ha
->enq
->CodeBlkVersion
[0], ha
->enq
->CodeBlkVersion
[1],
2088 ha
->enq
->CodeBlkVersion
[2], ha
->enq
->CodeBlkVersion
[3],
2089 ha
->enq
->CodeBlkVersion
[4], ha
->enq
->CodeBlkVersion
[5],
2090 ha
->enq
->CodeBlkVersion
[6], ha
->enq
->CodeBlkVersion
[7]);
2093 if (ha
->enq
->BootBlkVersion
[7] == 0) {
2095 "\tBoot Block Version : %c%c%c%c%c%c%c\n",
2096 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2097 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2098 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2099 ha
->enq
->BootBlkVersion
[6]);
2102 "\tBoot Block Version : %c%c%c%c%c%c%c%c\n",
2103 ha
->enq
->BootBlkVersion
[0], ha
->enq
->BootBlkVersion
[1],
2104 ha
->enq
->BootBlkVersion
[2], ha
->enq
->BootBlkVersion
[3],
2105 ha
->enq
->BootBlkVersion
[4], ha
->enq
->BootBlkVersion
[5],
2106 ha
->enq
->BootBlkVersion
[6], ha
->enq
->BootBlkVersion
[7]);
2109 seq_printf(m
, "\tDriver Version : %s%s\n",
2110 IPS_VERSION_HIGH
, IPS_VERSION_LOW
);
2112 seq_printf(m
, "\tDriver Build : %d\n",
2115 seq_printf(m
, "\tMax Physical Devices : %d\n",
2116 ha
->enq
->ucMaxPhysicalDevices
);
2117 seq_printf(m
, "\tMax Active Commands : %d\n",
2119 seq_printf(m
, "\tCurrent Queued Commands : %d\n",
2120 ha
->scb_waitlist
.count
);
2121 seq_printf(m
, "\tCurrent Active Commands : %d\n",
2122 ha
->scb_activelist
.count
- ha
->num_ioctl
);
2123 seq_printf(m
, "\tCurrent Queued PT Commands : %d\n",
2124 ha
->copp_waitlist
.count
);
2125 seq_printf(m
, "\tCurrent Active PT Commands : %d\n",
2133 /****************************************************************************/
2135 /* Routine Name: ips_identify_controller */
2137 /* Routine Description: */
2139 /* Identify this controller */
2141 /****************************************************************************/
2143 ips_identify_controller(ips_ha_t
* ha
)
2145 METHOD_TRACE("ips_identify_controller", 1);
2147 switch (ha
->pcidev
->device
) {
2148 case IPS_DEVICEID_COPPERHEAD
:
2149 if (ha
->pcidev
->revision
<= IPS_REVID_SERVERAID
) {
2150 ha
->ad_type
= IPS_ADTYPE_SERVERAID
;
2151 } else if (ha
->pcidev
->revision
== IPS_REVID_SERVERAID2
) {
2152 ha
->ad_type
= IPS_ADTYPE_SERVERAID2
;
2153 } else if (ha
->pcidev
->revision
== IPS_REVID_NAVAJO
) {
2154 ha
->ad_type
= IPS_ADTYPE_NAVAJO
;
2155 } else if ((ha
->pcidev
->revision
== IPS_REVID_SERVERAID2
)
2156 && (ha
->slot_num
== 0)) {
2157 ha
->ad_type
= IPS_ADTYPE_KIOWA
;
2158 } else if ((ha
->pcidev
->revision
>= IPS_REVID_CLARINETP1
) &&
2159 (ha
->pcidev
->revision
<= IPS_REVID_CLARINETP3
)) {
2160 if (ha
->enq
->ucMaxPhysicalDevices
== 15)
2161 ha
->ad_type
= IPS_ADTYPE_SERVERAID3L
;
2163 ha
->ad_type
= IPS_ADTYPE_SERVERAID3
;
2164 } else if ((ha
->pcidev
->revision
>= IPS_REVID_TROMBONE32
) &&
2165 (ha
->pcidev
->revision
<= IPS_REVID_TROMBONE64
)) {
2166 ha
->ad_type
= IPS_ADTYPE_SERVERAID4H
;
2170 case IPS_DEVICEID_MORPHEUS
:
2171 switch (ha
->pcidev
->subsystem_device
) {
2172 case IPS_SUBDEVICEID_4L
:
2173 ha
->ad_type
= IPS_ADTYPE_SERVERAID4L
;
2176 case IPS_SUBDEVICEID_4M
:
2177 ha
->ad_type
= IPS_ADTYPE_SERVERAID4M
;
2180 case IPS_SUBDEVICEID_4MX
:
2181 ha
->ad_type
= IPS_ADTYPE_SERVERAID4MX
;
2184 case IPS_SUBDEVICEID_4LX
:
2185 ha
->ad_type
= IPS_ADTYPE_SERVERAID4LX
;
2188 case IPS_SUBDEVICEID_5I2
:
2189 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I2
;
2192 case IPS_SUBDEVICEID_5I1
:
2193 ha
->ad_type
= IPS_ADTYPE_SERVERAID5I1
;
2199 case IPS_DEVICEID_MARCO
:
2200 switch (ha
->pcidev
->subsystem_device
) {
2201 case IPS_SUBDEVICEID_6M
:
2202 ha
->ad_type
= IPS_ADTYPE_SERVERAID6M
;
2204 case IPS_SUBDEVICEID_6I
:
2205 ha
->ad_type
= IPS_ADTYPE_SERVERAID6I
;
2207 case IPS_SUBDEVICEID_7k
:
2208 ha
->ad_type
= IPS_ADTYPE_SERVERAID7k
;
2210 case IPS_SUBDEVICEID_7M
:
2211 ha
->ad_type
= IPS_ADTYPE_SERVERAID7M
;
2218 /****************************************************************************/
2220 /* Routine Name: ips_get_bios_version */
2222 /* Routine Description: */
2224 /* Get the BIOS revision number */
2226 /****************************************************************************/
2228 ips_get_bios_version(ips_ha_t
* ha
, int intr
)
2237 METHOD_TRACE("ips_get_bios_version", 1);
2242 memcpy(ha
->bios_version
, " ?", 8);
2244 if (ha
->pcidev
->device
== IPS_DEVICEID_COPPERHEAD
) {
2245 if (IPS_USE_MEMIO(ha
)) {
2246 /* Memory Mapped I/O */
2249 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
2250 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2251 udelay(25); /* 25 us */
2253 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
2256 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
2257 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2258 udelay(25); /* 25 us */
2260 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
2263 /* Get Major version */
2264 writel(0x1FF, ha
->mem_ptr
+ IPS_REG_FLAP
);
2265 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2266 udelay(25); /* 25 us */
2268 major
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2270 /* Get Minor version */
2271 writel(0x1FE, ha
->mem_ptr
+ IPS_REG_FLAP
);
2272 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2273 udelay(25); /* 25 us */
2274 minor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2276 /* Get SubMinor version */
2277 writel(0x1FD, ha
->mem_ptr
+ IPS_REG_FLAP
);
2278 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2279 udelay(25); /* 25 us */
2280 subminor
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
2283 /* Programmed I/O */
2286 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
2287 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2288 udelay(25); /* 25 us */
2290 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
2293 outl(1, ha
->io_addr
+ IPS_REG_FLAP
);
2294 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2295 udelay(25); /* 25 us */
2297 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
2300 /* Get Major version */
2301 outl(0x1FF, ha
->io_addr
+ IPS_REG_FLAP
);
2302 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2303 udelay(25); /* 25 us */
2305 major
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2307 /* Get Minor version */
2308 outl(0x1FE, ha
->io_addr
+ IPS_REG_FLAP
);
2309 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2310 udelay(25); /* 25 us */
2312 minor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2314 /* Get SubMinor version */
2315 outl(0x1FD, ha
->io_addr
+ IPS_REG_FLAP
);
2316 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
2317 udelay(25); /* 25 us */
2319 subminor
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
2323 /* Morpheus Family - Send Command to the card */
2325 buffer
= ha
->ioctl_data
;
2327 memset(buffer
, 0, 0x1000);
2329 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
2331 ips_init_scb(ha
, scb
);
2333 scb
->timeout
= ips_cmd_timeout
;
2334 scb
->cdb
[0] = IPS_CMD_RW_BIOSFW
;
2336 scb
->cmd
.flashfw
.op_code
= IPS_CMD_RW_BIOSFW
;
2337 scb
->cmd
.flashfw
.command_id
= IPS_COMMAND_ID(ha
, scb
);
2338 scb
->cmd
.flashfw
.type
= 1;
2339 scb
->cmd
.flashfw
.direction
= 0;
2340 scb
->cmd
.flashfw
.count
= cpu_to_le32(0x800);
2341 scb
->cmd
.flashfw
.total_packets
= 1;
2342 scb
->cmd
.flashfw
.packet_num
= 0;
2343 scb
->data_len
= 0x1000;
2344 scb
->cmd
.flashfw
.buffer_addr
= ha
->ioctl_busaddr
;
2346 /* issue the command */
2348 ips_send_wait(ha
, scb
, ips_cmd_timeout
,
2349 intr
)) == IPS_FAILURE
)
2350 || (ret
== IPS_SUCCESS_IMM
)
2351 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
2352 /* Error occurred */
2357 if ((buffer
[0xC0] == 0x55) && (buffer
[0xC1] == 0xAA)) {
2358 major
= buffer
[0x1ff + 0xC0]; /* Offset 0x1ff after the header (0xc0) */
2359 minor
= buffer
[0x1fe + 0xC0]; /* Offset 0x1fe after the header (0xc0) */
2360 subminor
= buffer
[0x1fd + 0xC0]; /* Offset 0x1fd after the header (0xc0) */
2366 ha
->bios_version
[0] = hex_asc_upper_hi(major
);
2367 ha
->bios_version
[1] = '.';
2368 ha
->bios_version
[2] = hex_asc_upper_lo(major
);
2369 ha
->bios_version
[3] = hex_asc_upper_lo(subminor
);
2370 ha
->bios_version
[4] = '.';
2371 ha
->bios_version
[5] = hex_asc_upper_hi(minor
);
2372 ha
->bios_version
[6] = hex_asc_upper_lo(minor
);
2373 ha
->bios_version
[7] = 0;
2376 /****************************************************************************/
2378 /* Routine Name: ips_hainit */
2380 /* Routine Description: */
2382 /* Initialize the controller */
2384 /* NOTE: Assumes to be called from with a lock */
2386 /****************************************************************************/
2388 ips_hainit(ips_ha_t
* ha
)
2392 METHOD_TRACE("ips_hainit", 1);
2397 if (ha
->func
.statinit
)
2398 (*ha
->func
.statinit
) (ha
);
2400 if (ha
->func
.enableint
)
2401 (*ha
->func
.enableint
) (ha
);
2404 ha
->reset_count
= 1;
2405 ha
->last_ffdc
= ktime_get_real_seconds();
2406 ips_ffdc_reset(ha
, IPS_INTR_IORL
);
2408 if (!ips_read_config(ha
, IPS_INTR_IORL
)) {
2409 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2410 "unable to read config from controller.\n");
2415 if (!ips_read_adapter_status(ha
, IPS_INTR_IORL
)) {
2416 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2417 "unable to read controller status.\n");
2422 /* Identify this controller */
2423 ips_identify_controller(ha
);
2425 if (!ips_read_subsystem_parameters(ha
, IPS_INTR_IORL
)) {
2426 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2427 "unable to read subsystem parameters.\n");
2432 /* write nvram user page 5 */
2433 if (!ips_write_driver_status(ha
, IPS_INTR_IORL
)) {
2434 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
2435 "unable to write driver info to controller.\n");
2440 /* If there are Logical Drives and a Reset Occurred, then an EraseStripeLock is Needed */
2441 if ((ha
->conf
->ucLogDriveCount
> 0) && (ha
->requires_esl
== 1))
2442 ips_clear_adapter(ha
, IPS_INTR_IORL
);
2444 /* set limits on SID, LUN, BUS */
2445 ha
->ntargets
= IPS_MAX_TARGETS
+ 1;
2447 ha
->nbus
= (ha
->enq
->ucMaxPhysicalDevices
/ IPS_MAX_TARGETS
) + 1;
2449 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2451 ha
->max_xfer
= 0x10000;
2455 ha
->max_xfer
= 0x20000;
2459 ha
->max_xfer
= 0x40000;
2464 ha
->max_xfer
= 0x80000;
2468 /* setup max concurrent commands */
2469 if (le32_to_cpu(ha
->subsys
->param
[4]) & 0x1) {
2470 /* Use the new method */
2471 ha
->max_cmds
= ha
->enq
->ucConcurrentCmdCount
;
2473 /* use the old method */
2474 switch (ha
->conf
->logical_drive
[0].ucStripeSize
) {
2494 /* Limit the Active Commands on a Lite Adapter */
2495 if ((ha
->ad_type
== IPS_ADTYPE_SERVERAID3L
) ||
2496 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4L
) ||
2497 (ha
->ad_type
== IPS_ADTYPE_SERVERAID4LX
)) {
2498 if ((ha
->max_cmds
> MaxLiteCmds
) && (MaxLiteCmds
))
2499 ha
->max_cmds
= MaxLiteCmds
;
2502 /* set controller IDs */
2503 ha
->ha_id
[0] = IPS_ADAPTER_ID
;
2504 for (i
= 1; i
< ha
->nbus
; i
++) {
2505 ha
->ha_id
[i
] = ha
->conf
->init_id
[i
- 1] & 0x1f;
2506 ha
->dcdb_active
[i
- 1] = 0;
2512 /****************************************************************************/
2514 /* Routine Name: ips_next */
2516 /* Routine Description: */
2518 /* Take the next command off the queue and send it to the controller */
2520 /****************************************************************************/
2522 ips_next(ips_ha_t
* ha
, int intr
)
2525 struct scsi_cmnd
*SC
;
2526 struct scsi_cmnd
*p
;
2527 struct scsi_cmnd
*q
;
2528 ips_copp_wait_item_t
*item
;
2530 struct Scsi_Host
*host
;
2531 METHOD_TRACE("ips_next", 1);
2535 host
= ips_sh
[ha
->host_num
];
2537 * Block access to the queue function so
2538 * this command won't time out
2540 if (intr
== IPS_INTR_ON
)
2541 spin_lock(host
->host_lock
);
2543 if ((ha
->subsys
->param
[3] & 0x300000)
2544 && (ha
->scb_activelist
.count
== 0)) {
2545 time64_t now
= ktime_get_real_seconds();
2546 if (now
- ha
->last_ffdc
> IPS_SECS_8HOURS
) {
2547 ha
->last_ffdc
= now
;
2553 * Send passthru commands
2554 * These have priority over normal I/O
2555 * but shouldn't affect performance too much
2556 * since we limit the number that can be active
2557 * on the card at any one time
2559 while ((ha
->num_ioctl
< IPS_MAX_IOCTL
) &&
2560 (ha
->copp_waitlist
.head
) && (scb
= ips_getscb(ha
))) {
2562 item
= ips_removeq_copp_head(&ha
->copp_waitlist
);
2564 if (intr
== IPS_INTR_ON
)
2565 spin_unlock(host
->host_lock
);
2566 scb
->scsi_cmd
= item
->scsi_cmd
;
2569 ret
= ips_make_passthru(ha
, scb
->scsi_cmd
, scb
, intr
);
2571 if (intr
== IPS_INTR_ON
)
2572 spin_lock(host
->host_lock
);
2575 if (scb
->scsi_cmd
) {
2576 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2577 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2580 ips_freescb(ha
, scb
);
2582 case IPS_SUCCESS_IMM
:
2583 if (scb
->scsi_cmd
) {
2584 scb
->scsi_cmd
->result
= DID_OK
<< 16;
2585 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2588 ips_freescb(ha
, scb
);
2594 if (ret
!= IPS_SUCCESS
) {
2599 ret
= ips_send_cmd(ha
, scb
);
2601 if (ret
== IPS_SUCCESS
)
2602 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2608 if (scb
->scsi_cmd
) {
2609 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2612 ips_freescb(ha
, scb
);
2614 case IPS_SUCCESS_IMM
:
2615 ips_freescb(ha
, scb
);
2624 * Send "Normal" I/O commands
2627 p
= ha
->scb_waitlist
.head
;
2628 while ((p
) && (scb
= ips_getscb(ha
))) {
2629 if ((scmd_channel(p
) > 0)
2631 dcdb_active
[scmd_channel(p
) -
2632 1] & (1 << scmd_id(p
)))) {
2633 ips_freescb(ha
, scb
);
2634 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2639 SC
= ips_removeq_wait(&ha
->scb_waitlist
, q
);
2641 if (intr
== IPS_INTR_ON
)
2642 spin_unlock(host
->host_lock
); /* Unlock HA after command is taken off queue */
2644 SC
->result
= DID_OK
;
2645 SC
->host_scribble
= NULL
;
2647 scb
->target_id
= SC
->device
->id
;
2648 scb
->lun
= SC
->device
->lun
;
2649 scb
->bus
= SC
->device
->channel
;
2653 scb
->callback
= ipsintr_done
;
2654 scb
->timeout
= ips_cmd_timeout
;
2655 memset(&scb
->cmd
, 0, 16);
2657 /* copy in the CDB */
2658 memcpy(scb
->cdb
, SC
->cmnd
, SC
->cmd_len
);
2660 scb
->sg_count
= scsi_dma_map(SC
);
2661 BUG_ON(scb
->sg_count
< 0);
2662 if (scb
->sg_count
) {
2663 struct scatterlist
*sg
;
2666 scb
->flags
|= IPS_SCB_MAP_SG
;
2668 scsi_for_each_sg(SC
, sg
, scb
->sg_count
, i
) {
2669 if (ips_fill_scb_sg_single
2670 (ha
, sg_dma_address(sg
), scb
, i
,
2671 sg_dma_len(sg
)) < 0)
2674 scb
->dcdb
.transfer_length
= scb
->data_len
;
2676 scb
->data_busaddr
= 0L;
2679 scb
->dcdb
.transfer_length
= 0;
2682 scb
->dcdb
.cmd_attribute
=
2683 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
2685 /* Allow a WRITE BUFFER Command to Have no Data */
2686 /* This is Used by Tape Flash Utilites */
2687 if ((scb
->scsi_cmd
->cmnd
[0] == WRITE_BUFFER
) &&
2688 (scb
->data_len
== 0))
2689 scb
->dcdb
.cmd_attribute
= 0;
2691 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
2692 scb
->dcdb
.transfer_length
= 0;
2694 if (scb
->data_len
>= IPS_MAX_XFER
) {
2695 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
2696 scb
->dcdb
.transfer_length
= 0;
2698 if (intr
== IPS_INTR_ON
)
2699 spin_lock(host
->host_lock
);
2701 ret
= ips_send_cmd(ha
, scb
);
2705 ips_putq_scb_head(&ha
->scb_activelist
, scb
);
2708 if (scb
->scsi_cmd
) {
2709 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
2710 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2714 ha
->dcdb_active
[scb
->bus
- 1] &=
2715 ~(1 << scb
->target_id
);
2717 ips_freescb(ha
, scb
);
2719 case IPS_SUCCESS_IMM
:
2721 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
2724 ha
->dcdb_active
[scb
->bus
- 1] &=
2725 ~(1 << scb
->target_id
);
2727 ips_freescb(ha
, scb
);
2733 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2737 if (intr
== IPS_INTR_ON
)
2738 spin_unlock(host
->host_lock
);
2741 /****************************************************************************/
2743 /* Routine Name: ips_putq_scb_head */
2745 /* Routine Description: */
2747 /* Add an item to the head of the queue */
2749 /* ASSUMED to be called from within the HA lock */
2751 /****************************************************************************/
2753 ips_putq_scb_head(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2755 METHOD_TRACE("ips_putq_scb_head", 1);
2760 item
->q_next
= queue
->head
;
2769 /****************************************************************************/
2771 /* Routine Name: ips_removeq_scb_head */
2773 /* Routine Description: */
2775 /* Remove the head of the queue */
2777 /* ASSUMED to be called from within the HA lock */
2779 /****************************************************************************/
2781 ips_removeq_scb_head(ips_scb_queue_t
* queue
)
2785 METHOD_TRACE("ips_removeq_scb_head", 1);
2793 queue
->head
= item
->q_next
;
2794 item
->q_next
= NULL
;
2796 if (queue
->tail
== item
)
2804 /****************************************************************************/
2806 /* Routine Name: ips_removeq_scb */
2808 /* Routine Description: */
2810 /* Remove an item from a queue */
2812 /* ASSUMED to be called from within the HA lock */
2814 /****************************************************************************/
2816 ips_removeq_scb(ips_scb_queue_t
* queue
, ips_scb_t
* item
)
2820 METHOD_TRACE("ips_removeq_scb", 1);
2825 if (item
== queue
->head
) {
2826 return (ips_removeq_scb_head(queue
));
2831 while ((p
) && (item
!= p
->q_next
))
2836 p
->q_next
= item
->q_next
;
2841 item
->q_next
= NULL
;
2850 /****************************************************************************/
2852 /* Routine Name: ips_putq_wait_tail */
2854 /* Routine Description: */
2856 /* Add an item to the tail of the queue */
2858 /* ASSUMED to be called from within the HA lock */
2860 /****************************************************************************/
2861 static void ips_putq_wait_tail(ips_wait_queue_entry_t
*queue
, struct scsi_cmnd
*item
)
2863 METHOD_TRACE("ips_putq_wait_tail", 1);
2868 item
->host_scribble
= NULL
;
2871 queue
->tail
->host_scribble
= (char *) item
;
2881 /****************************************************************************/
2883 /* Routine Name: ips_removeq_wait_head */
2885 /* Routine Description: */
2887 /* Remove the head of the queue */
2889 /* ASSUMED to be called from within the HA lock */
2891 /****************************************************************************/
2892 static struct scsi_cmnd
*ips_removeq_wait_head(ips_wait_queue_entry_t
*queue
)
2894 struct scsi_cmnd
*item
;
2896 METHOD_TRACE("ips_removeq_wait_head", 1);
2904 queue
->head
= (struct scsi_cmnd
*) item
->host_scribble
;
2905 item
->host_scribble
= NULL
;
2907 if (queue
->tail
== item
)
2915 /****************************************************************************/
2917 /* Routine Name: ips_removeq_wait */
2919 /* Routine Description: */
2921 /* Remove an item from a queue */
2923 /* ASSUMED to be called from within the HA lock */
2925 /****************************************************************************/
2926 static struct scsi_cmnd
*ips_removeq_wait(ips_wait_queue_entry_t
*queue
,
2927 struct scsi_cmnd
*item
)
2929 struct scsi_cmnd
*p
;
2931 METHOD_TRACE("ips_removeq_wait", 1);
2936 if (item
== queue
->head
) {
2937 return (ips_removeq_wait_head(queue
));
2942 while ((p
) && (item
!= (struct scsi_cmnd
*) p
->host_scribble
))
2943 p
= (struct scsi_cmnd
*) p
->host_scribble
;
2947 p
->host_scribble
= item
->host_scribble
;
2949 if (!item
->host_scribble
)
2952 item
->host_scribble
= NULL
;
2961 /****************************************************************************/
2963 /* Routine Name: ips_putq_copp_tail */
2965 /* Routine Description: */
2967 /* Add an item to the tail of the queue */
2969 /* ASSUMED to be called from within the HA lock */
2971 /****************************************************************************/
2973 ips_putq_copp_tail(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
2975 METHOD_TRACE("ips_putq_copp_tail", 1);
2983 queue
->tail
->next
= item
;
2993 /****************************************************************************/
2995 /* Routine Name: ips_removeq_copp_head */
2997 /* Routine Description: */
2999 /* Remove the head of the queue */
3001 /* ASSUMED to be called from within the HA lock */
3003 /****************************************************************************/
3004 static ips_copp_wait_item_t
*
3005 ips_removeq_copp_head(ips_copp_queue_t
* queue
)
3007 ips_copp_wait_item_t
*item
;
3009 METHOD_TRACE("ips_removeq_copp_head", 1);
3017 queue
->head
= item
->next
;
3020 if (queue
->tail
== item
)
3028 /****************************************************************************/
3030 /* Routine Name: ips_removeq_copp */
3032 /* Routine Description: */
3034 /* Remove an item from a queue */
3036 /* ASSUMED to be called from within the HA lock */
3038 /****************************************************************************/
3039 static ips_copp_wait_item_t
*
3040 ips_removeq_copp(ips_copp_queue_t
* queue
, ips_copp_wait_item_t
* item
)
3042 ips_copp_wait_item_t
*p
;
3044 METHOD_TRACE("ips_removeq_copp", 1);
3049 if (item
== queue
->head
) {
3050 return (ips_removeq_copp_head(queue
));
3055 while ((p
) && (item
!= p
->next
))
3060 p
->next
= item
->next
;
3074 /****************************************************************************/
3076 /* Routine Name: ipsintr_blocking */
3078 /* Routine Description: */
3080 /* Finalize an interrupt for internal commands */
3082 /****************************************************************************/
3084 ipsintr_blocking(ips_ha_t
* ha
, ips_scb_t
* scb
)
3086 METHOD_TRACE("ipsintr_blocking", 2);
3088 ips_freescb(ha
, scb
);
3089 if ((ha
->waitflag
== TRUE
) && (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3090 ha
->waitflag
= FALSE
;
3096 /****************************************************************************/
3098 /* Routine Name: ipsintr_done */
3100 /* Routine Description: */
3102 /* Finalize an interrupt for non-internal commands */
3104 /****************************************************************************/
3106 ipsintr_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3108 METHOD_TRACE("ipsintr_done", 2);
3111 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3112 "Spurious interrupt; scb NULL.\n");
3117 if (scb
->scsi_cmd
== NULL
) {
3118 /* unexpected interrupt */
3119 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
3120 "Spurious interrupt; scsi_cmd not set.\n");
3128 /****************************************************************************/
3130 /* Routine Name: ips_done */
3132 /* Routine Description: */
3134 /* Do housekeeping on completed commands */
3135 /* ASSUMED to be called form within the request lock */
3136 /****************************************************************************/
3138 ips_done(ips_ha_t
* ha
, ips_scb_t
* scb
)
3142 METHOD_TRACE("ips_done", 1);
3147 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
))) {
3148 ips_cleanup_passthru(ha
, scb
);
3152 * Check to see if this command had too much
3153 * data and had to be broke up. If so, queue
3154 * the rest of the data and continue.
3156 if ((scb
->breakup
) || (scb
->sg_break
)) {
3157 struct scatterlist
*sg
;
3158 int i
, sg_dma_index
, ips_sg_index
= 0;
3160 /* we had a data breakup */
3163 sg
= scsi_sglist(scb
->scsi_cmd
);
3165 /* Spin forward to last dma chunk */
3166 sg_dma_index
= scb
->breakup
;
3167 for (i
= 0; i
< scb
->breakup
; i
++)
3170 /* Take care of possible partial on last chunk */
3171 ips_fill_scb_sg_single(ha
,
3173 scb
, ips_sg_index
++,
3176 for (; sg_dma_index
< scsi_sg_count(scb
->scsi_cmd
);
3177 sg_dma_index
++, sg
= sg_next(sg
)) {
3178 if (ips_fill_scb_sg_single
3181 scb
, ips_sg_index
++,
3182 sg_dma_len(sg
)) < 0)
3186 scb
->dcdb
.transfer_length
= scb
->data_len
;
3187 scb
->dcdb
.cmd_attribute
|=
3188 ips_command_direction
[scb
->scsi_cmd
->cmnd
[0]];
3190 if (!(scb
->dcdb
.cmd_attribute
& 0x3))
3191 scb
->dcdb
.transfer_length
= 0;
3193 if (scb
->data_len
>= IPS_MAX_XFER
) {
3194 scb
->dcdb
.cmd_attribute
|= IPS_TRANSFER64K
;
3195 scb
->dcdb
.transfer_length
= 0;
3198 ret
= ips_send_cmd(ha
, scb
);
3202 if (scb
->scsi_cmd
) {
3203 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3204 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3207 ips_freescb(ha
, scb
);
3209 case IPS_SUCCESS_IMM
:
3210 if (scb
->scsi_cmd
) {
3211 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3212 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3215 ips_freescb(ha
, scb
);
3223 } /* end if passthru */
3226 ha
->dcdb_active
[scb
->bus
- 1] &= ~(1 << scb
->target_id
);
3229 scb
->scsi_cmd
->scsi_done(scb
->scsi_cmd
);
3231 ips_freescb(ha
, scb
);
3234 /****************************************************************************/
3236 /* Routine Name: ips_map_status */
3238 /* Routine Description: */
3240 /* Map Controller Error codes to Linux Error Codes */
3242 /****************************************************************************/
3244 ips_map_status(ips_ha_t
* ha
, ips_scb_t
* scb
, ips_stat_t
* sp
)
3248 uint32_t transfer_len
;
3249 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3250 IPS_SCSI_INQ_DATA inquiryData
;
3252 METHOD_TRACE("ips_map_status", 1);
3256 "(%s%d) Physical device error (%d %d %d): %x %x, Sense Key: %x, ASC: %x, ASCQ: %x",
3257 ips_name
, ha
->host_num
,
3258 scb
->scsi_cmd
->device
->channel
,
3259 scb
->scsi_cmd
->device
->id
, scb
->scsi_cmd
->device
->lun
,
3260 scb
->basic_status
, scb
->extended_status
,
3261 scb
->extended_status
==
3262 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[2] & 0xf : 0,
3263 scb
->extended_status
==
3264 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[12] : 0,
3265 scb
->extended_status
==
3266 IPS_ERR_CKCOND
? scb
->dcdb
.sense_info
[13] : 0);
3269 /* default driver error */
3270 errcode
= DID_ERROR
;
3273 switch (scb
->basic_status
& IPS_GSC_STATUS_MASK
) {
3274 case IPS_CMD_TIMEOUT
:
3275 errcode
= DID_TIME_OUT
;
3278 case IPS_INVAL_OPCO
:
3279 case IPS_INVAL_CMD_BLK
:
3280 case IPS_INVAL_PARM_BLK
:
3282 case IPS_CMD_CMPLT_WERROR
:
3285 case IPS_PHYS_DRV_ERROR
:
3286 switch (scb
->extended_status
) {
3287 case IPS_ERR_SEL_TO
:
3289 errcode
= DID_NO_CONNECT
;
3293 case IPS_ERR_OU_RUN
:
3294 if ((scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB
) ||
3295 (scb
->cmd
.dcdb
.op_code
==
3296 IPS_CMD_EXTENDED_DCDB_SG
)) {
3297 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3298 transfer_len
= tapeDCDB
->transfer_length
;
3301 (uint32_t) scb
->dcdb
.transfer_length
;
3304 if ((scb
->bus
) && (transfer_len
< scb
->data_len
)) {
3305 /* Underrun - set default to no error */
3308 /* Restrict access to physical DASD */
3309 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3310 ips_scmd_buf_read(scb
->scsi_cmd
,
3311 &inquiryData
, sizeof (inquiryData
));
3312 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
) {
3313 errcode
= DID_TIME_OUT
;
3318 errcode
= DID_ERROR
;
3322 case IPS_ERR_RECOVERY
:
3323 /* don't fail recovered errors */
3329 case IPS_ERR_HOST_RESET
:
3330 case IPS_ERR_DEV_RESET
:
3331 errcode
= DID_RESET
;
3334 case IPS_ERR_CKCOND
:
3336 if ((scb
->cmd
.dcdb
.op_code
==
3337 IPS_CMD_EXTENDED_DCDB
)
3338 || (scb
->cmd
.dcdb
.op_code
==
3339 IPS_CMD_EXTENDED_DCDB_SG
)) {
3341 (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
;
3342 memcpy(scb
->scsi_cmd
->sense_buffer
,
3343 tapeDCDB
->sense_info
,
3344 SCSI_SENSE_BUFFERSIZE
);
3346 memcpy(scb
->scsi_cmd
->sense_buffer
,
3347 scb
->dcdb
.sense_info
,
3348 SCSI_SENSE_BUFFERSIZE
);
3350 device_error
= 2; /* check condition */
3358 errcode
= DID_ERROR
;
3364 scb
->scsi_cmd
->result
= device_error
| (errcode
<< 16);
3369 /****************************************************************************/
3371 /* Routine Name: ips_send_wait */
3373 /* Routine Description: */
3375 /* Send a command to the controller and wait for it to return */
3377 /* The FFDC Time Stamp use this function for the callback, but doesn't */
3378 /* actually need to wait. */
3379 /****************************************************************************/
3381 ips_send_wait(ips_ha_t
* ha
, ips_scb_t
* scb
, int timeout
, int intr
)
3385 METHOD_TRACE("ips_send_wait", 1);
3387 if (intr
!= IPS_FFDC
) { /* Won't be Waiting if this is a Time Stamp */
3388 ha
->waitflag
= TRUE
;
3389 ha
->cmd_in_progress
= scb
->cdb
[0];
3391 scb
->callback
= ipsintr_blocking
;
3392 ret
= ips_send_cmd(ha
, scb
);
3394 if ((ret
== IPS_FAILURE
) || (ret
== IPS_SUCCESS_IMM
))
3397 if (intr
!= IPS_FFDC
) /* Don't Wait around if this is a Time Stamp */
3398 ret
= ips_wait(ha
, timeout
, intr
);
3403 /****************************************************************************/
3405 /* Routine Name: ips_scmd_buf_write */
3407 /* Routine Description: */
3408 /* Write data to struct scsi_cmnd request_buffer at proper offsets */
3409 /****************************************************************************/
3411 ips_scmd_buf_write(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3413 unsigned long flags
;
3415 local_irq_save(flags
);
3416 scsi_sg_copy_from_buffer(scmd
, data
, count
);
3417 local_irq_restore(flags
);
3420 /****************************************************************************/
3422 /* Routine Name: ips_scmd_buf_read */
3424 /* Routine Description: */
3425 /* Copy data from a struct scsi_cmnd to a new, linear buffer */
3426 /****************************************************************************/
3428 ips_scmd_buf_read(struct scsi_cmnd
*scmd
, void *data
, unsigned int count
)
3430 unsigned long flags
;
3432 local_irq_save(flags
);
3433 scsi_sg_copy_to_buffer(scmd
, data
, count
);
3434 local_irq_restore(flags
);
3437 /****************************************************************************/
3439 /* Routine Name: ips_send_cmd */
3441 /* Routine Description: */
3443 /* Map SCSI commands to ServeRAID commands for logical drives */
3445 /****************************************************************************/
3447 ips_send_cmd(ips_ha_t
* ha
, ips_scb_t
* scb
)
3452 IPS_DCDB_TABLE_TAPE
*tapeDCDB
;
3455 METHOD_TRACE("ips_send_cmd", 1);
3459 if (!scb
->scsi_cmd
) {
3460 /* internal command */
3463 /* Controller commands can't be issued */
3464 /* to real devices -- fail them */
3465 if ((ha
->waitflag
== TRUE
) &&
3466 (ha
->cmd_in_progress
== scb
->cdb
[0])) {
3467 ha
->waitflag
= FALSE
;
3472 } else if ((scb
->bus
== 0) && (!ips_is_passthru(scb
->scsi_cmd
))) {
3473 /* command to logical bus -- interpret */
3474 ret
= IPS_SUCCESS_IMM
;
3476 switch (scb
->scsi_cmd
->cmnd
[0]) {
3477 case ALLOW_MEDIUM_REMOVAL
:
3480 case WRITE_FILEMARKS
:
3482 scb
->scsi_cmd
->result
= DID_ERROR
<< 16;
3486 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3489 case TEST_UNIT_READY
:
3491 if (scb
->target_id
== IPS_ADAPTER_ID
) {
3493 * Either we have a TUR
3494 * or we have a SCSI inquiry
3496 if (scb
->scsi_cmd
->cmnd
[0] == TEST_UNIT_READY
)
3497 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3499 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3500 IPS_SCSI_INQ_DATA inquiry
;
3503 sizeof (IPS_SCSI_INQ_DATA
));
3505 inquiry
.DeviceType
=
3506 IPS_SCSI_INQ_TYPE_PROCESSOR
;
3507 inquiry
.DeviceTypeQualifier
=
3508 IPS_SCSI_INQ_LU_CONNECTED
;
3509 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
3510 inquiry
.ResponseDataFormat
=
3511 IPS_SCSI_INQ_RD_REV2
;
3512 inquiry
.AdditionalLength
= 31;
3514 IPS_SCSI_INQ_Address16
;
3516 IPS_SCSI_INQ_WBus16
|
3518 memcpy(inquiry
.VendorId
, "IBM ",
3520 memcpy(inquiry
.ProductId
,
3522 memcpy(inquiry
.ProductRevisionLevel
,
3525 ips_scmd_buf_write(scb
->scsi_cmd
,
3529 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3532 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3533 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3534 scb
->cmd
.logical_info
.reserved
= 0;
3535 scb
->cmd
.logical_info
.reserved2
= 0;
3536 scb
->data_len
= sizeof (IPS_LD_INFO
);
3537 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3539 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3546 ips_reqsen(ha
, scb
);
3547 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3553 scb
->cmd
.basic_io
.op_code
=
3554 (scb
->scsi_cmd
->cmnd
[0] ==
3555 READ_6
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3556 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3557 scb
->cmd
.basic_io
.sg_addr
=
3558 cpu_to_le32(scb
->data_busaddr
);
3560 scb
->cmd
.basic_io
.op_code
=
3561 (scb
->scsi_cmd
->cmnd
[0] ==
3562 READ_6
) ? IPS_CMD_READ_SG
:
3564 scb
->cmd
.basic_io
.enhanced_sg
=
3565 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3566 scb
->cmd
.basic_io
.sg_addr
=
3567 cpu_to_le32(scb
->sg_busaddr
);
3570 scb
->cmd
.basic_io
.segment_4G
= 0;
3571 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3572 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3573 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3575 if (scb
->cmd
.basic_io
.lba
)
3576 le32_add_cpu(&scb
->cmd
.basic_io
.lba
,
3577 le16_to_cpu(scb
->cmd
.basic_io
.
3580 scb
->cmd
.basic_io
.lba
=
3582 cmnd
[1] & 0x1f) << 16) | (scb
->scsi_cmd
->
3584 (scb
->scsi_cmd
->cmnd
[3]));
3586 scb
->cmd
.basic_io
.sector_count
=
3587 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3589 if (le16_to_cpu(scb
->cmd
.basic_io
.sector_count
) == 0)
3590 scb
->cmd
.basic_io
.sector_count
=
3599 scb
->cmd
.basic_io
.op_code
=
3600 (scb
->scsi_cmd
->cmnd
[0] ==
3601 READ_10
) ? IPS_CMD_READ
: IPS_CMD_WRITE
;
3602 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3603 scb
->cmd
.basic_io
.sg_addr
=
3604 cpu_to_le32(scb
->data_busaddr
);
3606 scb
->cmd
.basic_io
.op_code
=
3607 (scb
->scsi_cmd
->cmnd
[0] ==
3608 READ_10
) ? IPS_CMD_READ_SG
:
3610 scb
->cmd
.basic_io
.enhanced_sg
=
3611 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3612 scb
->cmd
.basic_io
.sg_addr
=
3613 cpu_to_le32(scb
->sg_busaddr
);
3616 scb
->cmd
.basic_io
.segment_4G
= 0;
3617 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3618 scb
->cmd
.basic_io
.log_drv
= scb
->target_id
;
3619 scb
->cmd
.basic_io
.sg_count
= scb
->sg_len
;
3621 if (scb
->cmd
.basic_io
.lba
)
3622 le32_add_cpu(&scb
->cmd
.basic_io
.lba
,
3623 le16_to_cpu(scb
->cmd
.basic_io
.
3626 scb
->cmd
.basic_io
.lba
=
3627 ((scb
->scsi_cmd
->cmnd
[2] << 24) | (scb
->
3631 (scb
->scsi_cmd
->cmnd
[4] << 8) | scb
->
3634 scb
->cmd
.basic_io
.sector_count
=
3635 cpu_to_le16(scb
->data_len
/ IPS_BLKSIZE
);
3637 if (cpu_to_le16(scb
->cmd
.basic_io
.sector_count
) == 0) {
3639 * This is a null condition
3640 * we don't have to do anything
3643 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3651 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3655 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
3656 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3657 scb
->cmd
.basic_io
.segment_4G
= 0;
3658 scb
->cmd
.basic_io
.enhanced_sg
= 0;
3659 scb
->data_len
= sizeof (*ha
->enq
);
3660 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
3665 scb
->cmd
.logical_info
.op_code
= IPS_CMD_GET_LD_INFO
;
3666 scb
->cmd
.logical_info
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3667 scb
->cmd
.logical_info
.reserved
= 0;
3668 scb
->cmd
.logical_info
.reserved2
= 0;
3669 scb
->cmd
.logical_info
.reserved3
= 0;
3670 scb
->data_len
= sizeof (IPS_LD_INFO
);
3671 scb
->data_busaddr
= ha
->logical_drive_info_dma_addr
;
3673 scb
->cmd
.logical_info
.buffer_addr
= scb
->data_busaddr
;
3677 case SEND_DIAGNOSTIC
:
3678 case REASSIGN_BLOCKS
:
3682 case READ_DEFECT_DATA
:
3685 scb
->scsi_cmd
->result
= DID_OK
<< 16;
3689 /* Set the Return Info to appear like the Command was */
3690 /* attempted, a Check Condition occurred, and Sense */
3691 /* Data indicating an Invalid CDB OpCode is returned. */
3692 sp
= (char *) scb
->scsi_cmd
->sense_buffer
;
3694 sp
[0] = 0x70; /* Error Code */
3695 sp
[2] = ILLEGAL_REQUEST
; /* Sense Key 5 Illegal Req. */
3696 sp
[7] = 0x0A; /* Additional Sense Length */
3697 sp
[12] = 0x20; /* ASC = Invalid OpCode */
3698 sp
[13] = 0x00; /* ASCQ */
3700 device_error
= 2; /* Indicate Check Condition */
3701 scb
->scsi_cmd
->result
= device_error
| (DID_OK
<< 16);
3706 if (ret
== IPS_SUCCESS_IMM
)
3712 /* If we already know the Device is Not there, no need to attempt a Command */
3713 /* This also protects an NT FailOver Controller from getting CDB's sent to it */
3714 if (ha
->conf
->dev
[scb
->bus
- 1][scb
->target_id
].ucState
== 0) {
3715 scb
->scsi_cmd
->result
= DID_NO_CONNECT
<< 16;
3716 return (IPS_SUCCESS_IMM
);
3719 ha
->dcdb_active
[scb
->bus
- 1] |= (1 << scb
->target_id
);
3720 scb
->cmd
.dcdb
.command_id
= IPS_COMMAND_ID(ha
, scb
);
3721 scb
->cmd
.dcdb
.dcdb_address
= cpu_to_le32(scb
->scb_busaddr
+
3722 (unsigned long) &scb
->
3724 (unsigned long) scb
);
3725 scb
->cmd
.dcdb
.reserved
= 0;
3726 scb
->cmd
.dcdb
.reserved2
= 0;
3727 scb
->cmd
.dcdb
.reserved3
= 0;
3728 scb
->cmd
.dcdb
.segment_4G
= 0;
3729 scb
->cmd
.dcdb
.enhanced_sg
= 0;
3731 TimeOut
= scb
->scsi_cmd
->request
->timeout
;
3733 if (ha
->subsys
->param
[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */
3735 scb
->cmd
.dcdb
.op_code
= IPS_CMD_EXTENDED_DCDB
;
3737 scb
->cmd
.dcdb
.op_code
=
3738 IPS_CMD_EXTENDED_DCDB_SG
;
3739 scb
->cmd
.dcdb
.enhanced_sg
=
3740 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3743 tapeDCDB
= (IPS_DCDB_TABLE_TAPE
*) & scb
->dcdb
; /* Use Same Data Area as Old DCDB Struct */
3744 tapeDCDB
->device_address
=
3745 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3746 tapeDCDB
->cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3747 tapeDCDB
->cmd_attribute
&= ~IPS_TRANSFER64K
; /* Always Turn OFF 64K Size Flag */
3750 if (TimeOut
< (10 * HZ
))
3751 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3752 else if (TimeOut
< (60 * HZ
))
3753 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3754 else if (TimeOut
< (1200 * HZ
))
3755 tapeDCDB
->cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3758 tapeDCDB
->cdb_length
= scb
->scsi_cmd
->cmd_len
;
3759 tapeDCDB
->reserved_for_LUN
= 0;
3760 tapeDCDB
->transfer_length
= scb
->data_len
;
3761 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_EXTENDED_DCDB_SG
)
3762 tapeDCDB
->buffer_pointer
=
3763 cpu_to_le32(scb
->sg_busaddr
);
3765 tapeDCDB
->buffer_pointer
=
3766 cpu_to_le32(scb
->data_busaddr
);
3767 tapeDCDB
->sg_count
= scb
->sg_len
;
3768 tapeDCDB
->sense_length
= sizeof (tapeDCDB
->sense_info
);
3769 tapeDCDB
->scsi_status
= 0;
3770 tapeDCDB
->reserved
= 0;
3771 memcpy(tapeDCDB
->scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3772 scb
->scsi_cmd
->cmd_len
);
3775 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB
;
3777 scb
->cmd
.dcdb
.op_code
= IPS_CMD_DCDB_SG
;
3778 scb
->cmd
.dcdb
.enhanced_sg
=
3779 IPS_USE_ENH_SGLIST(ha
) ? 0xFF : 0;
3782 scb
->dcdb
.device_address
=
3783 ((scb
->bus
- 1) << 4) | scb
->target_id
;
3784 scb
->dcdb
.cmd_attribute
|= IPS_DISCONNECT_ALLOWED
;
3787 if (TimeOut
< (10 * HZ
))
3788 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT10
; /* TimeOut is 10 Seconds */
3789 else if (TimeOut
< (60 * HZ
))
3790 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT60
; /* TimeOut is 60 Seconds */
3791 else if (TimeOut
< (1200 * HZ
))
3792 scb
->dcdb
.cmd_attribute
|= IPS_TIMEOUT20M
; /* TimeOut is 20 Minutes */
3795 scb
->dcdb
.transfer_length
= scb
->data_len
;
3796 if (scb
->dcdb
.cmd_attribute
& IPS_TRANSFER64K
)
3797 scb
->dcdb
.transfer_length
= 0;
3798 if (scb
->cmd
.dcdb
.op_code
== IPS_CMD_DCDB_SG
)
3799 scb
->dcdb
.buffer_pointer
=
3800 cpu_to_le32(scb
->sg_busaddr
);
3802 scb
->dcdb
.buffer_pointer
=
3803 cpu_to_le32(scb
->data_busaddr
);
3804 scb
->dcdb
.cdb_length
= scb
->scsi_cmd
->cmd_len
;
3805 scb
->dcdb
.sense_length
= sizeof (scb
->dcdb
.sense_info
);
3806 scb
->dcdb
.sg_count
= scb
->sg_len
;
3807 scb
->dcdb
.reserved
= 0;
3808 memcpy(scb
->dcdb
.scsi_cdb
, scb
->scsi_cmd
->cmnd
,
3809 scb
->scsi_cmd
->cmd_len
);
3810 scb
->dcdb
.scsi_status
= 0;
3811 scb
->dcdb
.reserved2
[0] = 0;
3812 scb
->dcdb
.reserved2
[1] = 0;
3813 scb
->dcdb
.reserved2
[2] = 0;
3817 return ((*ha
->func
.issue
) (ha
, scb
));
3820 /****************************************************************************/
3822 /* Routine Name: ips_chk_status */
3824 /* Routine Description: */
3826 /* Check the status of commands to logical drives */
3827 /* Assumed to be called with the HA lock */
3828 /****************************************************************************/
3830 ips_chkstatus(ips_ha_t
* ha
, IPS_STATUS
* pstatus
)
3834 uint8_t basic_status
;
3837 IPS_SCSI_INQ_DATA inquiryData
;
3839 METHOD_TRACE("ips_chkstatus", 1);
3841 scb
= &ha
->scbs
[pstatus
->fields
.command_id
];
3842 scb
->basic_status
= basic_status
=
3843 pstatus
->fields
.basic_status
& IPS_BASIC_STATUS_MASK
;
3844 scb
->extended_status
= ext_status
= pstatus
->fields
.extended_status
;
3847 sp
->residue_len
= 0;
3848 sp
->scb_addr
= (void *) scb
;
3850 /* Remove the item from the active queue */
3851 ips_removeq_scb(&ha
->scb_activelist
, scb
);
3854 /* internal commands are handled in do_ipsintr */
3857 DEBUG_VAR(2, "(%s%d) ips_chkstatus: cmd 0x%X id %d (%d %d %d)",
3861 scb
->cmd
.basic_io
.command_id
,
3862 scb
->bus
, scb
->target_id
, scb
->lun
);
3864 if ((scb
->scsi_cmd
) && (ips_is_passthru(scb
->scsi_cmd
)))
3865 /* passthru - just returns the raw result */
3870 if (((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_SUCCESS
) ||
3871 ((basic_status
& IPS_GSC_STATUS_MASK
) == IPS_CMD_RECOVERED_ERROR
)) {
3873 if (scb
->bus
== 0) {
3874 if ((basic_status
& IPS_GSC_STATUS_MASK
) ==
3875 IPS_CMD_RECOVERED_ERROR
) {
3877 "(%s%d) Recovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3878 ips_name
, ha
->host_num
,
3879 scb
->cmd
.basic_io
.op_code
,
3880 basic_status
, ext_status
);
3883 switch (scb
->scsi_cmd
->cmnd
[0]) {
3884 case ALLOW_MEDIUM_REMOVAL
:
3887 case WRITE_FILEMARKS
:
3889 errcode
= DID_ERROR
;
3895 case TEST_UNIT_READY
:
3896 if (!ips_online(ha
, scb
)) {
3897 errcode
= DID_TIME_OUT
;
3902 if (ips_online(ha
, scb
)) {
3903 ips_inquiry(ha
, scb
);
3905 errcode
= DID_TIME_OUT
;
3910 ips_reqsen(ha
, scb
);
3922 if (!ips_online(ha
, scb
)
3923 || !ips_msense(ha
, scb
)) {
3924 errcode
= DID_ERROR
;
3929 if (ips_online(ha
, scb
))
3932 errcode
= DID_TIME_OUT
;
3936 case SEND_DIAGNOSTIC
:
3937 case REASSIGN_BLOCKS
:
3941 errcode
= DID_ERROR
;
3946 case READ_DEFECT_DATA
:
3952 errcode
= DID_ERROR
;
3955 scb
->scsi_cmd
->result
= errcode
<< 16;
3956 } else { /* bus == 0 */
3957 /* restrict access to physical drives */
3958 if (scb
->scsi_cmd
->cmnd
[0] == INQUIRY
) {
3959 ips_scmd_buf_read(scb
->scsi_cmd
,
3960 &inquiryData
, sizeof (inquiryData
));
3961 if ((inquiryData
.DeviceType
& 0x1f) == TYPE_DISK
)
3962 scb
->scsi_cmd
->result
= DID_TIME_OUT
<< 16;
3965 } else { /* recovered error / success */
3966 if (scb
->bus
== 0) {
3968 "(%s%d) Unrecovered Logical Drive Error OpCode: %x, BSB: %x, ESB: %x",
3969 ips_name
, ha
->host_num
,
3970 scb
->cmd
.basic_io
.op_code
, basic_status
,
3974 ips_map_status(ha
, scb
, sp
);
3978 /****************************************************************************/
3980 /* Routine Name: ips_online */
3982 /* Routine Description: */
3984 /* Determine if a logical drive is online */
3986 /****************************************************************************/
3988 ips_online(ips_ha_t
* ha
, ips_scb_t
* scb
)
3990 METHOD_TRACE("ips_online", 1);
3992 if (scb
->target_id
>= IPS_MAX_LD
)
3995 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1) {
3996 memset(ha
->logical_drive_info
, 0, sizeof (IPS_LD_INFO
));
4000 if (ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4002 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4004 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4006 && ha
->logical_drive_info
->drive_info
[scb
->target_id
].state
!=
4013 /****************************************************************************/
4015 /* Routine Name: ips_inquiry */
4017 /* Routine Description: */
4019 /* Simulate an inquiry command to a logical drive */
4021 /****************************************************************************/
4023 ips_inquiry(ips_ha_t
* ha
, ips_scb_t
* scb
)
4025 IPS_SCSI_INQ_DATA inquiry
;
4027 METHOD_TRACE("ips_inquiry", 1);
4029 memset(&inquiry
, 0, sizeof (IPS_SCSI_INQ_DATA
));
4031 inquiry
.DeviceType
= IPS_SCSI_INQ_TYPE_DASD
;
4032 inquiry
.DeviceTypeQualifier
= IPS_SCSI_INQ_LU_CONNECTED
;
4033 inquiry
.Version
= IPS_SCSI_INQ_REV2
;
4034 inquiry
.ResponseDataFormat
= IPS_SCSI_INQ_RD_REV2
;
4035 inquiry
.AdditionalLength
= 31;
4036 inquiry
.Flags
[0] = IPS_SCSI_INQ_Address16
;
4038 IPS_SCSI_INQ_WBus16
| IPS_SCSI_INQ_Sync
| IPS_SCSI_INQ_CmdQue
;
4039 memcpy(inquiry
.VendorId
, "IBM ", 8);
4040 memcpy(inquiry
.ProductId
, "SERVERAID ", 16);
4041 memcpy(inquiry
.ProductRevisionLevel
, "1.00", 4);
4043 ips_scmd_buf_write(scb
->scsi_cmd
, &inquiry
, sizeof (inquiry
));
4048 /****************************************************************************/
4050 /* Routine Name: ips_rdcap */
4052 /* Routine Description: */
4054 /* Simulate a read capacity command to a logical drive */
4056 /****************************************************************************/
4058 ips_rdcap(ips_ha_t
* ha
, ips_scb_t
* scb
)
4060 IPS_SCSI_CAPACITY cap
;
4062 METHOD_TRACE("ips_rdcap", 1);
4064 if (scsi_bufflen(scb
->scsi_cmd
) < 8)
4068 cpu_to_be32(le32_to_cpu
4069 (ha
->logical_drive_info
->
4070 drive_info
[scb
->target_id
].sector_count
) - 1);
4071 cap
.len
= cpu_to_be32((uint32_t) IPS_BLKSIZE
);
4073 ips_scmd_buf_write(scb
->scsi_cmd
, &cap
, sizeof (cap
));
4078 /****************************************************************************/
4080 /* Routine Name: ips_msense */
4082 /* Routine Description: */
4084 /* Simulate a mode sense command to a logical drive */
4086 /****************************************************************************/
4088 ips_msense(ips_ha_t
* ha
, ips_scb_t
* scb
)
4093 IPS_SCSI_MODE_PAGE_DATA mdata
;
4095 METHOD_TRACE("ips_msense", 1);
4097 if (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) > 0x400000 &&
4098 (ha
->enq
->ucMiscFlag
& 0x8) == 0) {
4099 heads
= IPS_NORM_HEADS
;
4100 sectors
= IPS_NORM_SECTORS
;
4102 heads
= IPS_COMP_HEADS
;
4103 sectors
= IPS_COMP_SECTORS
;
4107 (le32_to_cpu(ha
->enq
->ulDriveSize
[scb
->target_id
]) -
4108 1) / (heads
* sectors
);
4110 memset(&mdata
, 0, sizeof (IPS_SCSI_MODE_PAGE_DATA
));
4112 mdata
.hdr
.BlockDescLength
= 8;
4114 switch (scb
->scsi_cmd
->cmnd
[2] & 0x3f) {
4115 case 0x03: /* page 3 */
4116 mdata
.pdata
.pg3
.PageCode
= 3;
4117 mdata
.pdata
.pg3
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE3
);
4118 mdata
.hdr
.DataLength
=
4119 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg3
.PageLength
;
4120 mdata
.pdata
.pg3
.TracksPerZone
= 0;
4121 mdata
.pdata
.pg3
.AltSectorsPerZone
= 0;
4122 mdata
.pdata
.pg3
.AltTracksPerZone
= 0;
4123 mdata
.pdata
.pg3
.AltTracksPerVolume
= 0;
4124 mdata
.pdata
.pg3
.SectorsPerTrack
= cpu_to_be16(sectors
);
4125 mdata
.pdata
.pg3
.BytesPerSector
= cpu_to_be16(IPS_BLKSIZE
);
4126 mdata
.pdata
.pg3
.Interleave
= cpu_to_be16(1);
4127 mdata
.pdata
.pg3
.TrackSkew
= 0;
4128 mdata
.pdata
.pg3
.CylinderSkew
= 0;
4129 mdata
.pdata
.pg3
.flags
= IPS_SCSI_MP3_SoftSector
;
4133 mdata
.pdata
.pg4
.PageCode
= 4;
4134 mdata
.pdata
.pg4
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE4
);
4135 mdata
.hdr
.DataLength
=
4136 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg4
.PageLength
;
4137 mdata
.pdata
.pg4
.CylindersHigh
=
4138 cpu_to_be16((cylinders
>> 8) & 0xFFFF);
4139 mdata
.pdata
.pg4
.CylindersLow
= (cylinders
& 0xFF);
4140 mdata
.pdata
.pg4
.Heads
= heads
;
4141 mdata
.pdata
.pg4
.WritePrecompHigh
= 0;
4142 mdata
.pdata
.pg4
.WritePrecompLow
= 0;
4143 mdata
.pdata
.pg4
.ReducedWriteCurrentHigh
= 0;
4144 mdata
.pdata
.pg4
.ReducedWriteCurrentLow
= 0;
4145 mdata
.pdata
.pg4
.StepRate
= cpu_to_be16(1);
4146 mdata
.pdata
.pg4
.LandingZoneHigh
= 0;
4147 mdata
.pdata
.pg4
.LandingZoneLow
= 0;
4148 mdata
.pdata
.pg4
.flags
= 0;
4149 mdata
.pdata
.pg4
.RotationalOffset
= 0;
4150 mdata
.pdata
.pg4
.MediumRotationRate
= 0;
4153 mdata
.pdata
.pg8
.PageCode
= 8;
4154 mdata
.pdata
.pg8
.PageLength
= sizeof (IPS_SCSI_MODE_PAGE8
);
4155 mdata
.hdr
.DataLength
=
4156 3 + mdata
.hdr
.BlockDescLength
+ mdata
.pdata
.pg8
.PageLength
;
4157 /* everything else is left set to 0 */
4164 ips_scmd_buf_write(scb
->scsi_cmd
, &mdata
, sizeof (mdata
));
4169 /****************************************************************************/
4171 /* Routine Name: ips_reqsen */
4173 /* Routine Description: */
4175 /* Simulate a request sense command to a logical drive */
4177 /****************************************************************************/
4179 ips_reqsen(ips_ha_t
* ha
, ips_scb_t
* scb
)
4181 IPS_SCSI_REQSEN reqsen
;
4183 METHOD_TRACE("ips_reqsen", 1);
4185 memset(&reqsen
, 0, sizeof (IPS_SCSI_REQSEN
));
4187 reqsen
.ResponseCode
=
4188 IPS_SCSI_REQSEN_VALID
| IPS_SCSI_REQSEN_CURRENT_ERR
;
4189 reqsen
.AdditionalLength
= 10;
4190 reqsen
.AdditionalSenseCode
= IPS_SCSI_REQSEN_NO_SENSE
;
4191 reqsen
.AdditionalSenseCodeQual
= IPS_SCSI_REQSEN_NO_SENSE
;
4193 ips_scmd_buf_write(scb
->scsi_cmd
, &reqsen
, sizeof (reqsen
));
4198 /****************************************************************************/
4200 /* Routine Name: ips_free */
4202 /* Routine Description: */
4204 /* Free any allocated space for this controller */
4206 /****************************************************************************/
4208 ips_free(ips_ha_t
* ha
)
4211 METHOD_TRACE("ips_free", 1);
4215 dma_free_coherent(&ha
->pcidev
->dev
, sizeof(IPS_ENQ
),
4216 ha
->enq
, ha
->enq_busaddr
);
4224 dma_free_coherent(&ha
->pcidev
->dev
,
4225 sizeof (IPS_ADAPTER
) +
4226 sizeof (IPS_IO_CMD
), ha
->adapt
,
4227 ha
->adapt
->hw_status_start
);
4231 if (ha
->logical_drive_info
) {
4232 dma_free_coherent(&ha
->pcidev
->dev
,
4233 sizeof (IPS_LD_INFO
),
4234 ha
->logical_drive_info
,
4235 ha
->logical_drive_info_dma_addr
);
4236 ha
->logical_drive_info
= NULL
;
4245 if (ha
->ioctl_data
) {
4246 dma_free_coherent(&ha
->pcidev
->dev
, ha
->ioctl_len
,
4247 ha
->ioctl_data
, ha
->ioctl_busaddr
);
4248 ha
->ioctl_data
= NULL
;
4249 ha
->ioctl_datasize
= 0;
4252 ips_deallocatescbs(ha
, ha
->max_cmds
);
4254 /* free memory mapped (if applicable) */
4256 iounmap(ha
->ioremap_ptr
);
4257 ha
->ioremap_ptr
= NULL
;
4266 /****************************************************************************/
4268 /* Routine Name: ips_deallocatescbs */
4270 /* Routine Description: */
4272 /* Free the command blocks */
4274 /****************************************************************************/
4276 ips_deallocatescbs(ips_ha_t
* ha
, int cmds
)
4279 dma_free_coherent(&ha
->pcidev
->dev
,
4280 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* cmds
,
4281 ha
->scbs
->sg_list
.list
,
4282 ha
->scbs
->sg_busaddr
);
4283 dma_free_coherent(&ha
->pcidev
->dev
, sizeof (ips_scb_t
) * cmds
,
4284 ha
->scbs
, ha
->scbs
->scb_busaddr
);
4290 /****************************************************************************/
4292 /* Routine Name: ips_allocatescbs */
4294 /* Routine Description: */
4296 /* Allocate the command blocks */
4298 /****************************************************************************/
4300 ips_allocatescbs(ips_ha_t
* ha
)
4305 dma_addr_t command_dma
, sg_dma
;
4307 METHOD_TRACE("ips_allocatescbs", 1);
4309 /* Allocate memory for the SCBs */
4310 ha
->scbs
= dma_alloc_coherent(&ha
->pcidev
->dev
,
4311 ha
->max_cmds
* sizeof (ips_scb_t
),
4312 &command_dma
, GFP_KERNEL
);
4313 if (ha
->scbs
== NULL
)
4315 ips_sg
.list
= dma_alloc_coherent(&ha
->pcidev
->dev
,
4316 IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* ha
->max_cmds
,
4317 &sg_dma
, GFP_KERNEL
);
4318 if (ips_sg
.list
== NULL
) {
4319 dma_free_coherent(&ha
->pcidev
->dev
,
4320 ha
->max_cmds
* sizeof (ips_scb_t
), ha
->scbs
,
4325 memset(ha
->scbs
, 0, ha
->max_cmds
* sizeof (ips_scb_t
));
4327 for (i
= 0; i
< ha
->max_cmds
; i
++) {
4328 scb_p
= &ha
->scbs
[i
];
4329 scb_p
->scb_busaddr
= command_dma
+ sizeof (ips_scb_t
) * i
;
4330 /* set up S/G list */
4331 if (IPS_USE_ENH_SGLIST(ha
)) {
4332 scb_p
->sg_list
.enh_list
=
4333 ips_sg
.enh_list
+ i
* IPS_MAX_SG
;
4335 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4337 scb_p
->sg_list
.std_list
=
4338 ips_sg
.std_list
+ i
* IPS_MAX_SG
;
4340 sg_dma
+ IPS_SGLIST_SIZE(ha
) * IPS_MAX_SG
* i
;
4343 /* add to the free list */
4344 if (i
< ha
->max_cmds
- 1) {
4345 scb_p
->q_next
= ha
->scb_freelist
;
4346 ha
->scb_freelist
= scb_p
;
4354 /****************************************************************************/
4356 /* Routine Name: ips_init_scb */
4358 /* Routine Description: */
4360 /* Initialize a CCB to default values */
4362 /****************************************************************************/
4364 ips_init_scb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4366 IPS_SG_LIST sg_list
;
4367 uint32_t cmd_busaddr
, sg_busaddr
;
4368 METHOD_TRACE("ips_init_scb", 1);
4373 sg_list
.list
= scb
->sg_list
.list
;
4374 cmd_busaddr
= scb
->scb_busaddr
;
4375 sg_busaddr
= scb
->sg_busaddr
;
4377 memset(scb
, 0, sizeof (ips_scb_t
));
4378 memset(ha
->dummy
, 0, sizeof (IPS_IO_CMD
));
4380 /* Initialize dummy command bucket */
4381 ha
->dummy
->op_code
= 0xFF;
4382 ha
->dummy
->ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4383 + sizeof (IPS_ADAPTER
));
4384 ha
->dummy
->command_id
= IPS_MAX_CMDS
;
4386 /* set bus address of scb */
4387 scb
->scb_busaddr
= cmd_busaddr
;
4388 scb
->sg_busaddr
= sg_busaddr
;
4389 scb
->sg_list
.list
= sg_list
.list
;
4392 scb
->cmd
.basic_io
.cccr
= cpu_to_le32((uint32_t) IPS_BIT_ILE
);
4393 scb
->cmd
.basic_io
.ccsar
= cpu_to_le32(ha
->adapt
->hw_status_start
4394 + sizeof (IPS_ADAPTER
));
4397 /****************************************************************************/
4399 /* Routine Name: ips_get_scb */
4401 /* Routine Description: */
4403 /* Initialize a CCB to default values */
4405 /* ASSUMED to be called from within a lock */
4407 /****************************************************************************/
4409 ips_getscb(ips_ha_t
* ha
)
4413 METHOD_TRACE("ips_getscb", 1);
4415 if ((scb
= ha
->scb_freelist
) == NULL
) {
4420 ha
->scb_freelist
= scb
->q_next
;
4424 ips_init_scb(ha
, scb
);
4429 /****************************************************************************/
4431 /* Routine Name: ips_free_scb */
4433 /* Routine Description: */
4435 /* Return an unused CCB back to the free list */
4437 /* ASSUMED to be called from within a lock */
4439 /****************************************************************************/
4441 ips_freescb(ips_ha_t
* ha
, ips_scb_t
* scb
)
4444 METHOD_TRACE("ips_freescb", 1);
4445 if (scb
->flags
& IPS_SCB_MAP_SG
)
4446 scsi_dma_unmap(scb
->scsi_cmd
);
4447 else if (scb
->flags
& IPS_SCB_MAP_SINGLE
)
4448 dma_unmap_single(&ha
->pcidev
->dev
, scb
->data_busaddr
,
4449 scb
->data_len
, IPS_DMA_DIR(scb
));
4451 /* check to make sure this is not our "special" scb */
4452 if (IPS_COMMAND_ID(ha
, scb
) < (ha
->max_cmds
- 1)) {
4453 scb
->q_next
= ha
->scb_freelist
;
4454 ha
->scb_freelist
= scb
;
4458 /****************************************************************************/
4460 /* Routine Name: ips_isinit_copperhead */
4462 /* Routine Description: */
4464 /* Is controller initialized ? */
4466 /****************************************************************************/
4468 ips_isinit_copperhead(ips_ha_t
* ha
)
4473 METHOD_TRACE("ips_isinit_copperhead", 1);
4475 isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4476 scpr
= inb(ha
->io_addr
+ IPS_REG_SCPR
);
4478 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4484 /****************************************************************************/
4486 /* Routine Name: ips_isinit_copperhead_memio */
4488 /* Routine Description: */
4490 /* Is controller initialized ? */
4492 /****************************************************************************/
4494 ips_isinit_copperhead_memio(ips_ha_t
* ha
)
4499 METHOD_TRACE("ips_is_init_copperhead_memio", 1);
4501 isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4502 scpr
= readb(ha
->mem_ptr
+ IPS_REG_SCPR
);
4504 if (((isr
& IPS_BIT_EI
) == 0) && ((scpr
& IPS_BIT_EBM
) == 0))
4510 /****************************************************************************/
4512 /* Routine Name: ips_isinit_morpheus */
4514 /* Routine Description: */
4516 /* Is controller initialized ? */
4518 /****************************************************************************/
4520 ips_isinit_morpheus(ips_ha_t
* ha
)
4525 METHOD_TRACE("ips_is_init_morpheus", 1);
4527 if (ips_isintr_morpheus(ha
))
4528 ips_flush_and_reset(ha
);
4530 post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
4531 bits
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4535 else if (bits
& 0x3)
4541 /****************************************************************************/
4543 /* Routine Name: ips_flush_and_reset */
4545 /* Routine Description: */
4547 /* Perform cleanup ( FLUSH and RESET ) when the adapter is in an unknown */
4548 /* state ( was trying to INIT and an interrupt was already pending ) ... */
4550 /****************************************************************************/
4552 ips_flush_and_reset(ips_ha_t
*ha
)
4558 dma_addr_t command_dma
;
4560 /* Create a usuable SCB */
4561 scb
= dma_alloc_coherent(&ha
->pcidev
->dev
, sizeof(ips_scb_t
),
4562 &command_dma
, GFP_KERNEL
);
4564 memset(scb
, 0, sizeof(ips_scb_t
));
4565 ips_init_scb(ha
, scb
);
4566 scb
->scb_busaddr
= command_dma
;
4568 scb
->timeout
= ips_cmd_timeout
;
4569 scb
->cdb
[0] = IPS_CMD_FLUSH
;
4571 scb
->cmd
.flush_cache
.op_code
= IPS_CMD_FLUSH
;
4572 scb
->cmd
.flush_cache
.command_id
= IPS_MAX_CMDS
; /* Use an ID that would otherwise not exist */
4573 scb
->cmd
.flush_cache
.state
= IPS_NORM_STATE
;
4574 scb
->cmd
.flush_cache
.reserved
= 0;
4575 scb
->cmd
.flush_cache
.reserved2
= 0;
4576 scb
->cmd
.flush_cache
.reserved3
= 0;
4577 scb
->cmd
.flush_cache
.reserved4
= 0;
4579 ret
= ips_send_cmd(ha
, scb
); /* Send the Flush Command */
4581 if (ret
== IPS_SUCCESS
) {
4582 time
= 60 * IPS_ONE_SEC
; /* Max Wait time is 60 seconds */
4585 while ((time
> 0) && (!done
)) {
4586 done
= ips_poll_for_flush_complete(ha
);
4587 /* This may look evil, but it's only done during extremely rare start-up conditions ! */
4594 /* Now RESET and INIT the adapter */
4595 (*ha
->func
.reset
) (ha
);
4597 dma_free_coherent(&ha
->pcidev
->dev
, sizeof(ips_scb_t
), scb
, command_dma
);
4601 /****************************************************************************/
4603 /* Routine Name: ips_poll_for_flush_complete */
4605 /* Routine Description: */
4607 /* Poll for the Flush Command issued by ips_flush_and_reset() to complete */
4608 /* All other responses are just taken off the queue and ignored */
4610 /****************************************************************************/
4612 ips_poll_for_flush_complete(ips_ha_t
* ha
)
4617 cstatus
.value
= (*ha
->func
.statupd
) (ha
);
4619 if (cstatus
.value
== 0xffffffff) /* If No Interrupt to process */
4622 /* Success is when we see the Flush Command ID */
4623 if (cstatus
.fields
.command_id
== IPS_MAX_CMDS
)
4630 /****************************************************************************/
4632 /* Routine Name: ips_enable_int_copperhead */
4634 /* Routine Description: */
4635 /* Turn on interrupts */
4637 /****************************************************************************/
4639 ips_enable_int_copperhead(ips_ha_t
* ha
)
4641 METHOD_TRACE("ips_enable_int_copperhead", 1);
4643 outb(ha
->io_addr
+ IPS_REG_HISR
, IPS_BIT_EI
);
4644 inb(ha
->io_addr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4647 /****************************************************************************/
4649 /* Routine Name: ips_enable_int_copperhead_memio */
4651 /* Routine Description: */
4652 /* Turn on interrupts */
4654 /****************************************************************************/
4656 ips_enable_int_copperhead_memio(ips_ha_t
* ha
)
4658 METHOD_TRACE("ips_enable_int_copperhead_memio", 1);
4660 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
4661 readb(ha
->mem_ptr
+ IPS_REG_HISR
); /*Ensure PCI Posting Completes*/
4664 /****************************************************************************/
4666 /* Routine Name: ips_enable_int_morpheus */
4668 /* Routine Description: */
4669 /* Turn on interrupts */
4671 /****************************************************************************/
4673 ips_enable_int_morpheus(ips_ha_t
* ha
)
4677 METHOD_TRACE("ips_enable_int_morpheus", 1);
4679 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4681 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4682 readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
); /*Ensure PCI Posting Completes*/
4685 /****************************************************************************/
4687 /* Routine Name: ips_init_copperhead */
4689 /* Routine Description: */
4691 /* Initialize a copperhead controller */
4693 /****************************************************************************/
4695 ips_init_copperhead(ips_ha_t
* ha
)
4699 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4702 METHOD_TRACE("ips_init_copperhead", 1);
4704 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4705 for (j
= 0; j
< 45; j
++) {
4706 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4707 if (Isr
& IPS_BIT_GHI
)
4710 /* Delay for 1 Second */
4711 MDELAY(IPS_ONE_SEC
);
4715 /* error occurred */
4718 PostByte
[i
] = inb(ha
->io_addr
+ IPS_REG_ISPR
);
4719 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4722 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4723 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4724 "reset controller fails (post status %x %x).\n",
4725 PostByte
[0], PostByte
[1]);
4730 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4731 for (j
= 0; j
< 240; j
++) {
4732 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
4733 if (Isr
& IPS_BIT_GHI
)
4736 /* Delay for 1 Second */
4737 MDELAY(IPS_ONE_SEC
);
4741 /* error occurred */
4744 inb(ha
->io_addr
+ IPS_REG_ISPR
);
4745 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
4748 for (i
= 0; i
< 240; i
++) {
4749 Cbsp
= inb(ha
->io_addr
+ IPS_REG_CBSP
);
4751 if ((Cbsp
& IPS_BIT_OP
) == 0)
4754 /* Delay for 1 Second */
4755 MDELAY(IPS_ONE_SEC
);
4763 outl(0x1010, ha
->io_addr
+ IPS_REG_CCCR
);
4765 /* Enable busmastering */
4766 outb(IPS_BIT_EBM
, ha
->io_addr
+ IPS_REG_SCPR
);
4768 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
4769 /* fix for anaconda64 */
4770 outl(0, ha
->io_addr
+ IPS_REG_NDAE
);
4772 /* Enable interrupts */
4773 outb(IPS_BIT_EI
, ha
->io_addr
+ IPS_REG_HISR
);
4778 /****************************************************************************/
4780 /* Routine Name: ips_init_copperhead_memio */
4782 /* Routine Description: */
4784 /* Initialize a copperhead controller with memory mapped I/O */
4786 /****************************************************************************/
4788 ips_init_copperhead_memio(ips_ha_t
* ha
)
4792 uint8_t PostByte
[IPS_MAX_POST_BYTES
];
4795 METHOD_TRACE("ips_init_copperhead_memio", 1);
4797 for (i
= 0; i
< IPS_MAX_POST_BYTES
; i
++) {
4798 for (j
= 0; j
< 45; j
++) {
4799 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4800 if (Isr
& IPS_BIT_GHI
)
4803 /* Delay for 1 Second */
4804 MDELAY(IPS_ONE_SEC
);
4808 /* error occurred */
4811 PostByte
[i
] = readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4812 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4815 if (PostByte
[0] < IPS_GOOD_POST_STATUS
) {
4816 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4817 "reset controller fails (post status %x %x).\n",
4818 PostByte
[0], PostByte
[1]);
4823 for (i
= 0; i
< IPS_MAX_CONFIG_BYTES
; i
++) {
4824 for (j
= 0; j
< 240; j
++) {
4825 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
4826 if (Isr
& IPS_BIT_GHI
)
4829 /* Delay for 1 Second */
4830 MDELAY(IPS_ONE_SEC
);
4834 /* error occurred */
4837 readb(ha
->mem_ptr
+ IPS_REG_ISPR
);
4838 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
4841 for (i
= 0; i
< 240; i
++) {
4842 Cbsp
= readb(ha
->mem_ptr
+ IPS_REG_CBSP
);
4844 if ((Cbsp
& IPS_BIT_OP
) == 0)
4847 /* Delay for 1 Second */
4848 MDELAY(IPS_ONE_SEC
);
4852 /* error occurred */
4856 writel(0x1010, ha
->mem_ptr
+ IPS_REG_CCCR
);
4858 /* Enable busmastering */
4859 writeb(IPS_BIT_EBM
, ha
->mem_ptr
+ IPS_REG_SCPR
);
4861 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
4862 /* fix for anaconda64 */
4863 writel(0, ha
->mem_ptr
+ IPS_REG_NDAE
);
4865 /* Enable interrupts */
4866 writeb(IPS_BIT_EI
, ha
->mem_ptr
+ IPS_REG_HISR
);
4868 /* if we get here then everything went OK */
4872 /****************************************************************************/
4874 /* Routine Name: ips_init_morpheus */
4876 /* Routine Description: */
4878 /* Initialize a morpheus controller */
4880 /****************************************************************************/
4882 ips_init_morpheus(ips_ha_t
* ha
)
4890 METHOD_TRACE("ips_init_morpheus", 1);
4892 /* Wait up to 45 secs for Post */
4893 for (i
= 0; i
< 45; i
++) {
4894 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4896 if (Isr
& IPS_BIT_I960_MSG0I
)
4899 /* Delay for 1 Second */
4900 MDELAY(IPS_ONE_SEC
);
4904 /* error occurred */
4905 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4906 "timeout waiting for post.\n");
4911 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
4913 if (Post
== 0x4F00) { /* If Flashing the Battery PIC */
4914 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4915 "Flashing Battery PIC, Please wait ...\n");
4917 /* Clear the interrupt bit */
4918 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
4919 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4921 for (i
= 0; i
< 120; i
++) { /* Wait Up to 2 Min. for Completion */
4922 Post
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG0
);
4925 /* Delay for 1 Second */
4926 MDELAY(IPS_ONE_SEC
);
4930 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4931 "timeout waiting for Battery PIC Flash\n");
4937 /* Clear the interrupt bit */
4938 Isr
= (uint32_t) IPS_BIT_I960_MSG0I
;
4939 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4941 if (Post
< (IPS_GOOD_POST_STATUS
<< 8)) {
4942 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4943 "reset controller fails (post status %x).\n", Post
);
4948 /* Wait up to 240 secs for config bytes */
4949 for (i
= 0; i
< 240; i
++) {
4950 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4952 if (Isr
& IPS_BIT_I960_MSG1I
)
4955 /* Delay for 1 Second */
4956 MDELAY(IPS_ONE_SEC
);
4960 /* error occurred */
4961 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
4962 "timeout waiting for config.\n");
4967 Config
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
4969 /* Clear interrupt bit */
4970 Isr
= (uint32_t) IPS_BIT_I960_MSG1I
;
4971 writel(Isr
, ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
4973 /* Turn on the interrupts */
4974 Oimr
= readl(ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4976 writel(Oimr
, ha
->mem_ptr
+ IPS_REG_I960_OIMR
);
4978 /* if we get here then everything went OK */
4980 /* Since we did a RESET, an EraseStripeLock may be needed */
4981 if (Post
== 0xEF10) {
4982 if ((Config
== 0x000F) || (Config
== 0x0009))
4983 ha
->requires_esl
= 1;
4989 /****************************************************************************/
4991 /* Routine Name: ips_reset_copperhead */
4993 /* Routine Description: */
4995 /* Reset the controller */
4997 /****************************************************************************/
4999 ips_reset_copperhead(ips_ha_t
* ha
)
5003 METHOD_TRACE("ips_reset_copperhead", 1);
5005 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead: io addr: %x, irq: %d",
5006 ips_name
, ha
->host_num
, ha
->io_addr
, ha
->pcidev
->irq
);
5010 while (reset_counter
< 2) {
5013 outb(IPS_BIT_RST
, ha
->io_addr
+ IPS_REG_SCPR
);
5015 /* Delay for 1 Second */
5016 MDELAY(IPS_ONE_SEC
);
5018 outb(0, ha
->io_addr
+ IPS_REG_SCPR
);
5020 /* Delay for 1 Second */
5021 MDELAY(IPS_ONE_SEC
);
5023 if ((*ha
->func
.init
) (ha
))
5025 else if (reset_counter
>= 2) {
5034 /****************************************************************************/
5036 /* Routine Name: ips_reset_copperhead_memio */
5038 /* Routine Description: */
5040 /* Reset the controller */
5042 /****************************************************************************/
5044 ips_reset_copperhead_memio(ips_ha_t
* ha
)
5048 METHOD_TRACE("ips_reset_copperhead_memio", 1);
5050 DEBUG_VAR(1, "(%s%d) ips_reset_copperhead_memio: mem addr: %x, irq: %d",
5051 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->pcidev
->irq
);
5055 while (reset_counter
< 2) {
5058 writeb(IPS_BIT_RST
, ha
->mem_ptr
+ IPS_REG_SCPR
);
5060 /* Delay for 1 Second */
5061 MDELAY(IPS_ONE_SEC
);
5063 writeb(0, ha
->mem_ptr
+ IPS_REG_SCPR
);
5065 /* Delay for 1 Second */
5066 MDELAY(IPS_ONE_SEC
);
5068 if ((*ha
->func
.init
) (ha
))
5070 else if (reset_counter
>= 2) {
5079 /****************************************************************************/
5081 /* Routine Name: ips_reset_morpheus */
5083 /* Routine Description: */
5085 /* Reset the controller */
5087 /****************************************************************************/
5089 ips_reset_morpheus(ips_ha_t
* ha
)
5094 METHOD_TRACE("ips_reset_morpheus", 1);
5096 DEBUG_VAR(1, "(%s%d) ips_reset_morpheus: mem addr: %x, irq: %d",
5097 ips_name
, ha
->host_num
, ha
->mem_addr
, ha
->pcidev
->irq
);
5101 while (reset_counter
< 2) {
5104 writel(0x80000000, ha
->mem_ptr
+ IPS_REG_I960_IDR
);
5106 /* Delay for 5 Seconds */
5107 MDELAY(5 * IPS_ONE_SEC
);
5109 /* Do a PCI config read to wait for adapter */
5110 pci_read_config_byte(ha
->pcidev
, 4, &junk
);
5112 if ((*ha
->func
.init
) (ha
))
5114 else if (reset_counter
>= 2) {
5123 /****************************************************************************/
5125 /* Routine Name: ips_statinit */
5127 /* Routine Description: */
5129 /* Initialize the status queues on the controller */
5131 /****************************************************************************/
5133 ips_statinit(ips_ha_t
* ha
)
5135 uint32_t phys_status_start
;
5137 METHOD_TRACE("ips_statinit", 1);
5139 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5140 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5141 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5143 phys_status_start
= ha
->adapt
->hw_status_start
;
5144 outl(phys_status_start
, ha
->io_addr
+ IPS_REG_SQSR
);
5145 outl(phys_status_start
+ IPS_STATUS_Q_SIZE
,
5146 ha
->io_addr
+ IPS_REG_SQER
);
5147 outl(phys_status_start
+ IPS_STATUS_SIZE
,
5148 ha
->io_addr
+ IPS_REG_SQHR
);
5149 outl(phys_status_start
, ha
->io_addr
+ IPS_REG_SQTR
);
5151 ha
->adapt
->hw_status_tail
= phys_status_start
;
5154 /****************************************************************************/
5156 /* Routine Name: ips_statinit_memio */
5158 /* Routine Description: */
5160 /* Initialize the status queues on the controller */
5162 /****************************************************************************/
5164 ips_statinit_memio(ips_ha_t
* ha
)
5166 uint32_t phys_status_start
;
5168 METHOD_TRACE("ips_statinit_memio", 1);
5170 ha
->adapt
->p_status_start
= ha
->adapt
->status
;
5171 ha
->adapt
->p_status_end
= ha
->adapt
->status
+ IPS_MAX_CMDS
;
5172 ha
->adapt
->p_status_tail
= ha
->adapt
->status
;
5174 phys_status_start
= ha
->adapt
->hw_status_start
;
5175 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQSR
);
5176 writel(phys_status_start
+ IPS_STATUS_Q_SIZE
,
5177 ha
->mem_ptr
+ IPS_REG_SQER
);
5178 writel(phys_status_start
+ IPS_STATUS_SIZE
, ha
->mem_ptr
+ IPS_REG_SQHR
);
5179 writel(phys_status_start
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5181 ha
->adapt
->hw_status_tail
= phys_status_start
;
5184 /****************************************************************************/
5186 /* Routine Name: ips_statupd_copperhead */
5188 /* Routine Description: */
5190 /* Remove an element from the status queue */
5192 /****************************************************************************/
5194 ips_statupd_copperhead(ips_ha_t
* ha
)
5196 METHOD_TRACE("ips_statupd_copperhead", 1);
5198 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5199 ha
->adapt
->p_status_tail
++;
5200 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5202 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5203 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5206 outl(ha
->adapt
->hw_status_tail
,
5207 ha
->io_addr
+ IPS_REG_SQTR
);
5209 return (ha
->adapt
->p_status_tail
->value
);
5212 /****************************************************************************/
5214 /* Routine Name: ips_statupd_copperhead_memio */
5216 /* Routine Description: */
5218 /* Remove an element from the status queue */
5220 /****************************************************************************/
5222 ips_statupd_copperhead_memio(ips_ha_t
* ha
)
5224 METHOD_TRACE("ips_statupd_copperhead_memio", 1);
5226 if (ha
->adapt
->p_status_tail
!= ha
->adapt
->p_status_end
) {
5227 ha
->adapt
->p_status_tail
++;
5228 ha
->adapt
->hw_status_tail
+= sizeof (IPS_STATUS
);
5230 ha
->adapt
->p_status_tail
= ha
->adapt
->p_status_start
;
5231 ha
->adapt
->hw_status_tail
= ha
->adapt
->hw_status_start
;
5234 writel(ha
->adapt
->hw_status_tail
, ha
->mem_ptr
+ IPS_REG_SQTR
);
5236 return (ha
->adapt
->p_status_tail
->value
);
5239 /****************************************************************************/
5241 /* Routine Name: ips_statupd_morpheus */
5243 /* Routine Description: */
5245 /* Remove an element from the status queue */
5247 /****************************************************************************/
5249 ips_statupd_morpheus(ips_ha_t
* ha
)
5253 METHOD_TRACE("ips_statupd_morpheus", 1);
5255 val
= readl(ha
->mem_ptr
+ IPS_REG_I2O_OUTMSGQ
);
5260 /****************************************************************************/
5262 /* Routine Name: ips_issue_copperhead */
5264 /* Routine Description: */
5266 /* Send a command down to the controller */
5268 /****************************************************************************/
5270 ips_issue_copperhead(ips_ha_t
* ha
, ips_scb_t
* scb
)
5275 METHOD_TRACE("ips_issue_copperhead", 1);
5277 if (scb
->scsi_cmd
) {
5278 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5282 scb
->cmd
.basic_io
.command_id
,
5283 scb
->bus
, scb
->target_id
, scb
->lun
);
5285 DEBUG_VAR(2, KERN_NOTICE
"(%s%d) ips_issue: logical cmd id %d",
5286 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5292 le32_to_cpu(inl(ha
->io_addr
+ IPS_REG_CCCR
))) & IPS_BIT_SEM
) {
5295 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5296 if (!(val
& IPS_BIT_START_STOP
))
5299 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5300 "ips_issue val [0x%x].\n", val
);
5301 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5302 "ips_issue semaphore chk timeout.\n");
5304 return (IPS_FAILURE
);
5308 outl(scb
->scb_busaddr
, ha
->io_addr
+ IPS_REG_CCSAR
);
5309 outw(IPS_BIT_START_CMD
, ha
->io_addr
+ IPS_REG_CCCR
);
5311 return (IPS_SUCCESS
);
5314 /****************************************************************************/
5316 /* Routine Name: ips_issue_copperhead_memio */
5318 /* Routine Description: */
5320 /* Send a command down to the controller */
5322 /****************************************************************************/
5324 ips_issue_copperhead_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5329 METHOD_TRACE("ips_issue_copperhead_memio", 1);
5331 if (scb
->scsi_cmd
) {
5332 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5336 scb
->cmd
.basic_io
.command_id
,
5337 scb
->bus
, scb
->target_id
, scb
->lun
);
5339 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5340 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5345 while ((val
= readl(ha
->mem_ptr
+ IPS_REG_CCCR
)) & IPS_BIT_SEM
) {
5348 if (++TimeOut
>= IPS_SEM_TIMEOUT
) {
5349 if (!(val
& IPS_BIT_START_STOP
))
5352 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5353 "ips_issue val [0x%x].\n", val
);
5354 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5355 "ips_issue semaphore chk timeout.\n");
5357 return (IPS_FAILURE
);
5361 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_CCSAR
);
5362 writel(IPS_BIT_START_CMD
, ha
->mem_ptr
+ IPS_REG_CCCR
);
5364 return (IPS_SUCCESS
);
5367 /****************************************************************************/
5369 /* Routine Name: ips_issue_i2o */
5371 /* Routine Description: */
5373 /* Send a command down to the controller */
5375 /****************************************************************************/
5377 ips_issue_i2o(ips_ha_t
* ha
, ips_scb_t
* scb
)
5380 METHOD_TRACE("ips_issue_i2o", 1);
5382 if (scb
->scsi_cmd
) {
5383 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5387 scb
->cmd
.basic_io
.command_id
,
5388 scb
->bus
, scb
->target_id
, scb
->lun
);
5390 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5391 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5394 outl(scb
->scb_busaddr
, ha
->io_addr
+ IPS_REG_I2O_INMSGQ
);
5396 return (IPS_SUCCESS
);
5399 /****************************************************************************/
5401 /* Routine Name: ips_issue_i2o_memio */
5403 /* Routine Description: */
5405 /* Send a command down to the controller */
5407 /****************************************************************************/
5409 ips_issue_i2o_memio(ips_ha_t
* ha
, ips_scb_t
* scb
)
5412 METHOD_TRACE("ips_issue_i2o_memio", 1);
5414 if (scb
->scsi_cmd
) {
5415 DEBUG_VAR(2, "(%s%d) ips_issue: cmd 0x%X id %d (%d %d %d)",
5419 scb
->cmd
.basic_io
.command_id
,
5420 scb
->bus
, scb
->target_id
, scb
->lun
);
5422 DEBUG_VAR(2, "(%s%d) ips_issue: logical cmd id %d",
5423 ips_name
, ha
->host_num
, scb
->cmd
.basic_io
.command_id
);
5426 writel(scb
->scb_busaddr
, ha
->mem_ptr
+ IPS_REG_I2O_INMSGQ
);
5428 return (IPS_SUCCESS
);
5431 /****************************************************************************/
5433 /* Routine Name: ips_isintr_copperhead */
5435 /* Routine Description: */
5437 /* Test to see if an interrupt is for us */
5439 /****************************************************************************/
5441 ips_isintr_copperhead(ips_ha_t
* ha
)
5445 METHOD_TRACE("ips_isintr_copperhead", 2);
5447 Isr
= inb(ha
->io_addr
+ IPS_REG_HISR
);
5450 /* ?!?! Nothing really there */
5453 if (Isr
& IPS_BIT_SCE
)
5455 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5456 /* status queue overflow or GHI */
5457 /* just clear the interrupt */
5458 outb(Isr
, ha
->io_addr
+ IPS_REG_HISR
);
5464 /****************************************************************************/
5466 /* Routine Name: ips_isintr_copperhead_memio */
5468 /* Routine Description: */
5470 /* Test to see if an interrupt is for us */
5472 /****************************************************************************/
5474 ips_isintr_copperhead_memio(ips_ha_t
* ha
)
5478 METHOD_TRACE("ips_isintr_memio", 2);
5480 Isr
= readb(ha
->mem_ptr
+ IPS_REG_HISR
);
5483 /* ?!?! Nothing really there */
5486 if (Isr
& IPS_BIT_SCE
)
5488 else if (Isr
& (IPS_BIT_SQO
| IPS_BIT_GHI
)) {
5489 /* status queue overflow or GHI */
5490 /* just clear the interrupt */
5491 writeb(Isr
, ha
->mem_ptr
+ IPS_REG_HISR
);
5497 /****************************************************************************/
5499 /* Routine Name: ips_isintr_morpheus */
5501 /* Routine Description: */
5503 /* Test to see if an interrupt is for us */
5505 /****************************************************************************/
5507 ips_isintr_morpheus(ips_ha_t
* ha
)
5511 METHOD_TRACE("ips_isintr_morpheus", 2);
5513 Isr
= readl(ha
->mem_ptr
+ IPS_REG_I2O_HIR
);
5515 if (Isr
& IPS_BIT_I2O_OPQI
)
5521 /****************************************************************************/
5523 /* Routine Name: ips_wait */
5525 /* Routine Description: */
5527 /* Wait for a command to complete */
5529 /****************************************************************************/
5531 ips_wait(ips_ha_t
* ha
, int time
, int intr
)
5536 METHOD_TRACE("ips_wait", 1);
5541 time
*= IPS_ONE_SEC
; /* convert seconds */
5543 while ((time
> 0) && (!done
)) {
5544 if (intr
== IPS_INTR_ON
) {
5545 if (ha
->waitflag
== FALSE
) {
5550 } else if (intr
== IPS_INTR_IORL
) {
5551 if (ha
->waitflag
== FALSE
) {
5553 * controller generated an interrupt to
5554 * acknowledge completion of the command
5555 * and ips_intr() has serviced the interrupt.
5563 * NOTE: we already have the io_request_lock so
5564 * even if we get an interrupt it won't get serviced
5565 * until after we finish.
5568 (*ha
->func
.intr
) (ha
);
5571 /* This looks like a very evil loop, but it only does this during start-up */
5579 /****************************************************************************/
5581 /* Routine Name: ips_write_driver_status */
5583 /* Routine Description: */
5585 /* Write OS/Driver version to Page 5 of the nvram on the controller */
5587 /****************************************************************************/
5589 ips_write_driver_status(ips_ha_t
* ha
, int intr
)
5591 METHOD_TRACE("ips_write_driver_status", 1);
5593 if (!ips_readwrite_page5(ha
, FALSE
, intr
)) {
5594 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5595 "unable to read NVRAM page 5.\n");
5600 /* check to make sure the page has a valid */
5602 if (le32_to_cpu(ha
->nvram
->signature
) != IPS_NVRAM_P5_SIG
) {
5604 "(%s%d) NVRAM page 5 has an invalid signature: %X.",
5605 ips_name
, ha
->host_num
, ha
->nvram
->signature
);
5606 ha
->nvram
->signature
= IPS_NVRAM_P5_SIG
;
5610 "(%s%d) Ad Type: %d, Ad Slot: %d, BIOS: %c%c%c%c %c%c%c%c.",
5611 ips_name
, ha
->host_num
, le16_to_cpu(ha
->nvram
->adapter_type
),
5612 ha
->nvram
->adapter_slot
, ha
->nvram
->bios_high
[0],
5613 ha
->nvram
->bios_high
[1], ha
->nvram
->bios_high
[2],
5614 ha
->nvram
->bios_high
[3], ha
->nvram
->bios_low
[0],
5615 ha
->nvram
->bios_low
[1], ha
->nvram
->bios_low
[2],
5616 ha
->nvram
->bios_low
[3]);
5618 ips_get_bios_version(ha
, intr
);
5620 /* change values (as needed) */
5621 ha
->nvram
->operating_system
= IPS_OS_LINUX
;
5622 ha
->nvram
->adapter_type
= ha
->ad_type
;
5623 memcpy((char *) ha
->nvram
->driver_high
, IPS_VERSION_HIGH
, 4);
5624 memcpy((char *) ha
->nvram
->driver_low
, IPS_VERSION_LOW
, 4);
5625 memcpy((char *) ha
->nvram
->bios_high
, ha
->bios_version
, 4);
5626 memcpy((char *) ha
->nvram
->bios_low
, ha
->bios_version
+ 4, 4);
5628 ha
->nvram
->versioning
= 0; /* Indicate the Driver Does Not Support Versioning */
5630 /* now update the page */
5631 if (!ips_readwrite_page5(ha
, TRUE
, intr
)) {
5632 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
5633 "unable to write NVRAM page 5.\n");
5638 /* IF NVRAM Page 5 is OK, Use it for Slot Number Info Because Linux Doesn't Do Slots */
5639 ha
->slot_num
= ha
->nvram
->adapter_slot
;
5644 /****************************************************************************/
5646 /* Routine Name: ips_read_adapter_status */
5648 /* Routine Description: */
5650 /* Do an Inquiry command to the adapter */
5652 /****************************************************************************/
5654 ips_read_adapter_status(ips_ha_t
* ha
, int intr
)
5659 METHOD_TRACE("ips_read_adapter_status", 1);
5661 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5663 ips_init_scb(ha
, scb
);
5665 scb
->timeout
= ips_cmd_timeout
;
5666 scb
->cdb
[0] = IPS_CMD_ENQUIRY
;
5668 scb
->cmd
.basic_io
.op_code
= IPS_CMD_ENQUIRY
;
5669 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5670 scb
->cmd
.basic_io
.sg_count
= 0;
5671 scb
->cmd
.basic_io
.lba
= 0;
5672 scb
->cmd
.basic_io
.sector_count
= 0;
5673 scb
->cmd
.basic_io
.log_drv
= 0;
5674 scb
->data_len
= sizeof (*ha
->enq
);
5675 scb
->cmd
.basic_io
.sg_addr
= ha
->enq_busaddr
;
5679 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5680 || (ret
== IPS_SUCCESS_IMM
)
5681 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5687 /****************************************************************************/
5689 /* Routine Name: ips_read_subsystem_parameters */
5691 /* Routine Description: */
5693 /* Read subsystem parameters from the adapter */
5695 /****************************************************************************/
5697 ips_read_subsystem_parameters(ips_ha_t
* ha
, int intr
)
5702 METHOD_TRACE("ips_read_subsystem_parameters", 1);
5704 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5706 ips_init_scb(ha
, scb
);
5708 scb
->timeout
= ips_cmd_timeout
;
5709 scb
->cdb
[0] = IPS_CMD_GET_SUBSYS
;
5711 scb
->cmd
.basic_io
.op_code
= IPS_CMD_GET_SUBSYS
;
5712 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5713 scb
->cmd
.basic_io
.sg_count
= 0;
5714 scb
->cmd
.basic_io
.lba
= 0;
5715 scb
->cmd
.basic_io
.sector_count
= 0;
5716 scb
->cmd
.basic_io
.log_drv
= 0;
5717 scb
->data_len
= sizeof (*ha
->subsys
);
5718 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5722 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5723 || (ret
== IPS_SUCCESS_IMM
)
5724 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5727 memcpy(ha
->subsys
, ha
->ioctl_data
, sizeof(*ha
->subsys
));
5731 /****************************************************************************/
5733 /* Routine Name: ips_read_config */
5735 /* Routine Description: */
5737 /* Read the configuration on the adapter */
5739 /****************************************************************************/
5741 ips_read_config(ips_ha_t
* ha
, int intr
)
5747 METHOD_TRACE("ips_read_config", 1);
5749 /* set defaults for initiator IDs */
5750 for (i
= 0; i
< 4; i
++)
5751 ha
->conf
->init_id
[i
] = 7;
5753 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5755 ips_init_scb(ha
, scb
);
5757 scb
->timeout
= ips_cmd_timeout
;
5758 scb
->cdb
[0] = IPS_CMD_READ_CONF
;
5760 scb
->cmd
.basic_io
.op_code
= IPS_CMD_READ_CONF
;
5761 scb
->cmd
.basic_io
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5762 scb
->data_len
= sizeof (*ha
->conf
);
5763 scb
->cmd
.basic_io
.sg_addr
= ha
->ioctl_busaddr
;
5767 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5768 || (ret
== IPS_SUCCESS_IMM
)
5769 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5771 memset(ha
->conf
, 0, sizeof (IPS_CONF
));
5773 /* reset initiator IDs */
5774 for (i
= 0; i
< 4; i
++)
5775 ha
->conf
->init_id
[i
] = 7;
5777 /* Allow Completed with Errors, so JCRM can access the Adapter to fix the problems */
5778 if ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) ==
5779 IPS_CMD_CMPLT_WERROR
)
5785 memcpy(ha
->conf
, ha
->ioctl_data
, sizeof(*ha
->conf
));
5789 /****************************************************************************/
5791 /* Routine Name: ips_readwrite_page5 */
5793 /* Routine Description: */
5795 /* Read nvram page 5 from the adapter */
5797 /****************************************************************************/
5799 ips_readwrite_page5(ips_ha_t
* ha
, int write
, int intr
)
5804 METHOD_TRACE("ips_readwrite_page5", 1);
5806 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5808 ips_init_scb(ha
, scb
);
5810 scb
->timeout
= ips_cmd_timeout
;
5811 scb
->cdb
[0] = IPS_CMD_RW_NVRAM_PAGE
;
5813 scb
->cmd
.nvram
.op_code
= IPS_CMD_RW_NVRAM_PAGE
;
5814 scb
->cmd
.nvram
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5815 scb
->cmd
.nvram
.page
= 5;
5816 scb
->cmd
.nvram
.write
= write
;
5817 scb
->cmd
.nvram
.reserved
= 0;
5818 scb
->cmd
.nvram
.reserved2
= 0;
5819 scb
->data_len
= sizeof (*ha
->nvram
);
5820 scb
->cmd
.nvram
.buffer_addr
= ha
->ioctl_busaddr
;
5822 memcpy(ha
->ioctl_data
, ha
->nvram
, sizeof(*ha
->nvram
));
5824 /* issue the command */
5826 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5827 || (ret
== IPS_SUCCESS_IMM
)
5828 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1)) {
5830 memset(ha
->nvram
, 0, sizeof (IPS_NVRAM_P5
));
5835 memcpy(ha
->nvram
, ha
->ioctl_data
, sizeof(*ha
->nvram
));
5839 /****************************************************************************/
5841 /* Routine Name: ips_clear_adapter */
5843 /* Routine Description: */
5845 /* Clear the stripe lock tables */
5847 /****************************************************************************/
5849 ips_clear_adapter(ips_ha_t
* ha
, int intr
)
5854 METHOD_TRACE("ips_clear_adapter", 1);
5856 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5858 ips_init_scb(ha
, scb
);
5860 scb
->timeout
= ips_reset_timeout
;
5861 scb
->cdb
[0] = IPS_CMD_CONFIG_SYNC
;
5863 scb
->cmd
.config_sync
.op_code
= IPS_CMD_CONFIG_SYNC
;
5864 scb
->cmd
.config_sync
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5865 scb
->cmd
.config_sync
.channel
= 0;
5866 scb
->cmd
.config_sync
.source_target
= IPS_POCL
;
5867 scb
->cmd
.config_sync
.reserved
= 0;
5868 scb
->cmd
.config_sync
.reserved2
= 0;
5869 scb
->cmd
.config_sync
.reserved3
= 0;
5873 ips_send_wait(ha
, scb
, ips_reset_timeout
, intr
)) == IPS_FAILURE
)
5874 || (ret
== IPS_SUCCESS_IMM
)
5875 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5878 /* send unlock stripe command */
5879 ips_init_scb(ha
, scb
);
5881 scb
->cdb
[0] = IPS_CMD_ERROR_TABLE
;
5882 scb
->timeout
= ips_reset_timeout
;
5884 scb
->cmd
.unlock_stripe
.op_code
= IPS_CMD_ERROR_TABLE
;
5885 scb
->cmd
.unlock_stripe
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5886 scb
->cmd
.unlock_stripe
.log_drv
= 0;
5887 scb
->cmd
.unlock_stripe
.control
= IPS_CSL
;
5888 scb
->cmd
.unlock_stripe
.reserved
= 0;
5889 scb
->cmd
.unlock_stripe
.reserved2
= 0;
5890 scb
->cmd
.unlock_stripe
.reserved3
= 0;
5894 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
)) == IPS_FAILURE
)
5895 || (ret
== IPS_SUCCESS_IMM
)
5896 || ((scb
->basic_status
& IPS_GSC_STATUS_MASK
) > 1))
5902 /****************************************************************************/
5904 /* Routine Name: ips_ffdc_reset */
5906 /* Routine Description: */
5908 /* FFDC: write reset info */
5910 /****************************************************************************/
5912 ips_ffdc_reset(ips_ha_t
* ha
, int intr
)
5916 METHOD_TRACE("ips_ffdc_reset", 1);
5918 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5920 ips_init_scb(ha
, scb
);
5922 scb
->timeout
= ips_cmd_timeout
;
5923 scb
->cdb
[0] = IPS_CMD_FFDC
;
5924 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
5925 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5926 scb
->cmd
.ffdc
.reset_count
= ha
->reset_count
;
5927 scb
->cmd
.ffdc
.reset_type
= 0x80;
5929 /* convert time to what the card wants */
5930 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
5933 ips_send_wait(ha
, scb
, ips_cmd_timeout
, intr
);
5936 /****************************************************************************/
5938 /* Routine Name: ips_ffdc_time */
5940 /* Routine Description: */
5942 /* FFDC: write time info */
5944 /****************************************************************************/
5946 ips_ffdc_time(ips_ha_t
* ha
)
5950 METHOD_TRACE("ips_ffdc_time", 1);
5952 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name
, ha
->host_num
);
5954 scb
= &ha
->scbs
[ha
->max_cmds
- 1];
5956 ips_init_scb(ha
, scb
);
5958 scb
->timeout
= ips_cmd_timeout
;
5959 scb
->cdb
[0] = IPS_CMD_FFDC
;
5960 scb
->cmd
.ffdc
.op_code
= IPS_CMD_FFDC
;
5961 scb
->cmd
.ffdc
.command_id
= IPS_COMMAND_ID(ha
, scb
);
5962 scb
->cmd
.ffdc
.reset_count
= 0;
5963 scb
->cmd
.ffdc
.reset_type
= 0;
5965 /* convert time to what the card wants */
5966 ips_fix_ffdc_time(ha
, scb
, ha
->last_ffdc
);
5969 ips_send_wait(ha
, scb
, ips_cmd_timeout
, IPS_FFDC
);
5972 /****************************************************************************/
5974 /* Routine Name: ips_fix_ffdc_time */
5976 /* Routine Description: */
5977 /* Adjust time_t to what the card wants */
5979 /****************************************************************************/
5981 ips_fix_ffdc_time(ips_ha_t
* ha
, ips_scb_t
* scb
, time64_t current_time
)
5985 METHOD_TRACE("ips_fix_ffdc_time", 1);
5987 time64_to_tm(current_time
, 0, &tm
);
5989 scb
->cmd
.ffdc
.hour
= tm
.tm_hour
;
5990 scb
->cmd
.ffdc
.minute
= tm
.tm_min
;
5991 scb
->cmd
.ffdc
.second
= tm
.tm_sec
;
5992 scb
->cmd
.ffdc
.yearH
= (tm
.tm_year
+ 1900) / 100;
5993 scb
->cmd
.ffdc
.yearL
= tm
.tm_year
% 100;
5994 scb
->cmd
.ffdc
.month
= tm
.tm_mon
+ 1;
5995 scb
->cmd
.ffdc
.day
= tm
.tm_mday
;
5998 /****************************************************************************
5999 * BIOS Flash Routines *
6000 ****************************************************************************/
6002 /****************************************************************************/
6004 /* Routine Name: ips_erase_bios */
6006 /* Routine Description: */
6007 /* Erase the BIOS on the adapter */
6009 /****************************************************************************/
6011 ips_erase_bios(ips_ha_t
* ha
)
6016 METHOD_TRACE("ips_erase_bios", 1);
6020 /* Clear the status register */
6021 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6022 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6023 udelay(25); /* 25 us */
6025 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6026 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6027 udelay(25); /* 25 us */
6030 outb(0x20, ha
->io_addr
+ IPS_REG_FLDP
);
6031 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6032 udelay(25); /* 25 us */
6035 outb(0xD0, ha
->io_addr
+ IPS_REG_FLDP
);
6036 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6037 udelay(25); /* 25 us */
6040 outb(0x70, ha
->io_addr
+ IPS_REG_FLDP
);
6041 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6042 udelay(25); /* 25 us */
6044 timeout
= 80000; /* 80 seconds */
6046 while (timeout
> 0) {
6047 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6048 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6049 udelay(25); /* 25 us */
6052 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6061 /* check for timeout */
6065 /* try to suspend the erase */
6066 outb(0xB0, ha
->io_addr
+ IPS_REG_FLDP
);
6067 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6068 udelay(25); /* 25 us */
6070 /* wait for 10 seconds */
6072 while (timeout
> 0) {
6073 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6074 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6075 udelay(25); /* 25 us */
6078 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6090 /* check for valid VPP */
6095 /* check for successful flash */
6097 /* sequence error */
6100 /* Otherwise, we were successful */
6102 outb(0x50, ha
->io_addr
+ IPS_REG_FLDP
);
6103 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6104 udelay(25); /* 25 us */
6107 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6108 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6109 udelay(25); /* 25 us */
6114 /****************************************************************************/
6116 /* Routine Name: ips_erase_bios_memio */
6118 /* Routine Description: */
6119 /* Erase the BIOS on the adapter */
6121 /****************************************************************************/
6123 ips_erase_bios_memio(ips_ha_t
* ha
)
6128 METHOD_TRACE("ips_erase_bios_memio", 1);
6132 /* Clear the status register */
6133 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6134 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6135 udelay(25); /* 25 us */
6137 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6138 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6139 udelay(25); /* 25 us */
6142 writeb(0x20, ha
->mem_ptr
+ IPS_REG_FLDP
);
6143 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6144 udelay(25); /* 25 us */
6147 writeb(0xD0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6148 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6149 udelay(25); /* 25 us */
6152 writeb(0x70, ha
->mem_ptr
+ IPS_REG_FLDP
);
6153 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6154 udelay(25); /* 25 us */
6156 timeout
= 80000; /* 80 seconds */
6158 while (timeout
> 0) {
6159 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6160 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6161 udelay(25); /* 25 us */
6164 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6173 /* check for timeout */
6177 /* try to suspend the erase */
6178 writeb(0xB0, ha
->mem_ptr
+ IPS_REG_FLDP
);
6179 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6180 udelay(25); /* 25 us */
6182 /* wait for 10 seconds */
6184 while (timeout
> 0) {
6185 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6186 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6187 udelay(25); /* 25 us */
6190 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6202 /* check for valid VPP */
6207 /* check for successful flash */
6209 /* sequence error */
6212 /* Otherwise, we were successful */
6214 writeb(0x50, ha
->mem_ptr
+ IPS_REG_FLDP
);
6215 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6216 udelay(25); /* 25 us */
6219 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6220 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6221 udelay(25); /* 25 us */
6226 /****************************************************************************/
6228 /* Routine Name: ips_program_bios */
6230 /* Routine Description: */
6231 /* Program the BIOS on the adapter */
6233 /****************************************************************************/
6235 ips_program_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6242 METHOD_TRACE("ips_program_bios", 1);
6246 for (i
= 0; i
< buffersize
; i
++) {
6248 outl(i
+ offset
, ha
->io_addr
+ IPS_REG_FLAP
);
6249 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6250 udelay(25); /* 25 us */
6252 outb(0x40, ha
->io_addr
+ IPS_REG_FLDP
);
6253 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6254 udelay(25); /* 25 us */
6256 outb(buffer
[i
], ha
->io_addr
+ IPS_REG_FLDP
);
6257 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6258 udelay(25); /* 25 us */
6260 /* wait up to one second */
6262 while (timeout
> 0) {
6263 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6264 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6265 udelay(25); /* 25 us */
6268 status
= inb(ha
->io_addr
+ IPS_REG_FLDP
);
6279 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6280 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6281 udelay(25); /* 25 us */
6283 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6284 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6285 udelay(25); /* 25 us */
6290 /* check the status */
6291 if (status
& 0x18) {
6292 /* programming error */
6293 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6294 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6295 udelay(25); /* 25 us */
6297 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6298 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6299 udelay(25); /* 25 us */
6305 /* Enable reading */
6306 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6307 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6308 udelay(25); /* 25 us */
6310 outb(0xFF, ha
->io_addr
+ IPS_REG_FLDP
);
6311 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6312 udelay(25); /* 25 us */
6317 /****************************************************************************/
6319 /* Routine Name: ips_program_bios_memio */
6321 /* Routine Description: */
6322 /* Program the BIOS on the adapter */
6324 /****************************************************************************/
6326 ips_program_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6333 METHOD_TRACE("ips_program_bios_memio", 1);
6337 for (i
= 0; i
< buffersize
; i
++) {
6339 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6340 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6341 udelay(25); /* 25 us */
6343 writeb(0x40, ha
->mem_ptr
+ IPS_REG_FLDP
);
6344 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6345 udelay(25); /* 25 us */
6347 writeb(buffer
[i
], ha
->mem_ptr
+ IPS_REG_FLDP
);
6348 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6349 udelay(25); /* 25 us */
6351 /* wait up to one second */
6353 while (timeout
> 0) {
6354 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
) {
6355 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6356 udelay(25); /* 25 us */
6359 status
= readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6370 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6371 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6372 udelay(25); /* 25 us */
6374 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6375 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6376 udelay(25); /* 25 us */
6381 /* check the status */
6382 if (status
& 0x18) {
6383 /* programming error */
6384 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6385 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6386 udelay(25); /* 25 us */
6388 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6389 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6390 udelay(25); /* 25 us */
6396 /* Enable reading */
6397 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6398 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6399 udelay(25); /* 25 us */
6401 writeb(0xFF, ha
->mem_ptr
+ IPS_REG_FLDP
);
6402 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6403 udelay(25); /* 25 us */
6408 /****************************************************************************/
6410 /* Routine Name: ips_verify_bios */
6412 /* Routine Description: */
6413 /* Verify the BIOS on the adapter */
6415 /****************************************************************************/
6417 ips_verify_bios(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6423 METHOD_TRACE("ips_verify_bios", 1);
6426 outl(0, ha
->io_addr
+ IPS_REG_FLAP
);
6427 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6428 udelay(25); /* 25 us */
6430 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0x55)
6433 outl(1, ha
->io_addr
+ IPS_REG_FLAP
);
6434 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6435 udelay(25); /* 25 us */
6436 if (inb(ha
->io_addr
+ IPS_REG_FLDP
) != 0xAA)
6440 for (i
= 2; i
< buffersize
; i
++) {
6442 outl(i
+ offset
, ha
->io_addr
+ IPS_REG_FLAP
);
6443 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6444 udelay(25); /* 25 us */
6446 checksum
= (uint8_t) checksum
+ inb(ha
->io_addr
+ IPS_REG_FLDP
);
6457 /****************************************************************************/
6459 /* Routine Name: ips_verify_bios_memio */
6461 /* Routine Description: */
6462 /* Verify the BIOS on the adapter */
6464 /****************************************************************************/
6466 ips_verify_bios_memio(ips_ha_t
* ha
, char *buffer
, uint32_t buffersize
,
6472 METHOD_TRACE("ips_verify_bios_memio", 1);
6475 writel(0, ha
->mem_ptr
+ IPS_REG_FLAP
);
6476 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6477 udelay(25); /* 25 us */
6479 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0x55)
6482 writel(1, ha
->mem_ptr
+ IPS_REG_FLAP
);
6483 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6484 udelay(25); /* 25 us */
6485 if (readb(ha
->mem_ptr
+ IPS_REG_FLDP
) != 0xAA)
6489 for (i
= 2; i
< buffersize
; i
++) {
6491 writel(i
+ offset
, ha
->mem_ptr
+ IPS_REG_FLAP
);
6492 if (ha
->pcidev
->revision
== IPS_REVID_TROMBONE64
)
6493 udelay(25); /* 25 us */
6496 (uint8_t) checksum
+ readb(ha
->mem_ptr
+ IPS_REG_FLDP
);
6507 /****************************************************************************/
6509 /* Routine Name: ips_abort_init */
6511 /* Routine Description: */
6512 /* cleanup routine for a failed adapter initialization */
6513 /****************************************************************************/
6515 ips_abort_init(ips_ha_t
* ha
, int index
)
6519 ips_ha
[index
] = NULL
;
6520 ips_sh
[index
] = NULL
;
6524 /****************************************************************************/
6526 /* Routine Name: ips_shift_controllers */
6528 /* Routine Description: */
6529 /* helper function for ordering adapters */
6530 /****************************************************************************/
6532 ips_shift_controllers(int lowindex
, int highindex
)
6534 ips_ha_t
*ha_sav
= ips_ha
[highindex
];
6535 struct Scsi_Host
*sh_sav
= ips_sh
[highindex
];
6538 for (i
= highindex
; i
> lowindex
; i
--) {
6539 ips_ha
[i
] = ips_ha
[i
- 1];
6540 ips_sh
[i
] = ips_sh
[i
- 1];
6541 ips_ha
[i
]->host_num
= i
;
6543 ha_sav
->host_num
= lowindex
;
6544 ips_ha
[lowindex
] = ha_sav
;
6545 ips_sh
[lowindex
] = sh_sav
;
6548 /****************************************************************************/
6550 /* Routine Name: ips_order_controllers */
6552 /* Routine Description: */
6553 /* place controllers is the "proper" boot order */
6554 /****************************************************************************/
6556 ips_order_controllers(void)
6558 int i
, j
, tmp
, position
= 0;
6559 IPS_NVRAM_P5
*nvram
;
6562 nvram
= ips_ha
[0]->nvram
;
6564 if (nvram
->adapter_order
[0]) {
6565 for (i
= 1; i
<= nvram
->adapter_order
[0]; i
++) {
6566 for (j
= position
; j
< ips_num_controllers
; j
++) {
6567 switch (ips_ha
[j
]->ad_type
) {
6568 case IPS_ADTYPE_SERVERAID6M
:
6569 case IPS_ADTYPE_SERVERAID7M
:
6570 if (nvram
->adapter_order
[i
] == 'M') {
6571 ips_shift_controllers(position
,
6576 case IPS_ADTYPE_SERVERAID4L
:
6577 case IPS_ADTYPE_SERVERAID4M
:
6578 case IPS_ADTYPE_SERVERAID4MX
:
6579 case IPS_ADTYPE_SERVERAID4LX
:
6580 if (nvram
->adapter_order
[i
] == 'N') {
6581 ips_shift_controllers(position
,
6586 case IPS_ADTYPE_SERVERAID6I
:
6587 case IPS_ADTYPE_SERVERAID5I2
:
6588 case IPS_ADTYPE_SERVERAID5I1
:
6589 case IPS_ADTYPE_SERVERAID7k
:
6590 if (nvram
->adapter_order
[i
] == 'S') {
6591 ips_shift_controllers(position
,
6596 case IPS_ADTYPE_SERVERAID
:
6597 case IPS_ADTYPE_SERVERAID2
:
6598 case IPS_ADTYPE_NAVAJO
:
6599 case IPS_ADTYPE_KIOWA
:
6600 case IPS_ADTYPE_SERVERAID3L
:
6601 case IPS_ADTYPE_SERVERAID3
:
6602 case IPS_ADTYPE_SERVERAID4H
:
6603 if (nvram
->adapter_order
[i
] == 'A') {
6604 ips_shift_controllers(position
,
6614 /* if adapter_order[0], then ordering is complete */
6617 /* old bios, use older ordering */
6619 for (i
= position
; i
< ips_num_controllers
; i
++) {
6620 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I2
||
6621 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID5I1
) {
6622 ips_shift_controllers(position
, i
);
6627 /* if there were no 5I cards, then don't do any extra ordering */
6630 for (i
= position
; i
< ips_num_controllers
; i
++) {
6631 if (ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4L
||
6632 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4M
||
6633 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4LX
||
6634 ips_ha
[i
]->ad_type
== IPS_ADTYPE_SERVERAID4MX
) {
6635 ips_shift_controllers(position
, i
);
6643 /****************************************************************************/
6645 /* Routine Name: ips_register_scsi */
6647 /* Routine Description: */
6648 /* perform any registration and setup with the scsi layer */
6649 /****************************************************************************/
6651 ips_register_scsi(int index
)
6653 struct Scsi_Host
*sh
;
6654 ips_ha_t
*ha
, *oldha
= ips_ha
[index
];
6655 sh
= scsi_host_alloc(&ips_driver_template
, sizeof (ips_ha_t
));
6657 IPS_PRINTK(KERN_WARNING
, oldha
->pcidev
,
6658 "Unable to register controller with SCSI subsystem\n");
6662 memcpy(ha
, oldha
, sizeof (ips_ha_t
));
6663 free_irq(oldha
->pcidev
->irq
, oldha
);
6664 /* Install the interrupt handler with the new ha */
6665 if (request_irq(ha
->pcidev
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
6666 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
6667 "Unable to install interrupt handler\n");
6673 /* Store away needed values for later use */
6674 sh
->unique_id
= (ha
->io_addr
) ? ha
->io_addr
: ha
->mem_addr
;
6675 sh
->sg_tablesize
= sh
->hostt
->sg_tablesize
;
6676 sh
->can_queue
= sh
->hostt
->can_queue
;
6677 sh
->cmd_per_lun
= sh
->hostt
->cmd_per_lun
;
6678 sh
->max_sectors
= 128;
6680 sh
->max_id
= ha
->ntargets
;
6681 sh
->max_lun
= ha
->nlun
;
6682 sh
->max_channel
= ha
->nbus
- 1;
6683 sh
->can_queue
= ha
->max_cmds
- 1;
6685 if (scsi_add_host(sh
, &ha
->pcidev
->dev
))
6696 free_irq(ha
->pcidev
->irq
, ha
);
6702 /*---------------------------------------------------------------------------*/
6703 /* Routine Name: ips_remove_device */
6705 /* Routine Description: */
6706 /* Remove one Adapter ( Hot Plugging ) */
6707 /*---------------------------------------------------------------------------*/
6709 ips_remove_device(struct pci_dev
*pci_dev
)
6711 struct Scsi_Host
*sh
= pci_get_drvdata(pci_dev
);
6713 pci_set_drvdata(pci_dev
, NULL
);
6717 pci_release_regions(pci_dev
);
6718 pci_disable_device(pci_dev
);
6721 /****************************************************************************/
6723 /* Routine Name: ips_module_init */
6725 /* Routine Description: */
6726 /* function called on module load */
6727 /****************************************************************************/
6729 ips_module_init(void)
6731 #if !defined(__i386__) && !defined(__ia64__) && !defined(__x86_64__)
6732 printk(KERN_ERR
"ips: This driver has only been tested on the x86/ia64/x86_64 platforms\n");
6733 add_taint(TAINT_CPU_OUT_OF_SPEC
, LOCKDEP_STILL_OK
);
6736 if (pci_register_driver(&ips_pci_driver
) < 0)
6738 ips_driver_template
.module
= THIS_MODULE
;
6739 ips_order_controllers();
6740 if (!ips_detect(&ips_driver_template
)) {
6741 pci_unregister_driver(&ips_pci_driver
);
6744 register_reboot_notifier(&ips_notifier
);
6748 /****************************************************************************/
6750 /* Routine Name: ips_module_exit */
6752 /* Routine Description: */
6753 /* function called on module unload */
6754 /****************************************************************************/
6756 ips_module_exit(void)
6758 pci_unregister_driver(&ips_pci_driver
);
6759 unregister_reboot_notifier(&ips_notifier
);
6762 module_init(ips_module_init
);
6763 module_exit(ips_module_exit
);
6765 /*---------------------------------------------------------------------------*/
6766 /* Routine Name: ips_insert_device */
6768 /* Routine Description: */
6769 /* Add One Adapter ( Hot Plug ) */
6772 /* 0 if Successful, else non-zero */
6773 /*---------------------------------------------------------------------------*/
6775 ips_insert_device(struct pci_dev
*pci_dev
, const struct pci_device_id
*ent
)
6780 METHOD_TRACE("ips_insert_device", 1);
6781 rc
= pci_enable_device(pci_dev
);
6785 rc
= pci_request_regions(pci_dev
, "ips");
6789 rc
= ips_init_phase1(pci_dev
, &index
);
6791 rc
= ips_init_phase2(index
);
6794 if (ips_register_scsi(index
)) {
6795 ips_free(ips_ha
[index
]);
6800 ips_num_controllers
++;
6802 ips_next_controller
= ips_num_controllers
;
6806 goto err_out_regions
;
6809 pci_set_drvdata(pci_dev
, ips_sh
[index
]);
6813 pci_release_regions(pci_dev
);
6815 pci_disable_device(pci_dev
);
6819 /*---------------------------------------------------------------------------*/
6820 /* Routine Name: ips_init_phase1 */
6822 /* Routine Description: */
6823 /* Adapter Initialization */
6826 /* 0 if Successful, else non-zero */
6827 /*---------------------------------------------------------------------------*/
6829 ips_init_phase1(struct pci_dev
*pci_dev
, int *indexPtr
)
6838 dma_addr_t dma_address
;
6839 char __iomem
*ioremap_ptr
;
6840 char __iomem
*mem_ptr
;
6843 METHOD_TRACE("ips_init_phase1", 1);
6844 index
= IPS_MAX_ADAPTERS
;
6845 for (j
= 0; j
< IPS_MAX_ADAPTERS
; j
++) {
6846 if (ips_ha
[j
] == NULL
) {
6852 if (index
>= IPS_MAX_ADAPTERS
)
6855 /* Init MEM/IO addresses to 0 */
6861 for (j
= 0; j
< 2; j
++) {
6862 if (!pci_resource_start(pci_dev
, j
))
6865 if (pci_resource_flags(pci_dev
, j
) & IORESOURCE_IO
) {
6866 io_addr
= pci_resource_start(pci_dev
, j
);
6867 io_len
= pci_resource_len(pci_dev
, j
);
6869 mem_addr
= pci_resource_start(pci_dev
, j
);
6870 mem_len
= pci_resource_len(pci_dev
, j
);
6874 /* setup memory mapped area (if applicable) */
6879 base
= mem_addr
& PAGE_MASK
;
6880 offs
= mem_addr
- base
;
6881 ioremap_ptr
= ioremap(base
, PAGE_SIZE
);
6884 mem_ptr
= ioremap_ptr
+ offs
;
6890 /* found a controller */
6891 ha
= kzalloc(sizeof (ips_ha_t
), GFP_KERNEL
);
6893 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6894 "Unable to allocate temporary ha struct\n");
6898 ips_sh
[index
] = NULL
;
6902 /* Store info in HA structure */
6903 ha
->io_addr
= io_addr
;
6904 ha
->io_len
= io_len
;
6905 ha
->mem_addr
= mem_addr
;
6906 ha
->mem_len
= mem_len
;
6907 ha
->mem_ptr
= mem_ptr
;
6908 ha
->ioremap_ptr
= ioremap_ptr
;
6909 ha
->host_num
= (uint32_t) index
;
6910 ha
->slot_num
= PCI_SLOT(pci_dev
->devfn
);
6911 ha
->pcidev
= pci_dev
;
6914 * Set the pci_dev's dma_mask. Not all adapters support 64bit
6915 * addressing so don't enable it if the adapter can't support
6916 * it! Also, don't use 64bit addressing if dma addresses
6917 * are guaranteed to be < 4G.
6919 if (sizeof(dma_addr_t
) > 4 && IPS_HAS_ENH_SGLIST(ha
) &&
6920 !dma_set_mask(&ha
->pcidev
->dev
, DMA_BIT_MASK(64))) {
6921 (ha
)->flags
|= IPS_HA_ENH_SG
;
6923 if (dma_set_mask(&ha
->pcidev
->dev
, DMA_BIT_MASK(32)) != 0) {
6924 printk(KERN_WARNING
"Unable to set DMA Mask\n");
6925 return ips_abort_init(ha
, index
);
6928 if(ips_cd_boot
&& !ips_FlashData
){
6929 ips_FlashData
= dma_alloc_coherent(&pci_dev
->dev
,
6930 PAGE_SIZE
<< 7, &ips_flashbusaddr
, GFP_KERNEL
);
6933 ha
->enq
= dma_alloc_coherent(&pci_dev
->dev
, sizeof (IPS_ENQ
),
6934 &ha
->enq_busaddr
, GFP_KERNEL
);
6936 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6937 "Unable to allocate host inquiry structure\n");
6938 return ips_abort_init(ha
, index
);
6941 ha
->adapt
= dma_alloc_coherent(&pci_dev
->dev
,
6942 sizeof (IPS_ADAPTER
) + sizeof (IPS_IO_CMD
),
6943 &dma_address
, GFP_KERNEL
);
6945 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6946 "Unable to allocate host adapt & dummy structures\n");
6947 return ips_abort_init(ha
, index
);
6949 ha
->adapt
->hw_status_start
= dma_address
;
6950 ha
->dummy
= (void *) (ha
->adapt
+ 1);
6954 ha
->logical_drive_info
= dma_alloc_coherent(&pci_dev
->dev
,
6955 sizeof (IPS_LD_INFO
), &dma_address
, GFP_KERNEL
);
6956 if (!ha
->logical_drive_info
) {
6957 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6958 "Unable to allocate logical drive info structure\n");
6959 return ips_abort_init(ha
, index
);
6961 ha
->logical_drive_info_dma_addr
= dma_address
;
6964 ha
->conf
= kmalloc(sizeof (IPS_CONF
), GFP_KERNEL
);
6967 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6968 "Unable to allocate host conf structure\n");
6969 return ips_abort_init(ha
, index
);
6972 ha
->nvram
= kmalloc(sizeof (IPS_NVRAM_P5
), GFP_KERNEL
);
6975 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6976 "Unable to allocate host NVRAM structure\n");
6977 return ips_abort_init(ha
, index
);
6980 ha
->subsys
= kmalloc(sizeof (IPS_SUBSYS
), GFP_KERNEL
);
6983 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6984 "Unable to allocate host subsystem structure\n");
6985 return ips_abort_init(ha
, index
);
6988 /* the ioctl buffer is now used during adapter initialization, so its
6989 * successful allocation is now required */
6990 if (ips_ioctlsize
< PAGE_SIZE
)
6991 ips_ioctlsize
= PAGE_SIZE
;
6993 ha
->ioctl_data
= dma_alloc_coherent(&pci_dev
->dev
, ips_ioctlsize
,
6994 &ha
->ioctl_busaddr
, GFP_KERNEL
);
6995 ha
->ioctl_len
= ips_ioctlsize
;
6996 if (!ha
->ioctl_data
) {
6997 IPS_PRINTK(KERN_WARNING
, pci_dev
,
6998 "Unable to allocate IOCTL data\n");
6999 return ips_abort_init(ha
, index
);
7005 ips_setup_funclist(ha
);
7007 if ((IPS_IS_MORPHEUS(ha
)) || (IPS_IS_MARCO(ha
))) {
7008 /* If Morpheus appears dead, reset it */
7009 IsDead
= readl(ha
->mem_ptr
+ IPS_REG_I960_MSG1
);
7010 if (IsDead
== 0xDEADBEEF) {
7011 ips_reset_morpheus(ha
);
7016 * Initialize the card if it isn't already
7019 if (!(*ha
->func
.isinit
) (ha
)) {
7020 if (!(*ha
->func
.init
) (ha
)) {
7022 * Initialization failed
7024 IPS_PRINTK(KERN_WARNING
, pci_dev
,
7025 "Unable to initialize controller\n");
7026 return ips_abort_init(ha
, index
);
7034 /*---------------------------------------------------------------------------*/
7035 /* Routine Name: ips_init_phase2 */
7037 /* Routine Description: */
7038 /* Adapter Initialization Phase 2 */
7041 /* 0 if Successful, else non-zero */
7042 /*---------------------------------------------------------------------------*/
7044 ips_init_phase2(int index
)
7050 METHOD_TRACE("ips_init_phase2", 1);
7052 ips_ha
[index
] = NULL
;
7056 /* Install the interrupt handler */
7057 if (request_irq(ha
->pcidev
->irq
, do_ipsintr
, IRQF_SHARED
, ips_name
, ha
)) {
7058 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7059 "Unable to install interrupt handler\n");
7060 return ips_abort_init(ha
, index
);
7064 * Allocate a temporary SCB for initialization
7067 if (!ips_allocatescbs(ha
)) {
7068 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7069 "Unable to allocate a CCB\n");
7070 free_irq(ha
->pcidev
->irq
, ha
);
7071 return ips_abort_init(ha
, index
);
7074 if (!ips_hainit(ha
)) {
7075 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7076 "Unable to initialize controller\n");
7077 free_irq(ha
->pcidev
->irq
, ha
);
7078 return ips_abort_init(ha
, index
);
7080 /* Free the temporary SCB */
7081 ips_deallocatescbs(ha
, 1);
7084 if (!ips_allocatescbs(ha
)) {
7085 IPS_PRINTK(KERN_WARNING
, ha
->pcidev
,
7086 "Unable to allocate CCBs\n");
7087 free_irq(ha
->pcidev
->irq
, ha
);
7088 return ips_abort_init(ha
, index
);
7094 MODULE_LICENSE("GPL");
7095 MODULE_DESCRIPTION("IBM ServeRAID Adapter Driver " IPS_VER_STRING
);
7096 MODULE_VERSION(IPS_VER_STRING
);
7100 * Overrides for Emacs so that we almost follow Linus's tabbing style.
7101 * Emacs will notice this stuff at the end of the file and automatically
7102 * adjust the settings for this buffer only. This must remain at the end
7104 * ---------------------------------------------------------------------------
7107 * c-brace-imaginary-offset: 0
7108 * c-brace-offset: -2
7109 * c-argdecl-indent: 2
7110 * c-label-offset: -2
7111 * c-continued-statement-offset: 2
7112 * c-continued-brace-offset: 0
7113 * indent-tabs-mode: nil