1 // SPDX-License-Identifier: GPL-2.0-only
2 /* sun3x_esp.c: ESP front-end for Sun3x systems.
4 * Copyright (C) 2007,2008 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
7 #include <linux/kernel.h>
9 #include <linux/types.h>
10 #include <linux/delay.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/platform_device.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/interrupt.h>
18 #include <asm/sun3x.h>
22 /* DMA controller reg offsets */
23 #define DMA_CSR 0x00UL /* rw DMA control/status register 0x00 */
24 #define DMA_ADDR 0x04UL /* rw DMA transfer address register 0x04 */
25 #define DMA_COUNT 0x08UL /* rw DMA transfer count register 0x08 */
26 #define DMA_TEST 0x0cUL /* rw DMA test/debug register 0x0c */
28 #include <scsi/scsi_host.h>
32 #define DRV_MODULE_NAME "sun3x_esp"
33 #define PFX DRV_MODULE_NAME ": "
34 #define DRV_VERSION "1.000"
35 #define DRV_MODULE_RELDATE "Nov 1, 2007"
38 * m68k always assumes readl/writel operate on little endian
39 * mmio space; this is wrong at least for Sun3x, so we
40 * need to workaround this until a proper way is found
43 #define dma_read32(REG) \
44 readl(esp->dma_regs + (REG))
45 #define dma_write32(VAL, REG) \
46 writel((VAL), esp->dma_regs + (REG))
48 #define dma_read32(REG) \
49 *(volatile u32 *)(esp->dma_regs + (REG))
50 #define dma_write32(VAL, REG) \
51 do { *(volatile u32 *)(esp->dma_regs + (REG)) = (VAL); } while (0)
54 static void sun3x_esp_write8(struct esp
*esp
, u8 val
, unsigned long reg
)
56 writeb(val
, esp
->regs
+ (reg
* 4UL));
59 static u8
sun3x_esp_read8(struct esp
*esp
, unsigned long reg
)
61 return readb(esp
->regs
+ (reg
* 4UL));
64 static int sun3x_esp_irq_pending(struct esp
*esp
)
66 if (dma_read32(DMA_CSR
) & (DMA_HNDL_INTR
| DMA_HNDL_ERROR
))
71 static void sun3x_esp_reset_dma(struct esp
*esp
)
75 val
= dma_read32(DMA_CSR
);
76 dma_write32(val
| DMA_RST_SCSI
, DMA_CSR
);
77 dma_write32(val
& ~DMA_RST_SCSI
, DMA_CSR
);
79 /* Enable interrupts. */
80 val
= dma_read32(DMA_CSR
);
81 dma_write32(val
| DMA_INT_ENAB
, DMA_CSR
);
84 static void sun3x_esp_dma_drain(struct esp
*esp
)
89 csr
= dma_read32(DMA_CSR
);
90 if (!(csr
& DMA_FIFO_ISDRAIN
))
93 dma_write32(csr
| DMA_FIFO_STDRAIN
, DMA_CSR
);
96 while (dma_read32(DMA_CSR
) & DMA_FIFO_ISDRAIN
) {
98 printk(KERN_ALERT PFX
"esp%d: DMA will not drain!\n",
99 esp
->host
->unique_id
);
106 static void sun3x_esp_dma_invalidate(struct esp
*esp
)
112 while ((val
= dma_read32(DMA_CSR
)) & DMA_PEND_READ
) {
114 printk(KERN_ALERT PFX
"esp%d: DMA will not "
115 "invalidate!\n", esp
->host
->unique_id
);
121 val
&= ~(DMA_ENABLE
| DMA_ST_WRITE
| DMA_BCNT_ENAB
);
123 dma_write32(val
, DMA_CSR
);
124 val
&= ~DMA_FIFO_INV
;
125 dma_write32(val
, DMA_CSR
);
128 static void sun3x_esp_send_dma_cmd(struct esp
*esp
, u32 addr
, u32 esp_count
,
129 u32 dma_count
, int write
, u8 cmd
)
133 BUG_ON(!(cmd
& ESP_CMD_DMA
));
135 sun3x_esp_write8(esp
, (esp_count
>> 0) & 0xff, ESP_TCLOW
);
136 sun3x_esp_write8(esp
, (esp_count
>> 8) & 0xff, ESP_TCMED
);
137 csr
= dma_read32(DMA_CSR
);
142 csr
&= ~DMA_ST_WRITE
;
143 dma_write32(csr
, DMA_CSR
);
144 dma_write32(addr
, DMA_ADDR
);
146 scsi_esp_cmd(esp
, cmd
);
149 static int sun3x_esp_dma_error(struct esp
*esp
)
151 u32 csr
= dma_read32(DMA_CSR
);
153 if (csr
& DMA_HNDL_ERROR
)
159 static const struct esp_driver_ops sun3x_esp_ops
= {
160 .esp_write8
= sun3x_esp_write8
,
161 .esp_read8
= sun3x_esp_read8
,
162 .irq_pending
= sun3x_esp_irq_pending
,
163 .reset_dma
= sun3x_esp_reset_dma
,
164 .dma_drain
= sun3x_esp_dma_drain
,
165 .dma_invalidate
= sun3x_esp_dma_invalidate
,
166 .send_dma_cmd
= sun3x_esp_send_dma_cmd
,
167 .dma_error
= sun3x_esp_dma_error
,
170 static int esp_sun3x_probe(struct platform_device
*dev
)
172 struct scsi_host_template
*tpnt
= &scsi_esp_template
;
173 struct Scsi_Host
*host
;
175 struct resource
*res
;
178 host
= scsi_host_alloc(tpnt
, sizeof(struct esp
));
183 esp
= shost_priv(host
);
186 esp
->dev
= &dev
->dev
;
187 esp
->ops
= &sun3x_esp_ops
;
189 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 0);
190 if (!res
|| !res
->start
)
193 esp
->regs
= ioremap(res
->start
, 0x20);
195 goto fail_unmap_regs
;
197 res
= platform_get_resource(dev
, IORESOURCE_MEM
, 1);
198 if (!res
|| !res
->start
)
199 goto fail_unmap_regs
;
201 esp
->dma_regs
= ioremap(res
->start
, 0x10);
203 esp
->command_block
= dma_alloc_coherent(esp
->dev
, 16,
204 &esp
->command_block_dma
,
206 if (!esp
->command_block
)
207 goto fail_unmap_regs_dma
;
209 host
->irq
= platform_get_irq(dev
, 0);
210 err
= request_irq(host
->irq
, scsi_esp_intr
, IRQF_SHARED
,
213 goto fail_unmap_command_block
;
216 esp
->host
->this_id
= esp
->scsi_id
;
217 esp
->scsi_id_mask
= (1 << esp
->scsi_id
);
218 esp
->cfreq
= 20000000;
220 dev_set_drvdata(&dev
->dev
, esp
);
222 err
= scsi_esp_register(esp
);
229 free_irq(host
->irq
, esp
);
230 fail_unmap_command_block
:
231 dma_free_coherent(esp
->dev
, 16,
233 esp
->command_block_dma
);
235 iounmap(esp
->dma_regs
);
244 static int esp_sun3x_remove(struct platform_device
*dev
)
246 struct esp
*esp
= dev_get_drvdata(&dev
->dev
);
247 unsigned int irq
= esp
->host
->irq
;
250 scsi_esp_unregister(esp
);
252 /* Disable interrupts. */
253 val
= dma_read32(DMA_CSR
);
254 dma_write32(val
& ~DMA_INT_ENAB
, DMA_CSR
);
257 dma_free_coherent(esp
->dev
, 16,
259 esp
->command_block_dma
);
261 scsi_host_put(esp
->host
);
266 static struct platform_driver esp_sun3x_driver
= {
267 .probe
= esp_sun3x_probe
,
268 .remove
= esp_sun3x_remove
,
273 module_platform_driver(esp_sun3x_driver
);
275 MODULE_DESCRIPTION("Sun3x ESP SCSI driver");
276 MODULE_AUTHOR("Thomas Bogendoerfer (tsbogend@alpha.franken.de)");
277 MODULE_LICENSE("GPL");
278 MODULE_VERSION(DRV_VERSION
);
279 MODULE_ALIAS("platform:sun3x_esp");