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Merge tag 'block-5.11-2021-01-10' of git://git.kernel.dk/linux-block
[linux/fpc-iii.git] / drivers / tty / serial / ar933x_uart.c
blobc2be7cf91399295b6be57734253d9a67b0c092da
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
8 */
9
10 #include <linux/module.h>
11 #include <linux/ioport.h>
12 #include <linux/init.h>
13 #include <linux/console.h>
14 #include <linux/sysrq.h>
15 #include <linux/delay.h>
16 #include <linux/gpio/consumer.h>
17 #include <linux/platform_device.h>
18 #include <linux/of.h>
19 #include <linux/of_platform.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22 #include <linux/serial_core.h>
23 #include <linux/serial.h>
24 #include <linux/slab.h>
25 #include <linux/io.h>
26 #include <linux/irq.h>
27 #include <linux/clk.h>
28
29 #include <asm/div64.h>
30
31 #include <asm/mach-ath79/ar933x_uart.h>
32
33 #include "serial_mctrl_gpio.h"
34
35 #define DRIVER_NAME "ar933x-uart"
36
37 #define AR933X_UART_MAX_SCALE 0xff
38 #define AR933X_UART_MAX_STEP 0xffff
39
40 #define AR933X_UART_MIN_BAUD 300
41 #define AR933X_UART_MAX_BAUD 3000000
42
43 #define AR933X_DUMMY_STATUS_RD 0x01
44
45 static struct uart_driver ar933x_uart_driver;
46
47 struct ar933x_uart_port {
48 struct uart_port port;
49 unsigned int ier; /* shadow Interrupt Enable Register */
50 unsigned int min_baud;
51 unsigned int max_baud;
52 struct clk *clk;
53 struct mctrl_gpios *gpios;
54 struct gpio_desc *rts_gpiod;
55 };
56
57 static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 int offset)
59 {
60 return readl(up->port.membase + offset);
61 }
62
63 static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
65 {
66 writel(value, up->port.membase + offset);
67 }
68
69 static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 unsigned int offset,
71 unsigned int mask,
72 unsigned int val)
73 {
74 unsigned int t;
75
76 t = ar933x_uart_read(up, offset);
77 t &= ~mask;
78 t |= val;
79 ar933x_uart_write(up, offset, t);
80 }
81
82 static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 unsigned int offset,
84 unsigned int val)
85 {
86 ar933x_uart_rmw(up, offset, 0, val);
87 }
88
89 static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 unsigned int offset,
91 unsigned int val)
92 {
93 ar933x_uart_rmw(up, offset, val, 0);
94 }
95
96 static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97 {
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100 }
101
102 static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103 {
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106 }
107
108 static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up)
109 {
110 up->ier |= AR933X_UART_INT_RX_VALID;
111 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
112 }
113
114 static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up)
115 {
116 up->ier &= ~AR933X_UART_INT_RX_VALID;
117 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
118 }
119
120 static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
121 {
122 unsigned int rdata;
123
124 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
125 rdata |= AR933X_UART_DATA_TX_CSR;
126 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
127 }
128
129 static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
130 {
131 struct ar933x_uart_port *up =
132 container_of(port, struct ar933x_uart_port, port);
133 unsigned long flags;
134 unsigned int rdata;
135
136 spin_lock_irqsave(&up->port.lock, flags);
137 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
138 spin_unlock_irqrestore(&up->port.lock, flags);
139
140 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
141 }
142
143 static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
144 {
145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
147 int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
148
149 mctrl_gpio_get(up->gpios, &ret);
150
151 return ret;
152 }
153
154 static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
155 {
156 struct ar933x_uart_port *up =
157 container_of(port, struct ar933x_uart_port, port);
158
159 mctrl_gpio_set(up->gpios, mctrl);
160 }
161
162 static void ar933x_uart_start_tx(struct uart_port *port)
163 {
164 struct ar933x_uart_port *up =
165 container_of(port, struct ar933x_uart_port, port);
166
167 ar933x_uart_start_tx_interrupt(up);
168 }
169
170 static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up)
171 {
172 unsigned int status;
173 unsigned int timeout = 60000;
174
175 /* Wait up to 60ms for the character(s) to be sent. */
176 do {
177 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
178 if (--timeout == 0)
179 break;
180 udelay(1);
181 } while (status & AR933X_UART_CS_TX_BUSY);
182
183 if (timeout == 0)
184 dev_err(up->port.dev, "waiting for TX timed out\n");
185 }
186
187 static void ar933x_uart_rx_flush(struct ar933x_uart_port *up)
188 {
189 unsigned int status;
190
191 /* clear RX_VALID interrupt */
192 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID);
193
194 /* remove characters from the RX FIFO */
195 do {
196 ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR);
197 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
198 } while (status & AR933X_UART_DATA_RX_CSR);
199 }
200
201 static void ar933x_uart_stop_tx(struct uart_port *port)
202 {
203 struct ar933x_uart_port *up =
204 container_of(port, struct ar933x_uart_port, port);
205
206 ar933x_uart_stop_tx_interrupt(up);
207 }
208
209 static void ar933x_uart_stop_rx(struct uart_port *port)
210 {
211 struct ar933x_uart_port *up =
212 container_of(port, struct ar933x_uart_port, port);
213
214 ar933x_uart_stop_rx_interrupt(up);
215 }
216
217 static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
218 {
219 struct ar933x_uart_port *up =
220 container_of(port, struct ar933x_uart_port, port);
221 unsigned long flags;
222
223 spin_lock_irqsave(&up->port.lock, flags);
224 if (break_state == -1)
225 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
226 AR933X_UART_CS_TX_BREAK);
227 else
228 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
229 AR933X_UART_CS_TX_BREAK);
230 spin_unlock_irqrestore(&up->port.lock, flags);
231 }
232
233 /*
234 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
235 */
236 static unsigned long ar933x_uart_get_baud(unsigned int clk,
237 unsigned int scale,
238 unsigned int step)
239 {
240 u64 t;
241 u32 div;
242
243 div = (2 << 16) * (scale + 1);
244 t = clk;
245 t *= step;
246 t += (div / 2);
247 do_div(t, div);
248
249 return t;
250 }
251
252 static void ar933x_uart_get_scale_step(unsigned int clk,
253 unsigned int baud,
254 unsigned int *scale,
255 unsigned int *step)
256 {
257 unsigned int tscale;
258 long min_diff;
259
260 *scale = 0;
261 *step = 0;
262
263 min_diff = baud;
264 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
265 u64 tstep;
266 int diff;
267
268 tstep = baud * (tscale + 1);
269 tstep *= (2 << 16);
270 do_div(tstep, clk);
271
272 if (tstep > AR933X_UART_MAX_STEP)
273 break;
274
275 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
276 if (diff < min_diff) {
277 min_diff = diff;
278 *scale = tscale;
279 *step = tstep;
280 }
281 }
282 }
283
284 static void ar933x_uart_set_termios(struct uart_port *port,
285 struct ktermios *new,
286 struct ktermios *old)
287 {
288 struct ar933x_uart_port *up =
289 container_of(port, struct ar933x_uart_port, port);
290 unsigned int cs;
291 unsigned long flags;
292 unsigned int baud, scale, step;
293
294 /* Only CS8 is supported */
295 new->c_cflag &= ~CSIZE;
296 new->c_cflag |= CS8;
297
298 /* Only one stop bit is supported */
299 new->c_cflag &= ~CSTOPB;
300
301 cs = 0;
302 if (new->c_cflag & PARENB) {
303 if (!(new->c_cflag & PARODD))
304 cs |= AR933X_UART_CS_PARITY_EVEN;
305 else
306 cs |= AR933X_UART_CS_PARITY_ODD;
307 } else {
308 cs |= AR933X_UART_CS_PARITY_NONE;
309 }
310
311 /* Mark/space parity is not supported */
312 new->c_cflag &= ~CMSPAR;
313
314 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
315 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
316
317 /*
318 * Ok, we're now changing the port state. Do it with
319 * interrupts disabled.
320 */
321 spin_lock_irqsave(&up->port.lock, flags);
322
323 /* disable the UART */
324 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
325 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
326
327 /* Update the per-port timeout. */
328 uart_update_timeout(port, new->c_cflag, baud);
329
330 up->port.ignore_status_mask = 0;
331
332 /* ignore all characters if CREAD is not set */
333 if ((new->c_cflag & CREAD) == 0)
334 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
335
336 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
337 scale << AR933X_UART_CLOCK_SCALE_S | step);
338
339 /* setup configuration register */
340 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
341
342 /* enable host interrupt */
343 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
344 AR933X_UART_CS_HOST_INT_EN);
345
346 /* enable RX and TX ready overide */
347 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
348 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
349
350 /* reenable the UART */
351 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
352 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
353 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
354
355 spin_unlock_irqrestore(&up->port.lock, flags);
356
357 if (tty_termios_baud_rate(new))
358 tty_termios_encode_baud_rate(new, baud, baud);
359 }
360
361 static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
362 {
363 struct tty_port *port = &up->port.state->port;
364 int max_count = 256;
365
366 do {
367 unsigned int rdata;
368 unsigned char ch;
369
370 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
371 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
372 break;
373
374 /* remove the character from the FIFO */
375 ar933x_uart_write(up, AR933X_UART_DATA_REG,
376 AR933X_UART_DATA_RX_CSR);
377
378 up->port.icount.rx++;
379 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
380
381 if (uart_handle_sysrq_char(&up->port, ch))
382 continue;
383
384 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
385 tty_insert_flip_char(port, ch, TTY_NORMAL);
386 } while (max_count-- > 0);
387
388 spin_unlock(&up->port.lock);
389 tty_flip_buffer_push(port);
390 spin_lock(&up->port.lock);
391 }
392
393 static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
394 {
395 struct circ_buf *xmit = &up->port.state->xmit;
396 struct serial_rs485 *rs485conf = &up->port.rs485;
397 int count;
398 bool half_duplex_send = false;
399
400 if (uart_tx_stopped(&up->port))
401 return;
402
403 if ((rs485conf->flags & SER_RS485_ENABLED) &&
404 (up->port.x_char || !uart_circ_empty(xmit))) {
405 ar933x_uart_stop_rx_interrupt(up);
406 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND));
407 half_duplex_send = true;
408 }
409
410 count = up->port.fifosize;
411 do {
412 unsigned int rdata;
413
414 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
415 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
416 break;
417
418 if (up->port.x_char) {
419 ar933x_uart_putc(up, up->port.x_char);
420 up->port.icount.tx++;
421 up->port.x_char = 0;
422 continue;
423 }
424
425 if (uart_circ_empty(xmit))
426 break;
427
428 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
429
430 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
431 up->port.icount.tx++;
432 } while (--count > 0);
433
434 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
435 uart_write_wakeup(&up->port);
436
437 if (!uart_circ_empty(xmit)) {
438 ar933x_uart_start_tx_interrupt(up);
439 } else if (half_duplex_send) {
440 ar933x_uart_wait_tx_complete(up);
441 ar933x_uart_rx_flush(up);
442 ar933x_uart_start_rx_interrupt(up);
443 gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND));
444 }
445 }
446
447 static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
448 {
449 struct ar933x_uart_port *up = dev_id;
450 unsigned int status;
451
452 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
453 if ((status & AR933X_UART_CS_HOST_INT) == 0)
454 return IRQ_NONE;
455
456 spin_lock(&up->port.lock);
457
458 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
459 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
460
461 if (status & AR933X_UART_INT_RX_VALID) {
462 ar933x_uart_write(up, AR933X_UART_INT_REG,
463 AR933X_UART_INT_RX_VALID);
464 ar933x_uart_rx_chars(up);
465 }
466
467 if (status & AR933X_UART_INT_TX_EMPTY) {
468 ar933x_uart_write(up, AR933X_UART_INT_REG,
469 AR933X_UART_INT_TX_EMPTY);
470 ar933x_uart_stop_tx_interrupt(up);
471 ar933x_uart_tx_chars(up);
472 }
473
474 spin_unlock(&up->port.lock);
475
476 return IRQ_HANDLED;
477 }
478
479 static int ar933x_uart_startup(struct uart_port *port)
480 {
481 struct ar933x_uart_port *up =
482 container_of(port, struct ar933x_uart_port, port);
483 unsigned long flags;
484 int ret;
485
486 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
487 up->port.irqflags, dev_name(up->port.dev), up);
488 if (ret)
489 return ret;
490
491 spin_lock_irqsave(&up->port.lock, flags);
492
493 /* Enable HOST interrupts */
494 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
495 AR933X_UART_CS_HOST_INT_EN);
496
497 /* enable RX and TX ready overide */
498 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
499 AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE);
500
501 /* Enable RX interrupts */
502 ar933x_uart_start_rx_interrupt(up);
503
504 spin_unlock_irqrestore(&up->port.lock, flags);
505
506 return 0;
507 }
508
509 static void ar933x_uart_shutdown(struct uart_port *port)
510 {
511 struct ar933x_uart_port *up =
512 container_of(port, struct ar933x_uart_port, port);
513
514 /* Disable all interrupts */
515 up->ier = 0;
516 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
517
518 /* Disable break condition */
519 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
520 AR933X_UART_CS_TX_BREAK);
521
522 free_irq(up->port.irq, up);
523 }
524
525 static const char *ar933x_uart_type(struct uart_port *port)
526 {
527 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
528 }
529
530 static void ar933x_uart_release_port(struct uart_port *port)
531 {
532 /* Nothing to release ... */
533 }
534
535 static int ar933x_uart_request_port(struct uart_port *port)
536 {
537 /* UARTs always present */
538 return 0;
539 }
540
541 static void ar933x_uart_config_port(struct uart_port *port, int flags)
542 {
543 if (flags & UART_CONFIG_TYPE)
544 port->type = PORT_AR933X;
545 }
546
547 static int ar933x_uart_verify_port(struct uart_port *port,
548 struct serial_struct *ser)
549 {
550 struct ar933x_uart_port *up =
551 container_of(port, struct ar933x_uart_port, port);
552
553 if (ser->type != PORT_UNKNOWN &&
554 ser->type != PORT_AR933X)
555 return -EINVAL;
556
557 if (ser->irq < 0 || ser->irq >= NR_IRQS)
558 return -EINVAL;
559
560 if (ser->baud_base < up->min_baud ||
561 ser->baud_base > up->max_baud)
562 return -EINVAL;
563
564 return 0;
565 }
566
567 static const struct uart_ops ar933x_uart_ops = {
568 .tx_empty = ar933x_uart_tx_empty,
569 .set_mctrl = ar933x_uart_set_mctrl,
570 .get_mctrl = ar933x_uart_get_mctrl,
571 .stop_tx = ar933x_uart_stop_tx,
572 .start_tx = ar933x_uart_start_tx,
573 .stop_rx = ar933x_uart_stop_rx,
574 .break_ctl = ar933x_uart_break_ctl,
575 .startup = ar933x_uart_startup,
576 .shutdown = ar933x_uart_shutdown,
577 .set_termios = ar933x_uart_set_termios,
578 .type = ar933x_uart_type,
579 .release_port = ar933x_uart_release_port,
580 .request_port = ar933x_uart_request_port,
581 .config_port = ar933x_uart_config_port,
582 .verify_port = ar933x_uart_verify_port,
583 };
584
585 static int ar933x_config_rs485(struct uart_port *port,
586 struct serial_rs485 *rs485conf)
587 {
588 struct ar933x_uart_port *up =
589 container_of(port, struct ar933x_uart_port, port);
590
591 if ((rs485conf->flags & SER_RS485_ENABLED) &&
592 !up->rts_gpiod) {
593 dev_err(port->dev, "RS485 needs rts-gpio\n");
594 return 1;
595 }
596 port->rs485 = *rs485conf;
597 return 0;
598 }
599
600 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
601 static struct ar933x_uart_port *
602 ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
603
604 static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
605 {
606 unsigned int status;
607 unsigned int timeout = 60000;
608
609 /* Wait up to 60ms for the character(s) to be sent. */
610 do {
611 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
612 if (--timeout == 0)
613 break;
614 udelay(1);
615 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
616 }
617
618 static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
619 {
620 struct ar933x_uart_port *up =
621 container_of(port, struct ar933x_uart_port, port);
622
623 ar933x_uart_wait_xmitr(up);
624 ar933x_uart_putc(up, ch);
625 }
626
627 static void ar933x_uart_console_write(struct console *co, const char *s,
628 unsigned int count)
629 {
630 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
631 unsigned long flags;
632 unsigned int int_en;
633 int locked = 1;
634
635 local_irq_save(flags);
636
637 if (up->port.sysrq)
638 locked = 0;
639 else if (oops_in_progress)
640 locked = spin_trylock(&up->port.lock);
641 else
642 spin_lock(&up->port.lock);
643
644 /*
645 * First save the IER then disable the interrupts
646 */
647 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
648 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
649
650 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
651
652 /*
653 * Finally, wait for transmitter to become empty
654 * and restore the IER
655 */
656 ar933x_uart_wait_xmitr(up);
657 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
658
659 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
660
661 if (locked)
662 spin_unlock(&up->port.lock);
663
664 local_irq_restore(flags);
665 }
666
667 static int ar933x_uart_console_setup(struct console *co, char *options)
668 {
669 struct ar933x_uart_port *up;
670 int baud = 115200;
671 int bits = 8;
672 int parity = 'n';
673 int flow = 'n';
674
675 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
676 return -EINVAL;
677
678 up = ar933x_console_ports[co->index];
679 if (!up)
680 return -ENODEV;
681
682 if (options)
683 uart_parse_options(options, &baud, &parity, &bits, &flow);
684
685 return uart_set_options(&up->port, co, baud, parity, bits, flow);
686 }
687
688 static struct console ar933x_uart_console = {
689 .name = "ttyATH",
690 .write = ar933x_uart_console_write,
691 .device = uart_console_device,
692 .setup = ar933x_uart_console_setup,
693 .flags = CON_PRINTBUFFER,
694 .index = -1,
695 .data = &ar933x_uart_driver,
696 };
697 #endif /* CONFIG_SERIAL_AR933X_CONSOLE */
698
699 static struct uart_driver ar933x_uart_driver = {
700 .owner = THIS_MODULE,
701 .driver_name = DRIVER_NAME,
702 .dev_name = "ttyATH",
703 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
704 .cons = NULL, /* filled in runtime */
705 };
706
707 static int ar933x_uart_probe(struct platform_device *pdev)
708 {
709 struct ar933x_uart_port *up;
710 struct uart_port *port;
711 struct resource *mem_res;
712 struct resource *irq_res;
713 struct device_node *np;
714 unsigned int baud;
715 int id;
716 int ret;
717
718 np = pdev->dev.of_node;
719 if (IS_ENABLED(CONFIG_OF) && np) {
720 id = of_alias_get_id(np, "serial");
721 if (id < 0) {
722 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
723 id);
724 return id;
725 }
726 } else {
727 id = pdev->id;
728 if (id == -1)
729 id = 0;
730 }
731
732 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
733 return -EINVAL;
734
735 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
736 if (!irq_res) {
737 dev_err(&pdev->dev, "no IRQ resource\n");
738 return -EINVAL;
739 }
740
741 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
742 GFP_KERNEL);
743 if (!up)
744 return -ENOMEM;
745
746 up->clk = devm_clk_get(&pdev->dev, "uart");
747 if (IS_ERR(up->clk)) {
748 dev_err(&pdev->dev, "unable to get UART clock\n");
749 return PTR_ERR(up->clk);
750 }
751
752 port = &up->port;
753
754 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
755 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
756 if (IS_ERR(port->membase))
757 return PTR_ERR(port->membase);
758
759 ret = clk_prepare_enable(up->clk);
760 if (ret)
761 return ret;
762
763 port->uartclk = clk_get_rate(up->clk);
764 if (!port->uartclk) {
765 ret = -EINVAL;
766 goto err_disable_clk;
767 }
768
769 port->mapbase = mem_res->start;
770 port->line = id;
771 port->irq = irq_res->start;
772 port->dev = &pdev->dev;
773 port->type = PORT_AR933X;
774 port->iotype = UPIO_MEM32;
775
776 port->regshift = 2;
777 port->fifosize = AR933X_UART_FIFO_SIZE;
778 port->ops = &ar933x_uart_ops;
779 port->rs485_config = ar933x_config_rs485;
780
781 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
782 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
783
784 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
785 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
786
787 ret = uart_get_rs485_mode(port);
788 if (ret)
789 goto err_disable_clk;
790
791 up->gpios = mctrl_gpio_init(port, 0);
792 if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) {
793 ret = PTR_ERR(up->gpios);
794 goto err_disable_clk;
795 }
796
797 up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS);
798
799 if ((port->rs485.flags & SER_RS485_ENABLED) &&
800 !up->rts_gpiod) {
801 dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n");
802 port->rs485.flags &= ~SER_RS485_ENABLED;
803 }
804
805 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
806 ar933x_console_ports[up->port.line] = up;
807 #endif
808
809 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
810 if (ret)
811 goto err_disable_clk;
812
813 platform_set_drvdata(pdev, up);
814 return 0;
815
816 err_disable_clk:
817 clk_disable_unprepare(up->clk);
818 return ret;
819 }
820
821 static int ar933x_uart_remove(struct platform_device *pdev)
822 {
823 struct ar933x_uart_port *up;
824
825 up = platform_get_drvdata(pdev);
826
827 if (up) {
828 uart_remove_one_port(&ar933x_uart_driver, &up->port);
829 clk_disable_unprepare(up->clk);
830 }
831
832 return 0;
833 }
834
835 #ifdef CONFIG_OF
836 static const struct of_device_id ar933x_uart_of_ids[] = {
837 { .compatible = "qca,ar9330-uart" },
838 {},
839 };
840 MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
841 #endif
842
843 static struct platform_driver ar933x_uart_platform_driver = {
844 .probe = ar933x_uart_probe,
845 .remove = ar933x_uart_remove,
846 .driver = {
847 .name = DRIVER_NAME,
848 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
849 },
850 };
851
852 static int __init ar933x_uart_init(void)
853 {
854 int ret;
855
856 #ifdef CONFIG_SERIAL_AR933X_CONSOLE
857 ar933x_uart_driver.cons = &ar933x_uart_console;
858 #endif
859
860 ret = uart_register_driver(&ar933x_uart_driver);
861 if (ret)
862 goto err_out;
863
864 ret = platform_driver_register(&ar933x_uart_platform_driver);
865 if (ret)
866 goto err_unregister_uart_driver;
867
868 return 0;
869
870 err_unregister_uart_driver:
871 uart_unregister_driver(&ar933x_uart_driver);
872 err_out:
873 return ret;
874 }
875
876 static void __exit ar933x_uart_exit(void)
877 {
878 platform_driver_unregister(&ar933x_uart_platform_driver);
879 uart_unregister_driver(&ar933x_uart_driver);
880 }
881
882 module_init(ar933x_uart_init);
883 module_exit(ar933x_uart_exit);
884
885 MODULE_DESCRIPTION("Atheros AR933X UART driver");
886 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
887 MODULE_LICENSE("GPL v2");
888 MODULE_ALIAS("platform:" DRIVER_NAME);
Linux with added FPC-III support