1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2011-2012, The Linux Foundation. All rights reserved.
5 * Description: CoreSight Embedded Trace Buffer driver
8 #include <linux/atomic.h>
9 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/types.h>
12 #include <linux/device.h>
14 #include <linux/err.h>
16 #include <linux/miscdevice.h>
17 #include <linux/uaccess.h>
18 #include <linux/slab.h>
19 #include <linux/spinlock.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/seq_file.h>
22 #include <linux/coresight.h>
23 #include <linux/amba/bus.h>
24 #include <linux/clk.h>
25 #include <linux/circ_buf.h>
27 #include <linux/perf_event.h>
30 #include "coresight-priv.h"
31 #include "coresight-etm-perf.h"
33 #define ETB_RAM_DEPTH_REG 0x004
34 #define ETB_STATUS_REG 0x00c
35 #define ETB_RAM_READ_DATA_REG 0x010
36 #define ETB_RAM_READ_POINTER 0x014
37 #define ETB_RAM_WRITE_POINTER 0x018
39 #define ETB_CTL_REG 0x020
40 #define ETB_RWD_REG 0x024
41 #define ETB_FFSR 0x300
42 #define ETB_FFCR 0x304
43 #define ETB_ITMISCOP0 0xee0
44 #define ETB_ITTRFLINACK 0xee4
45 #define ETB_ITTRFLIN 0xee8
46 #define ETB_ITATBDATA0 0xeeC
47 #define ETB_ITATBCTR2 0xef0
48 #define ETB_ITATBCTR1 0xef4
49 #define ETB_ITATBCTR0 0xef8
51 /* register description */
53 #define ETB_STATUS_RAM_FULL BIT(0)
55 #define ETB_CTL_CAPT_EN BIT(0)
57 #define ETB_FFCR_EN_FTC BIT(0)
58 #define ETB_FFCR_FON_MAN BIT(6)
59 #define ETB_FFCR_STOP_FI BIT(12)
60 #define ETB_FFCR_STOP_TRIGGER BIT(13)
62 #define ETB_FFCR_BIT 6
63 #define ETB_FFSR_BIT 1
64 #define ETB_FRAME_SIZE_WORDS 4
66 DEFINE_CORESIGHT_DEVLIST(etb_devs
, "etb");
69 * struct etb_drvdata - specifics associated to an ETB component
70 * @base: memory mapped base address for this component.
71 * @atclk: optional clock for the core parts of the ETB.
72 * @csdev: component vitals needed by the framework.
73 * @miscdev: specifics to handle "/dev/xyz.etb" entry.
74 * @spinlock: only one at a time pls.
75 * @reading: synchronise user space access to etb buffer.
76 * @pid: Process ID of the process being monitored by the session
77 * that is using this component.
78 * @buf: area of memory where ETB buffer content gets sent.
79 * @mode: this ETB is being used.
80 * @buffer_depth: size of @buf.
81 * @trigger_cntr: amount of words to store after a trigger.
86 struct coresight_device
*csdev
;
87 struct miscdevice miscdev
;
97 static int etb_set_buffer(struct coresight_device
*csdev
,
98 struct perf_output_handle
*handle
);
100 static inline unsigned int etb_get_buffer_depth(struct etb_drvdata
*drvdata
)
102 return readl_relaxed(drvdata
->base
+ ETB_RAM_DEPTH_REG
);
105 static void __etb_enable_hw(struct etb_drvdata
*drvdata
)
110 CS_UNLOCK(drvdata
->base
);
112 depth
= drvdata
->buffer_depth
;
113 /* reset write RAM pointer address */
114 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
115 /* clear entire RAM buffer */
116 for (i
= 0; i
< depth
; i
++)
117 writel_relaxed(0x0, drvdata
->base
+ ETB_RWD_REG
);
119 /* reset write RAM pointer address */
120 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
121 /* reset read RAM pointer address */
122 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
124 writel_relaxed(drvdata
->trigger_cntr
, drvdata
->base
+ ETB_TRG
);
125 writel_relaxed(ETB_FFCR_EN_FTC
| ETB_FFCR_STOP_TRIGGER
,
126 drvdata
->base
+ ETB_FFCR
);
127 /* ETB trace capture enable */
128 writel_relaxed(ETB_CTL_CAPT_EN
, drvdata
->base
+ ETB_CTL_REG
);
130 CS_LOCK(drvdata
->base
);
133 static int etb_enable_hw(struct etb_drvdata
*drvdata
)
135 int rc
= coresight_claim_device(drvdata
->base
);
140 __etb_enable_hw(drvdata
);
144 static int etb_enable_sysfs(struct coresight_device
*csdev
)
148 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
150 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
152 /* Don't messup with perf sessions. */
153 if (drvdata
->mode
== CS_MODE_PERF
) {
158 if (drvdata
->mode
== CS_MODE_DISABLED
) {
159 ret
= etb_enable_hw(drvdata
);
163 drvdata
->mode
= CS_MODE_SYSFS
;
166 atomic_inc(csdev
->refcnt
);
168 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
172 static int etb_enable_perf(struct coresight_device
*csdev
, void *data
)
177 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
178 struct perf_output_handle
*handle
= data
;
180 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
182 /* No need to continue if the component is already in used by sysFS. */
183 if (drvdata
->mode
== CS_MODE_SYSFS
) {
188 /* Get a handle on the pid of the process to monitor */
189 pid
= task_pid_nr(handle
->event
->owner
);
191 if (drvdata
->pid
!= -1 && drvdata
->pid
!= pid
) {
197 * No HW configuration is needed if the sink is already in
198 * use for this session.
200 if (drvdata
->pid
== pid
) {
201 atomic_inc(csdev
->refcnt
);
206 * We don't have an internal state to clean up if we fail to setup
207 * the perf buffer. So we can perform the step before we turn the
208 * ETB on and leave without cleaning up.
210 ret
= etb_set_buffer(csdev
, handle
);
214 ret
= etb_enable_hw(drvdata
);
216 /* Associate with monitored process. */
218 drvdata
->mode
= CS_MODE_PERF
;
219 atomic_inc(csdev
->refcnt
);
223 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
227 static int etb_enable(struct coresight_device
*csdev
, u32 mode
, void *data
)
233 ret
= etb_enable_sysfs(csdev
);
236 ret
= etb_enable_perf(csdev
, data
);
246 dev_dbg(&csdev
->dev
, "ETB enabled\n");
250 static void __etb_disable_hw(struct etb_drvdata
*drvdata
)
253 struct device
*dev
= &drvdata
->csdev
->dev
;
255 CS_UNLOCK(drvdata
->base
);
257 ffcr
= readl_relaxed(drvdata
->base
+ ETB_FFCR
);
258 /* stop formatter when a stop has completed */
259 ffcr
|= ETB_FFCR_STOP_FI
;
260 writel_relaxed(ffcr
, drvdata
->base
+ ETB_FFCR
);
261 /* manually generate a flush of the system */
262 ffcr
|= ETB_FFCR_FON_MAN
;
263 writel_relaxed(ffcr
, drvdata
->base
+ ETB_FFCR
);
265 if (coresight_timeout(drvdata
->base
, ETB_FFCR
, ETB_FFCR_BIT
, 0)) {
267 "timeout while waiting for completion of Manual Flush\n");
270 /* disable trace capture */
271 writel_relaxed(0x0, drvdata
->base
+ ETB_CTL_REG
);
273 if (coresight_timeout(drvdata
->base
, ETB_FFSR
, ETB_FFSR_BIT
, 1)) {
275 "timeout while waiting for Formatter to Stop\n");
278 CS_LOCK(drvdata
->base
);
281 static void etb_dump_hw(struct etb_drvdata
*drvdata
)
286 u32 read_data
, depth
;
287 u32 read_ptr
, write_ptr
;
288 u32 frame_off
, frame_endoff
;
289 struct device
*dev
= &drvdata
->csdev
->dev
;
291 CS_UNLOCK(drvdata
->base
);
293 read_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_READ_POINTER
);
294 write_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
296 frame_off
= write_ptr
% ETB_FRAME_SIZE_WORDS
;
297 frame_endoff
= ETB_FRAME_SIZE_WORDS
- frame_off
;
300 "write_ptr: %lu not aligned to formatter frame size\n",
301 (unsigned long)write_ptr
);
302 dev_err(dev
, "frameoff: %lu, frame_endoff: %lu\n",
303 (unsigned long)frame_off
, (unsigned long)frame_endoff
);
304 write_ptr
+= frame_endoff
;
307 if ((readl_relaxed(drvdata
->base
+ ETB_STATUS_REG
)
308 & ETB_STATUS_RAM_FULL
) == 0) {
309 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
311 writel_relaxed(write_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
315 depth
= drvdata
->buffer_depth
;
316 buf_ptr
= drvdata
->buf
;
317 for (i
= 0; i
< depth
; i
++) {
318 read_data
= readl_relaxed(drvdata
->base
+
319 ETB_RAM_READ_DATA_REG
);
320 *(u32
*)buf_ptr
= read_data
;
325 coresight_insert_barrier_packet(drvdata
->buf
);
328 buf_ptr
-= (frame_endoff
* 4);
329 for (i
= 0; i
< frame_endoff
; i
++) {
337 writel_relaxed(read_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
339 CS_LOCK(drvdata
->base
);
342 static void etb_disable_hw(struct etb_drvdata
*drvdata
)
344 __etb_disable_hw(drvdata
);
345 etb_dump_hw(drvdata
);
346 coresight_disclaim_device(drvdata
->base
);
349 static int etb_disable(struct coresight_device
*csdev
)
351 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
354 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
356 if (atomic_dec_return(csdev
->refcnt
)) {
357 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
361 /* Complain if we (somehow) got out of sync */
362 WARN_ON_ONCE(drvdata
->mode
== CS_MODE_DISABLED
);
363 etb_disable_hw(drvdata
);
364 /* Dissociate from monitored process. */
366 drvdata
->mode
= CS_MODE_DISABLED
;
367 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
369 dev_dbg(&csdev
->dev
, "ETB disabled\n");
373 static void *etb_alloc_buffer(struct coresight_device
*csdev
,
374 struct perf_event
*event
, void **pages
,
375 int nr_pages
, bool overwrite
)
378 struct cs_buffers
*buf
;
380 node
= (event
->cpu
== -1) ? NUMA_NO_NODE
: cpu_to_node(event
->cpu
);
382 buf
= kzalloc_node(sizeof(struct cs_buffers
), GFP_KERNEL
, node
);
386 buf
->snapshot
= overwrite
;
387 buf
->nr_pages
= nr_pages
;
388 buf
->data_pages
= pages
;
393 static void etb_free_buffer(void *config
)
395 struct cs_buffers
*buf
= config
;
400 static int etb_set_buffer(struct coresight_device
*csdev
,
401 struct perf_output_handle
*handle
)
405 struct cs_buffers
*buf
= etm_perf_sink_config(handle
);
410 /* wrap head around to the amount of space we have */
411 head
= handle
->head
& ((buf
->nr_pages
<< PAGE_SHIFT
) - 1);
413 /* find the page to write to */
414 buf
->cur
= head
/ PAGE_SIZE
;
416 /* and offset within that page */
417 buf
->offset
= head
% PAGE_SIZE
;
419 local_set(&buf
->data_size
, 0);
424 static unsigned long etb_update_buffer(struct coresight_device
*csdev
,
425 struct perf_output_handle
*handle
,
432 u32 read_ptr
, write_ptr
, capacity
;
433 u32 status
, read_data
;
434 unsigned long offset
, to_read
= 0, flags
;
435 struct cs_buffers
*buf
= sink_config
;
436 struct etb_drvdata
*drvdata
= dev_get_drvdata(csdev
->dev
.parent
);
441 capacity
= drvdata
->buffer_depth
* ETB_FRAME_SIZE_WORDS
;
443 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
445 /* Don't do anything if another tracer is using this sink */
446 if (atomic_read(csdev
->refcnt
) != 1)
449 __etb_disable_hw(drvdata
);
450 CS_UNLOCK(drvdata
->base
);
452 /* unit is in words, not bytes */
453 read_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_READ_POINTER
);
454 write_ptr
= readl_relaxed(drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
457 * Entries should be aligned to the frame size. If they are not
458 * go back to the last alignment point to give decoding tools a
459 * chance to fix things.
461 if (write_ptr
% ETB_FRAME_SIZE_WORDS
) {
463 "write_ptr: %lu not aligned to formatter frame size\n",
464 (unsigned long)write_ptr
);
466 write_ptr
&= ~(ETB_FRAME_SIZE_WORDS
- 1);
471 * Get a hold of the status register and see if a wrap around
472 * has occurred. If so adjust things accordingly. Otherwise
473 * start at the beginning and go until the write pointer has
476 status
= readl_relaxed(drvdata
->base
+ ETB_STATUS_REG
);
477 if (status
& ETB_STATUS_RAM_FULL
) {
480 read_ptr
= write_ptr
;
482 to_read
= CIRC_CNT(write_ptr
, read_ptr
, drvdata
->buffer_depth
);
483 to_read
*= ETB_FRAME_SIZE_WORDS
;
487 * Make sure we don't overwrite data that hasn't been consumed yet.
488 * It is entirely possible that the HW buffer has more data than the
489 * ring buffer can currently handle. If so adjust the start address
490 * to take only the last traces.
492 * In snapshot mode we are looking to get the latest traces only and as
493 * such, we don't care about not overwriting data that hasn't been
494 * processed by user space.
496 if (!buf
->snapshot
&& to_read
> handle
->size
) {
497 u32 mask
= ~(ETB_FRAME_SIZE_WORDS
- 1);
499 /* The new read pointer must be frame size aligned */
500 to_read
= handle
->size
& mask
;
502 * Move the RAM read pointer up, keeping in mind that
503 * everything is in frame size units.
505 read_ptr
= (write_ptr
+ drvdata
->buffer_depth
) -
506 to_read
/ ETB_FRAME_SIZE_WORDS
;
507 /* Wrap around if need be*/
508 if (read_ptr
> (drvdata
->buffer_depth
- 1))
509 read_ptr
-= drvdata
->buffer_depth
;
510 /* let the decoder know we've skipped ahead */
515 * Don't set the TRUNCATED flag in snapshot mode because 1) the
516 * captured buffer is expected to be truncated and 2) a full buffer
517 * prevents the event from being re-enabled by the perf core,
518 * resulting in stale data being send to user space.
520 if (!buf
->snapshot
&& lost
)
521 perf_aux_output_flag(handle
, PERF_AUX_FLAG_TRUNCATED
);
523 /* finally tell HW where we want to start reading from */
524 writel_relaxed(read_ptr
, drvdata
->base
+ ETB_RAM_READ_POINTER
);
527 offset
= buf
->offset
;
528 barrier
= barrier_pkt
;
530 for (i
= 0; i
< to_read
; i
+= 4) {
531 buf_ptr
= buf
->data_pages
[cur
] + offset
;
532 read_data
= readl_relaxed(drvdata
->base
+
533 ETB_RAM_READ_DATA_REG
);
534 if (lost
&& i
< CORESIGHT_BARRIER_PKT_SIZE
) {
535 read_data
= *barrier
;
539 *(u32
*)buf_ptr
= read_data
;
543 if (offset
>= PAGE_SIZE
) {
546 /* wrap around at the end of the buffer */
547 cur
&= buf
->nr_pages
- 1;
551 /* reset ETB buffer for next run */
552 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_READ_POINTER
);
553 writel_relaxed(0x0, drvdata
->base
+ ETB_RAM_WRITE_POINTER
);
556 * In snapshot mode we simply increment the head by the number of byte
557 * that were written. User space function cs_etm_find_snapshot() will
558 * figure out how many bytes to get from the AUX buffer based on the
559 * position of the head.
562 handle
->head
+= to_read
;
564 __etb_enable_hw(drvdata
);
565 CS_LOCK(drvdata
->base
);
567 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
572 static const struct coresight_ops_sink etb_sink_ops
= {
573 .enable
= etb_enable
,
574 .disable
= etb_disable
,
575 .alloc_buffer
= etb_alloc_buffer
,
576 .free_buffer
= etb_free_buffer
,
577 .update_buffer
= etb_update_buffer
,
580 static const struct coresight_ops etb_cs_ops
= {
581 .sink_ops
= &etb_sink_ops
,
584 static void etb_dump(struct etb_drvdata
*drvdata
)
588 spin_lock_irqsave(&drvdata
->spinlock
, flags
);
589 if (drvdata
->mode
== CS_MODE_SYSFS
) {
590 __etb_disable_hw(drvdata
);
591 etb_dump_hw(drvdata
);
592 __etb_enable_hw(drvdata
);
594 spin_unlock_irqrestore(&drvdata
->spinlock
, flags
);
596 dev_dbg(&drvdata
->csdev
->dev
, "ETB dumped\n");
599 static int etb_open(struct inode
*inode
, struct file
*file
)
601 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
602 struct etb_drvdata
, miscdev
);
604 if (local_cmpxchg(&drvdata
->reading
, 0, 1))
607 dev_dbg(&drvdata
->csdev
->dev
, "%s: successfully opened\n", __func__
);
611 static ssize_t
etb_read(struct file
*file
, char __user
*data
,
612 size_t len
, loff_t
*ppos
)
615 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
616 struct etb_drvdata
, miscdev
);
617 struct device
*dev
= &drvdata
->csdev
->dev
;
621 depth
= drvdata
->buffer_depth
;
622 if (*ppos
+ len
> depth
* 4)
623 len
= depth
* 4 - *ppos
;
625 if (copy_to_user(data
, drvdata
->buf
+ *ppos
, len
)) {
627 "%s: copy_to_user failed\n", __func__
);
633 dev_dbg(dev
, "%s: %zu bytes copied, %d bytes left\n",
634 __func__
, len
, (int)(depth
* 4 - *ppos
));
638 static int etb_release(struct inode
*inode
, struct file
*file
)
640 struct etb_drvdata
*drvdata
= container_of(file
->private_data
,
641 struct etb_drvdata
, miscdev
);
642 local_set(&drvdata
->reading
, 0);
644 dev_dbg(&drvdata
->csdev
->dev
, "%s: released\n", __func__
);
648 static const struct file_operations etb_fops
= {
649 .owner
= THIS_MODULE
,
652 .release
= etb_release
,
656 #define coresight_etb10_reg(name, offset) \
657 coresight_simple_reg32(struct etb_drvdata, name, offset)
659 coresight_etb10_reg(rdp
, ETB_RAM_DEPTH_REG
);
660 coresight_etb10_reg(sts
, ETB_STATUS_REG
);
661 coresight_etb10_reg(rrp
, ETB_RAM_READ_POINTER
);
662 coresight_etb10_reg(rwp
, ETB_RAM_WRITE_POINTER
);
663 coresight_etb10_reg(trg
, ETB_TRG
);
664 coresight_etb10_reg(ctl
, ETB_CTL_REG
);
665 coresight_etb10_reg(ffsr
, ETB_FFSR
);
666 coresight_etb10_reg(ffcr
, ETB_FFCR
);
668 static struct attribute
*coresight_etb_mgmt_attrs
[] = {
680 static ssize_t
trigger_cntr_show(struct device
*dev
,
681 struct device_attribute
*attr
, char *buf
)
683 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
->parent
);
684 unsigned long val
= drvdata
->trigger_cntr
;
686 return sprintf(buf
, "%#lx\n", val
);
689 static ssize_t
trigger_cntr_store(struct device
*dev
,
690 struct device_attribute
*attr
,
691 const char *buf
, size_t size
)
695 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
->parent
);
697 ret
= kstrtoul(buf
, 16, &val
);
701 drvdata
->trigger_cntr
= val
;
704 static DEVICE_ATTR_RW(trigger_cntr
);
706 static struct attribute
*coresight_etb_attrs
[] = {
707 &dev_attr_trigger_cntr
.attr
,
711 static const struct attribute_group coresight_etb_group
= {
712 .attrs
= coresight_etb_attrs
,
715 static const struct attribute_group coresight_etb_mgmt_group
= {
716 .attrs
= coresight_etb_mgmt_attrs
,
720 const struct attribute_group
*coresight_etb_groups
[] = {
721 &coresight_etb_group
,
722 &coresight_etb_mgmt_group
,
726 static int etb_probe(struct amba_device
*adev
, const struct amba_id
*id
)
730 struct device
*dev
= &adev
->dev
;
731 struct coresight_platform_data
*pdata
= NULL
;
732 struct etb_drvdata
*drvdata
;
733 struct resource
*res
= &adev
->res
;
734 struct coresight_desc desc
= { 0 };
736 desc
.name
= coresight_alloc_device_name(&etb_devs
, dev
);
740 drvdata
= devm_kzalloc(dev
, sizeof(*drvdata
), GFP_KERNEL
);
744 drvdata
->atclk
= devm_clk_get(&adev
->dev
, "atclk"); /* optional */
745 if (!IS_ERR(drvdata
->atclk
)) {
746 ret
= clk_prepare_enable(drvdata
->atclk
);
750 dev_set_drvdata(dev
, drvdata
);
752 /* validity for the resource is already checked by the AMBA core */
753 base
= devm_ioremap_resource(dev
, res
);
755 return PTR_ERR(base
);
757 drvdata
->base
= base
;
759 spin_lock_init(&drvdata
->spinlock
);
761 drvdata
->buffer_depth
= etb_get_buffer_depth(drvdata
);
763 if (drvdata
->buffer_depth
& 0x80000000)
766 drvdata
->buf
= devm_kcalloc(dev
,
767 drvdata
->buffer_depth
, 4, GFP_KERNEL
);
771 /* This device is not associated with a session */
774 pdata
= coresight_get_platform_data(dev
);
776 return PTR_ERR(pdata
);
777 adev
->dev
.platform_data
= pdata
;
779 desc
.type
= CORESIGHT_DEV_TYPE_SINK
;
780 desc
.subtype
.sink_subtype
= CORESIGHT_DEV_SUBTYPE_SINK_BUFFER
;
781 desc
.ops
= &etb_cs_ops
;
784 desc
.groups
= coresight_etb_groups
;
785 drvdata
->csdev
= coresight_register(&desc
);
786 if (IS_ERR(drvdata
->csdev
))
787 return PTR_ERR(drvdata
->csdev
);
789 drvdata
->miscdev
.name
= desc
.name
;
790 drvdata
->miscdev
.minor
= MISC_DYNAMIC_MINOR
;
791 drvdata
->miscdev
.fops
= &etb_fops
;
792 ret
= misc_register(&drvdata
->miscdev
);
794 goto err_misc_register
;
796 pm_runtime_put(&adev
->dev
);
800 coresight_unregister(drvdata
->csdev
);
805 static int etb_runtime_suspend(struct device
*dev
)
807 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
);
809 if (drvdata
&& !IS_ERR(drvdata
->atclk
))
810 clk_disable_unprepare(drvdata
->atclk
);
815 static int etb_runtime_resume(struct device
*dev
)
817 struct etb_drvdata
*drvdata
= dev_get_drvdata(dev
);
819 if (drvdata
&& !IS_ERR(drvdata
->atclk
))
820 clk_prepare_enable(drvdata
->atclk
);
826 static const struct dev_pm_ops etb_dev_pm_ops
= {
827 SET_RUNTIME_PM_OPS(etb_runtime_suspend
, etb_runtime_resume
, NULL
)
830 static const struct amba_id etb_ids
[] = {
838 static struct amba_driver etb_driver
= {
840 .name
= "coresight-etb10",
841 .owner
= THIS_MODULE
,
842 .pm
= &etb_dev_pm_ops
,
843 .suppress_bind_attrs
= true,
849 builtin_amba_driver(etb_driver
);