dm writecache: add cond_resched to loop in persistent_memory_claim()
[linux/fpc-iii.git] / drivers / iio / adc / ad7791.c
blobabb2393926317087d0fea450bb41baa6327563ec
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * AD7787/AD7788/AD7789/AD7790/AD7791 SPI ADC driver
5 * Copyright 2012 Analog Devices Inc.
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 */
9 #include <linux/interrupt.h>
10 #include <linux/device.h>
11 #include <linux/kernel.h>
12 #include <linux/slab.h>
13 #include <linux/sysfs.h>
14 #include <linux/spi/spi.h>
15 #include <linux/regulator/consumer.h>
16 #include <linux/err.h>
17 #include <linux/sched.h>
18 #include <linux/delay.h>
19 #include <linux/module.h>
21 #include <linux/iio/iio.h>
22 #include <linux/iio/sysfs.h>
23 #include <linux/iio/buffer.h>
24 #include <linux/iio/trigger.h>
25 #include <linux/iio/trigger_consumer.h>
26 #include <linux/iio/triggered_buffer.h>
27 #include <linux/iio/adc/ad_sigma_delta.h>
29 #include <linux/platform_data/ad7791.h>
31 #define AD7791_REG_COMM 0x0 /* For writes */
32 #define AD7791_REG_STATUS 0x0 /* For reads */
33 #define AD7791_REG_MODE 0x1
34 #define AD7791_REG_FILTER 0x2
35 #define AD7791_REG_DATA 0x3
37 #define AD7791_MODE_CONTINUOUS 0x00
38 #define AD7791_MODE_SINGLE 0x02
39 #define AD7791_MODE_POWERDOWN 0x03
41 #define AD7791_CH_AIN1P_AIN1N 0x00
42 #define AD7791_CH_AIN2 0x01
43 #define AD7791_CH_AIN1N_AIN1N 0x02
44 #define AD7791_CH_AVDD_MONITOR 0x03
46 #define AD7791_FILTER_CLK_DIV_1 (0x0 << 4)
47 #define AD7791_FILTER_CLK_DIV_2 (0x1 << 4)
48 #define AD7791_FILTER_CLK_DIV_4 (0x2 << 4)
49 #define AD7791_FILTER_CLK_DIV_8 (0x3 << 4)
50 #define AD7791_FILTER_CLK_MASK (0x3 << 4)
51 #define AD7791_FILTER_RATE_120 0x0
52 #define AD7791_FILTER_RATE_100 0x1
53 #define AD7791_FILTER_RATE_33_3 0x2
54 #define AD7791_FILTER_RATE_20 0x3
55 #define AD7791_FILTER_RATE_16_6 0x4
56 #define AD7791_FILTER_RATE_16_7 0x5
57 #define AD7791_FILTER_RATE_13_3 0x6
58 #define AD7791_FILTER_RATE_9_5 0x7
59 #define AD7791_FILTER_RATE_MASK 0x7
61 #define AD7791_MODE_BUFFER BIT(1)
62 #define AD7791_MODE_UNIPOLAR BIT(2)
63 #define AD7791_MODE_BURNOUT BIT(3)
64 #define AD7791_MODE_SEL_MASK (0x3 << 6)
65 #define AD7791_MODE_SEL(x) ((x) << 6)
67 #define DECLARE_AD7787_CHANNELS(name, bits, storagebits) \
68 const struct iio_chan_spec name[] = { \
69 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
70 (bits), (storagebits), 0), \
71 AD_SD_CHANNEL(1, 1, AD7791_CH_AIN2, (bits), (storagebits), 0), \
72 AD_SD_SHORTED_CHANNEL(2, 0, AD7791_CH_AIN1N_AIN1N, \
73 (bits), (storagebits), 0), \
74 AD_SD_SUPPLY_CHANNEL(3, 2, AD7791_CH_AVDD_MONITOR, \
75 (bits), (storagebits), 0), \
76 IIO_CHAN_SOFT_TIMESTAMP(4), \
79 #define DECLARE_AD7791_CHANNELS(name, bits, storagebits) \
80 const struct iio_chan_spec name[] = { \
81 AD_SD_DIFF_CHANNEL(0, 0, 0, AD7791_CH_AIN1P_AIN1N, \
82 (bits), (storagebits), 0), \
83 AD_SD_SHORTED_CHANNEL(1, 0, AD7791_CH_AIN1N_AIN1N, \
84 (bits), (storagebits), 0), \
85 AD_SD_SUPPLY_CHANNEL(2, 1, AD7791_CH_AVDD_MONITOR, \
86 (bits), (storagebits), 0), \
87 IIO_CHAN_SOFT_TIMESTAMP(3), \
90 static DECLARE_AD7787_CHANNELS(ad7787_channels, 24, 32);
91 static DECLARE_AD7791_CHANNELS(ad7790_channels, 16, 16);
92 static DECLARE_AD7791_CHANNELS(ad7791_channels, 24, 32);
94 enum {
95 AD7787,
96 AD7788,
97 AD7789,
98 AD7790,
99 AD7791,
102 enum ad7791_chip_info_flags {
103 AD7791_FLAG_HAS_FILTER = (1 << 0),
104 AD7791_FLAG_HAS_BUFFER = (1 << 1),
105 AD7791_FLAG_HAS_UNIPOLAR = (1 << 2),
106 AD7791_FLAG_HAS_BURNOUT = (1 << 3),
109 struct ad7791_chip_info {
110 const struct iio_chan_spec *channels;
111 unsigned int num_channels;
112 enum ad7791_chip_info_flags flags;
115 static const struct ad7791_chip_info ad7791_chip_infos[] = {
116 [AD7787] = {
117 .channels = ad7787_channels,
118 .num_channels = ARRAY_SIZE(ad7787_channels),
119 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
120 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
122 [AD7788] = {
123 .channels = ad7790_channels,
124 .num_channels = ARRAY_SIZE(ad7790_channels),
125 .flags = AD7791_FLAG_HAS_UNIPOLAR,
127 [AD7789] = {
128 .channels = ad7791_channels,
129 .num_channels = ARRAY_SIZE(ad7791_channels),
130 .flags = AD7791_FLAG_HAS_UNIPOLAR,
132 [AD7790] = {
133 .channels = ad7790_channels,
134 .num_channels = ARRAY_SIZE(ad7790_channels),
135 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
136 AD7791_FLAG_HAS_BURNOUT,
138 [AD7791] = {
139 .channels = ad7791_channels,
140 .num_channels = ARRAY_SIZE(ad7791_channels),
141 .flags = AD7791_FLAG_HAS_FILTER | AD7791_FLAG_HAS_BUFFER |
142 AD7791_FLAG_HAS_UNIPOLAR | AD7791_FLAG_HAS_BURNOUT,
146 struct ad7791_state {
147 struct ad_sigma_delta sd;
148 uint8_t mode;
149 uint8_t filter;
151 struct regulator *reg;
152 const struct ad7791_chip_info *info;
155 static const int ad7791_sample_freq_avail[8][2] = {
156 [AD7791_FILTER_RATE_120] = { 120, 0 },
157 [AD7791_FILTER_RATE_100] = { 100, 0 },
158 [AD7791_FILTER_RATE_33_3] = { 33, 300000 },
159 [AD7791_FILTER_RATE_20] = { 20, 0 },
160 [AD7791_FILTER_RATE_16_6] = { 16, 600000 },
161 [AD7791_FILTER_RATE_16_7] = { 16, 700000 },
162 [AD7791_FILTER_RATE_13_3] = { 13, 300000 },
163 [AD7791_FILTER_RATE_9_5] = { 9, 500000 },
166 static struct ad7791_state *ad_sigma_delta_to_ad7791(struct ad_sigma_delta *sd)
168 return container_of(sd, struct ad7791_state, sd);
171 static int ad7791_set_channel(struct ad_sigma_delta *sd, unsigned int channel)
173 ad_sd_set_comm(sd, channel);
175 return 0;
178 static int ad7791_set_mode(struct ad_sigma_delta *sd,
179 enum ad_sigma_delta_mode mode)
181 struct ad7791_state *st = ad_sigma_delta_to_ad7791(sd);
183 switch (mode) {
184 case AD_SD_MODE_CONTINUOUS:
185 mode = AD7791_MODE_CONTINUOUS;
186 break;
187 case AD_SD_MODE_SINGLE:
188 mode = AD7791_MODE_SINGLE;
189 break;
190 case AD_SD_MODE_IDLE:
191 case AD_SD_MODE_POWERDOWN:
192 mode = AD7791_MODE_POWERDOWN;
193 break;
196 st->mode &= ~AD7791_MODE_SEL_MASK;
197 st->mode |= AD7791_MODE_SEL(mode);
199 return ad_sd_write_reg(sd, AD7791_REG_MODE, sizeof(st->mode), st->mode);
202 static const struct ad_sigma_delta_info ad7791_sigma_delta_info = {
203 .set_channel = ad7791_set_channel,
204 .set_mode = ad7791_set_mode,
205 .has_registers = true,
206 .addr_shift = 4,
207 .read_mask = BIT(3),
208 .irq_flags = IRQF_TRIGGER_LOW,
211 static int ad7791_read_raw(struct iio_dev *indio_dev,
212 const struct iio_chan_spec *chan, int *val, int *val2, long info)
214 struct ad7791_state *st = iio_priv(indio_dev);
215 bool unipolar = !!(st->mode & AD7791_MODE_UNIPOLAR);
216 unsigned int rate;
218 switch (info) {
219 case IIO_CHAN_INFO_RAW:
220 return ad_sigma_delta_single_conversion(indio_dev, chan, val);
221 case IIO_CHAN_INFO_OFFSET:
223 * Unipolar: 0 to VREF
224 * Bipolar -VREF to VREF
226 if (unipolar)
227 *val = 0;
228 else
229 *val = -(1 << (chan->scan_type.realbits - 1));
230 return IIO_VAL_INT;
231 case IIO_CHAN_INFO_SCALE:
232 /* The monitor channel uses an internal reference. */
233 if (chan->address == AD7791_CH_AVDD_MONITOR) {
235 * The signal is attenuated by a factor of 5 and
236 * compared against a 1.17V internal reference.
238 *val = 1170 * 5;
239 } else {
240 int voltage_uv;
242 voltage_uv = regulator_get_voltage(st->reg);
243 if (voltage_uv < 0)
244 return voltage_uv;
246 *val = voltage_uv / 1000;
248 if (unipolar)
249 *val2 = chan->scan_type.realbits;
250 else
251 *val2 = chan->scan_type.realbits - 1;
253 return IIO_VAL_FRACTIONAL_LOG2;
254 case IIO_CHAN_INFO_SAMP_FREQ:
255 rate = st->filter & AD7791_FILTER_RATE_MASK;
256 *val = ad7791_sample_freq_avail[rate][0];
257 *val2 = ad7791_sample_freq_avail[rate][1];
258 return IIO_VAL_INT_PLUS_MICRO;
261 return -EINVAL;
264 static int ad7791_write_raw(struct iio_dev *indio_dev,
265 struct iio_chan_spec const *chan, int val, int val2, long mask)
267 struct ad7791_state *st = iio_priv(indio_dev);
268 int ret, i;
270 ret = iio_device_claim_direct_mode(indio_dev);
271 if (ret)
272 return ret;
274 switch (mask) {
275 case IIO_CHAN_INFO_SAMP_FREQ:
276 for (i = 0; i < ARRAY_SIZE(ad7791_sample_freq_avail); i++) {
277 if (ad7791_sample_freq_avail[i][0] == val &&
278 ad7791_sample_freq_avail[i][1] == val2)
279 break;
282 if (i == ARRAY_SIZE(ad7791_sample_freq_avail)) {
283 ret = -EINVAL;
284 break;
287 st->filter &= ~AD7791_FILTER_RATE_MASK;
288 st->filter |= i;
289 ad_sd_write_reg(&st->sd, AD7791_REG_FILTER,
290 sizeof(st->filter),
291 st->filter);
292 break;
293 default:
294 ret = -EINVAL;
297 iio_device_release_direct_mode(indio_dev);
298 return ret;
301 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("120 100 33.3 20 16.7 16.6 13.3 9.5");
303 static struct attribute *ad7791_attributes[] = {
304 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
305 NULL
308 static const struct attribute_group ad7791_attribute_group = {
309 .attrs = ad7791_attributes,
312 static const struct iio_info ad7791_info = {
313 .read_raw = &ad7791_read_raw,
314 .write_raw = &ad7791_write_raw,
315 .attrs = &ad7791_attribute_group,
316 .validate_trigger = ad_sd_validate_trigger,
319 static const struct iio_info ad7791_no_filter_info = {
320 .read_raw = &ad7791_read_raw,
321 .write_raw = &ad7791_write_raw,
322 .validate_trigger = ad_sd_validate_trigger,
325 static int ad7791_setup(struct ad7791_state *st,
326 struct ad7791_platform_data *pdata)
328 /* Set to poweron-reset default values */
329 st->mode = AD7791_MODE_BUFFER;
330 st->filter = AD7791_FILTER_RATE_16_6;
332 if (!pdata)
333 return 0;
335 if ((st->info->flags & AD7791_FLAG_HAS_BUFFER) && !pdata->buffered)
336 st->mode &= ~AD7791_MODE_BUFFER;
338 if ((st->info->flags & AD7791_FLAG_HAS_BURNOUT) &&
339 pdata->burnout_current)
340 st->mode |= AD7791_MODE_BURNOUT;
342 if ((st->info->flags & AD7791_FLAG_HAS_UNIPOLAR) && pdata->unipolar)
343 st->mode |= AD7791_MODE_UNIPOLAR;
345 return ad_sd_write_reg(&st->sd, AD7791_REG_MODE, sizeof(st->mode),
346 st->mode);
349 static int ad7791_probe(struct spi_device *spi)
351 struct ad7791_platform_data *pdata = spi->dev.platform_data;
352 struct iio_dev *indio_dev;
353 struct ad7791_state *st;
354 int ret;
356 if (!spi->irq) {
357 dev_err(&spi->dev, "Missing IRQ.\n");
358 return -ENXIO;
361 indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st));
362 if (!indio_dev)
363 return -ENOMEM;
365 st = iio_priv(indio_dev);
367 st->reg = devm_regulator_get(&spi->dev, "refin");
368 if (IS_ERR(st->reg))
369 return PTR_ERR(st->reg);
371 ret = regulator_enable(st->reg);
372 if (ret)
373 return ret;
375 st->info = &ad7791_chip_infos[spi_get_device_id(spi)->driver_data];
376 ad_sd_init(&st->sd, indio_dev, spi, &ad7791_sigma_delta_info);
378 spi_set_drvdata(spi, indio_dev);
380 indio_dev->dev.parent = &spi->dev;
381 indio_dev->dev.of_node = spi->dev.of_node;
382 indio_dev->name = spi_get_device_id(spi)->name;
383 indio_dev->modes = INDIO_DIRECT_MODE;
384 indio_dev->channels = st->info->channels;
385 indio_dev->num_channels = st->info->num_channels;
386 if (st->info->flags & AD7791_FLAG_HAS_FILTER)
387 indio_dev->info = &ad7791_info;
388 else
389 indio_dev->info = &ad7791_no_filter_info;
391 ret = ad_sd_setup_buffer_and_trigger(indio_dev);
392 if (ret)
393 goto error_disable_reg;
395 ret = ad7791_setup(st, pdata);
396 if (ret)
397 goto error_remove_trigger;
399 ret = iio_device_register(indio_dev);
400 if (ret)
401 goto error_remove_trigger;
403 return 0;
405 error_remove_trigger:
406 ad_sd_cleanup_buffer_and_trigger(indio_dev);
407 error_disable_reg:
408 regulator_disable(st->reg);
410 return ret;
413 static int ad7791_remove(struct spi_device *spi)
415 struct iio_dev *indio_dev = spi_get_drvdata(spi);
416 struct ad7791_state *st = iio_priv(indio_dev);
418 iio_device_unregister(indio_dev);
419 ad_sd_cleanup_buffer_and_trigger(indio_dev);
421 regulator_disable(st->reg);
423 return 0;
426 static const struct spi_device_id ad7791_spi_ids[] = {
427 { "ad7787", AD7787 },
428 { "ad7788", AD7788 },
429 { "ad7789", AD7789 },
430 { "ad7790", AD7790 },
431 { "ad7791", AD7791 },
434 MODULE_DEVICE_TABLE(spi, ad7791_spi_ids);
436 static struct spi_driver ad7791_driver = {
437 .driver = {
438 .name = "ad7791",
440 .probe = ad7791_probe,
441 .remove = ad7791_remove,
442 .id_table = ad7791_spi_ids,
444 module_spi_driver(ad7791_driver);
446 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
447 MODULE_DESCRIPTION("Analog Device AD7787/AD7788/AD7789/AD7790/AD7791 ADC driver");
448 MODULE_LICENSE("GPL v2");