drivers/phy/renesas/phy-rcar-gen3-usb2.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Renesas R-Car Gen3 for USB2.0 PHY driver
   4  *
   5  * Copyright (C) 2015-2017 Renesas Electronics Corporation
   6  *
   7  * This is based on the phy-rcar-gen2 driver:
   8  * Copyright (C) 2014 Renesas Solutions Corp.
   9  * Copyright (C) 2014 Cogent Embedded, Inc.
  10  */
  11
  12 #include <linux/extcon-provider.h>
  13 #include <linux/interrupt.h>
  14 #include <linux/io.h>
  15 #include <linux/module.h>
  16 #include <linux/mutex.h>
  17 #include <linux/of.h>
  18 #include <linux/of_address.h>
  19 #include <linux/of_device.h>
  20 #include <linux/phy/phy.h>
  21 #include <linux/platform_device.h>
  22 #include <linux/pm_runtime.h>
  23 #include <linux/regulator/consumer.h>
  24 #include <linux/string.h>
  25 #include <linux/usb/of.h>
  26 #include <linux/workqueue.h>
  27
  28 /******* USB2.0 Host registers (original offset is +0x200) *******/
  29 #define USB2_INT_ENABLE         0x000
  30 #define USB2_USBCTR             0x00c
  31 #define USB2_SPD_RSM_TIMSET     0x10c
  32 #define USB2_OC_TIMSET          0x110
  33 #define USB2_COMMCTRL           0x600
  34 #define USB2_OBINTSTA           0x604
  35 #define USB2_OBINTEN            0x608
  36 #define USB2_VBCTRL             0x60c
  37 #define USB2_LINECTRL1          0x610
  38 #define USB2_ADPCTRL            0x630
  39
  40 /* INT_ENABLE */
  41 #define USB2_INT_ENABLE_UCOM_INTEN      BIT(3)
  42 #define USB2_INT_ENABLE_USBH_INTB_EN    BIT(2)  /* For EHCI */
  43 #define USB2_INT_ENABLE_USBH_INTA_EN    BIT(1)  /* For OHCI */
  44
  45 /* USBCTR */
  46 #define USB2_USBCTR_DIRPD       BIT(2)
  47 #define USB2_USBCTR_PLL_RST     BIT(1)
  48
  49 /* SPD_RSM_TIMSET */
  50 #define USB2_SPD_RSM_TIMSET_INIT        0x014e029b
  51
  52 /* OC_TIMSET */
  53 #define USB2_OC_TIMSET_INIT             0x000209ab
  54
  55 /* COMMCTRL */
  56 #define USB2_COMMCTRL_OTG_PERI          BIT(31) /* 1 = Peripheral mode */
  57
  58 /* OBINTSTA and OBINTEN */
  59 #define USB2_OBINT_SESSVLDCHG           BIT(12)
  60 #define USB2_OBINT_IDDIGCHG             BIT(11)
  61 #define USB2_OBINT_BITS                 (USB2_OBINT_SESSVLDCHG | \
  62                                          USB2_OBINT_IDDIGCHG)
  63
  64 /* VBCTRL */
  65 #define USB2_VBCTRL_OCCLREN             BIT(16)
  66 #define USB2_VBCTRL_DRVVBUSSEL          BIT(8)
  67
  68 /* LINECTRL1 */
  69 #define USB2_LINECTRL1_DPRPD_EN         BIT(19)
  70 #define USB2_LINECTRL1_DP_RPD           BIT(18)
  71 #define USB2_LINECTRL1_DMRPD_EN         BIT(17)
  72 #define USB2_LINECTRL1_DM_RPD           BIT(16)
  73 #define USB2_LINECTRL1_OPMODE_NODRV     BIT(6)
  74
  75 /* ADPCTRL */
  76 #define USB2_ADPCTRL_OTGSESSVLD         BIT(20)
  77 #define USB2_ADPCTRL_IDDIG              BIT(19)
  78 #define USB2_ADPCTRL_IDPULLUP           BIT(5)  /* 1 = ID sampling is enabled */
  79 #define USB2_ADPCTRL_DRVVBUS            BIT(4)
  80
  81 #define NUM_OF_PHYS                     4
  82 enum rcar_gen3_phy_index {
  83         PHY_INDEX_BOTH_HC,
  84         PHY_INDEX_OHCI,
  85         PHY_INDEX_EHCI,
  86         PHY_INDEX_HSUSB
  87 };
  88
  89 static const u32 rcar_gen3_int_enable[NUM_OF_PHYS] = {
  90         USB2_INT_ENABLE_USBH_INTB_EN | USB2_INT_ENABLE_USBH_INTA_EN,
  91         USB2_INT_ENABLE_USBH_INTA_EN,
  92         USB2_INT_ENABLE_USBH_INTB_EN,
  93         0
  94 };
  95
  96 struct rcar_gen3_phy {
  97         struct phy *phy;
  98         struct rcar_gen3_chan *ch;
  99         u32 int_enable_bits;
 100         bool initialized;
 101         bool otg_initialized;
 102         bool powered;
 103 };
 104
 105 struct rcar_gen3_chan {
 106         void __iomem *base;
 107         struct device *dev;     /* platform_device's device */
 108         struct extcon_dev *extcon;
 109         struct rcar_gen3_phy rphys[NUM_OF_PHYS];
 110         struct regulator *vbus;
 111         struct work_struct work;
 112         struct mutex lock;      /* protects rphys[...].powered */
 113         enum usb_dr_mode dr_mode;
 114         bool extcon_host;
 115         bool is_otg_channel;
 116         bool uses_otg_pins;
 117 };
 118
 119 /*
 120  * Combination about is_otg_channel and uses_otg_pins:
 121  *
 122  * Parameters                           || Behaviors
 123  * is_otg_channel       | uses_otg_pins || irqs         | role sysfs
 124  * ---------------------+---------------++--------------+------------
 125  * true                 | true          || enabled      | enabled
 126  * true                 | false         || disabled     | enabled
 127  * false                | any           || disabled     | disabled
 128  */
 129
 130 static void rcar_gen3_phy_usb2_work(struct work_struct *work)
 131 {
 132         struct rcar_gen3_chan *ch = container_of(work, struct rcar_gen3_chan,
 133                                                  work);
 134
 135         if (ch->extcon_host) {
 136                 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, true);
 137                 extcon_set_state_sync(ch->extcon, EXTCON_USB, false);
 138         } else {
 139                 extcon_set_state_sync(ch->extcon, EXTCON_USB_HOST, false);
 140                 extcon_set_state_sync(ch->extcon, EXTCON_USB, true);
 141         }
 142 }
 143
 144 static void rcar_gen3_set_host_mode(struct rcar_gen3_chan *ch, int host)
 145 {
 146         void __iomem *usb2_base = ch->base;
 147         u32 val = readl(usb2_base + USB2_COMMCTRL);
 148
 149         dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, host);
 150         if (host)
 151                 val &= ~USB2_COMMCTRL_OTG_PERI;
 152         else
 153                 val |= USB2_COMMCTRL_OTG_PERI;
 154         writel(val, usb2_base + USB2_COMMCTRL);
 155 }
 156
 157 static void rcar_gen3_set_linectrl(struct rcar_gen3_chan *ch, int dp, int dm)
 158 {
 159         void __iomem *usb2_base = ch->base;
 160         u32 val = readl(usb2_base + USB2_LINECTRL1);
 161
 162         dev_vdbg(ch->dev, "%s: %08x, %d, %d\n", __func__, val, dp, dm);
 163         val &= ~(USB2_LINECTRL1_DP_RPD | USB2_LINECTRL1_DM_RPD);
 164         if (dp)
 165                 val |= USB2_LINECTRL1_DP_RPD;
 166         if (dm)
 167                 val |= USB2_LINECTRL1_DM_RPD;
 168         writel(val, usb2_base + USB2_LINECTRL1);
 169 }
 170
 171 static void rcar_gen3_enable_vbus_ctrl(struct rcar_gen3_chan *ch, int vbus)
 172 {
 173         void __iomem *usb2_base = ch->base;
 174         u32 val = readl(usb2_base + USB2_ADPCTRL);
 175
 176         dev_vdbg(ch->dev, "%s: %08x, %d\n", __func__, val, vbus);
 177         if (vbus)
 178                 val |= USB2_ADPCTRL_DRVVBUS;
 179         else
 180                 val &= ~USB2_ADPCTRL_DRVVBUS;
 181         writel(val, usb2_base + USB2_ADPCTRL);
 182 }
 183
 184 static void rcar_gen3_control_otg_irq(struct rcar_gen3_chan *ch, int enable)
 185 {
 186         void __iomem *usb2_base = ch->base;
 187         u32 val = readl(usb2_base + USB2_OBINTEN);
 188
 189         if (ch->uses_otg_pins && enable)
 190                 val |= USB2_OBINT_BITS;
 191         else
 192                 val &= ~USB2_OBINT_BITS;
 193         writel(val, usb2_base + USB2_OBINTEN);
 194 }
 195
 196 static void rcar_gen3_init_for_host(struct rcar_gen3_chan *ch)
 197 {
 198         rcar_gen3_set_linectrl(ch, 1, 1);
 199         rcar_gen3_set_host_mode(ch, 1);
 200         rcar_gen3_enable_vbus_ctrl(ch, 1);
 201
 202         ch->extcon_host = true;
 203         schedule_work(&ch->work);
 204 }
 205
 206 static void rcar_gen3_init_for_peri(struct rcar_gen3_chan *ch)
 207 {
 208         rcar_gen3_set_linectrl(ch, 0, 1);
 209         rcar_gen3_set_host_mode(ch, 0);
 210         rcar_gen3_enable_vbus_ctrl(ch, 0);
 211
 212         ch->extcon_host = false;
 213         schedule_work(&ch->work);
 214 }
 215
 216 static void rcar_gen3_init_for_b_host(struct rcar_gen3_chan *ch)
 217 {
 218         void __iomem *usb2_base = ch->base;
 219         u32 val;
 220
 221         val = readl(usb2_base + USB2_LINECTRL1);
 222         writel(val | USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
 223
 224         rcar_gen3_set_linectrl(ch, 1, 1);
 225         rcar_gen3_set_host_mode(ch, 1);
 226         rcar_gen3_enable_vbus_ctrl(ch, 0);
 227
 228         val = readl(usb2_base + USB2_LINECTRL1);
 229         writel(val & ~USB2_LINECTRL1_OPMODE_NODRV, usb2_base + USB2_LINECTRL1);
 230 }
 231
 232 static void rcar_gen3_init_for_a_peri(struct rcar_gen3_chan *ch)
 233 {
 234         rcar_gen3_set_linectrl(ch, 0, 1);
 235         rcar_gen3_set_host_mode(ch, 0);
 236         rcar_gen3_enable_vbus_ctrl(ch, 1);
 237 }
 238
 239 static void rcar_gen3_init_from_a_peri_to_a_host(struct rcar_gen3_chan *ch)
 240 {
 241         rcar_gen3_control_otg_irq(ch, 0);
 242
 243         rcar_gen3_enable_vbus_ctrl(ch, 1);
 244         rcar_gen3_init_for_host(ch);
 245
 246         rcar_gen3_control_otg_irq(ch, 1);
 247 }
 248
 249 static bool rcar_gen3_check_id(struct rcar_gen3_chan *ch)
 250 {
 251         if (!ch->uses_otg_pins)
 252                 return (ch->dr_mode == USB_DR_MODE_HOST) ? false : true;
 253
 254         return !!(readl(ch->base + USB2_ADPCTRL) & USB2_ADPCTRL_IDDIG);
 255 }
 256
 257 static void rcar_gen3_device_recognition(struct rcar_gen3_chan *ch)
 258 {
 259         if (!rcar_gen3_check_id(ch))
 260                 rcar_gen3_init_for_host(ch);
 261         else
 262                 rcar_gen3_init_for_peri(ch);
 263 }
 264
 265 static bool rcar_gen3_is_host(struct rcar_gen3_chan *ch)
 266 {
 267         return !(readl(ch->base + USB2_COMMCTRL) & USB2_COMMCTRL_OTG_PERI);
 268 }
 269
 270 static enum phy_mode rcar_gen3_get_phy_mode(struct rcar_gen3_chan *ch)
 271 {
 272         if (rcar_gen3_is_host(ch))
 273                 return PHY_MODE_USB_HOST;
 274
 275         return PHY_MODE_USB_DEVICE;
 276 }
 277
 278 static bool rcar_gen3_is_any_rphy_initialized(struct rcar_gen3_chan *ch)
 279 {
 280         int i;
 281
 282         for (i = 0; i < NUM_OF_PHYS; i++) {
 283                 if (ch->rphys[i].initialized)
 284                         return true;
 285         }
 286
 287         return false;
 288 }
 289
 290 static bool rcar_gen3_needs_init_otg(struct rcar_gen3_chan *ch)
 291 {
 292         int i;
 293
 294         for (i = 0; i < NUM_OF_PHYS; i++) {
 295                 if (ch->rphys[i].otg_initialized)
 296                         return false;
 297         }
 298
 299         return true;
 300 }
 301
 302 static bool rcar_gen3_are_all_rphys_power_off(struct rcar_gen3_chan *ch)
 303 {
 304         int i;
 305
 306         for (i = 0; i < NUM_OF_PHYS; i++) {
 307                 if (ch->rphys[i].powered)
 308                         return false;
 309         }
 310
 311         return true;
 312 }
 313
 314 static ssize_t role_store(struct device *dev, struct device_attribute *attr,
 315                           const char *buf, size_t count)
 316 {
 317         struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
 318         bool is_b_device;
 319         enum phy_mode cur_mode, new_mode;
 320
 321         if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
 322                 return -EIO;
 323
 324         if (sysfs_streq(buf, "host"))
 325                 new_mode = PHY_MODE_USB_HOST;
 326         else if (sysfs_streq(buf, "peripheral"))
 327                 new_mode = PHY_MODE_USB_DEVICE;
 328         else
 329                 return -EINVAL;
 330
 331         /* is_b_device: true is B-Device. false is A-Device. */
 332         is_b_device = rcar_gen3_check_id(ch);
 333         cur_mode = rcar_gen3_get_phy_mode(ch);
 334
 335         /* If current and new mode is the same, this returns the error */
 336         if (cur_mode == new_mode)
 337                 return -EINVAL;
 338
 339         if (new_mode == PHY_MODE_USB_HOST) { /* And is_host must be false */
 340                 if (!is_b_device)       /* A-Peripheral */
 341                         rcar_gen3_init_from_a_peri_to_a_host(ch);
 342                 else                    /* B-Peripheral */
 343                         rcar_gen3_init_for_b_host(ch);
 344         } else {                        /* And is_host must be true */
 345                 if (!is_b_device)       /* A-Host */
 346                         rcar_gen3_init_for_a_peri(ch);
 347                 else                    /* B-Host */
 348                         rcar_gen3_init_for_peri(ch);
 349         }
 350
 351         return count;
 352 }
 353
 354 static ssize_t role_show(struct device *dev, struct device_attribute *attr,
 355                          char *buf)
 356 {
 357         struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
 358
 359         if (!ch->is_otg_channel || !rcar_gen3_is_any_rphy_initialized(ch))
 360                 return -EIO;
 361
 362         return sprintf(buf, "%s\n", rcar_gen3_is_host(ch) ? "host" :
 363                                                             "peripheral");
 364 }
 365 static DEVICE_ATTR_RW(role);
 366
 367 static void rcar_gen3_init_otg(struct rcar_gen3_chan *ch)
 368 {
 369         void __iomem *usb2_base = ch->base;
 370         u32 val;
 371
 372         /* Should not use functions of read-modify-write a register */
 373         val = readl(usb2_base + USB2_LINECTRL1);
 374         val = (val & ~USB2_LINECTRL1_DP_RPD) | USB2_LINECTRL1_DPRPD_EN |
 375               USB2_LINECTRL1_DMRPD_EN | USB2_LINECTRL1_DM_RPD;
 376         writel(val, usb2_base + USB2_LINECTRL1);
 377
 378         val = readl(usb2_base + USB2_VBCTRL);
 379         val &= ~USB2_VBCTRL_OCCLREN;
 380         writel(val | USB2_VBCTRL_DRVVBUSSEL, usb2_base + USB2_VBCTRL);
 381         val = readl(usb2_base + USB2_ADPCTRL);
 382         writel(val | USB2_ADPCTRL_IDPULLUP, usb2_base + USB2_ADPCTRL);
 383
 384         msleep(20);
 385
 386         writel(0xffffffff, usb2_base + USB2_OBINTSTA);
 387         writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTEN);
 388
 389         rcar_gen3_device_recognition(ch);
 390 }
 391
 392 static int rcar_gen3_phy_usb2_init(struct phy *p)
 393 {
 394         struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
 395         struct rcar_gen3_chan *channel = rphy->ch;
 396         void __iomem *usb2_base = channel->base;
 397         u32 val;
 398
 399         /* Initialize USB2 part */
 400         val = readl(usb2_base + USB2_INT_ENABLE);
 401         val |= USB2_INT_ENABLE_UCOM_INTEN | rphy->int_enable_bits;
 402         writel(val, usb2_base + USB2_INT_ENABLE);
 403         writel(USB2_SPD_RSM_TIMSET_INIT, usb2_base + USB2_SPD_RSM_TIMSET);
 404         writel(USB2_OC_TIMSET_INIT, usb2_base + USB2_OC_TIMSET);
 405
 406         /* Initialize otg part */
 407         if (channel->is_otg_channel) {
 408                 if (rcar_gen3_needs_init_otg(channel))
 409                         rcar_gen3_init_otg(channel);
 410                 rphy->otg_initialized = true;
 411         }
 412
 413         rphy->initialized = true;
 414
 415         return 0;
 416 }
 417
 418 static int rcar_gen3_phy_usb2_exit(struct phy *p)
 419 {
 420         struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
 421         struct rcar_gen3_chan *channel = rphy->ch;
 422         void __iomem *usb2_base = channel->base;
 423         u32 val;
 424
 425         rphy->initialized = false;
 426
 427         if (channel->is_otg_channel)
 428                 rphy->otg_initialized = false;
 429
 430         val = readl(usb2_base + USB2_INT_ENABLE);
 431         val &= ~rphy->int_enable_bits;
 432         if (!rcar_gen3_is_any_rphy_initialized(channel))
 433                 val &= ~USB2_INT_ENABLE_UCOM_INTEN;
 434         writel(val, usb2_base + USB2_INT_ENABLE);
 435
 436         return 0;
 437 }
 438
 439 static int rcar_gen3_phy_usb2_power_on(struct phy *p)
 440 {
 441         struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
 442         struct rcar_gen3_chan *channel = rphy->ch;
 443         void __iomem *usb2_base = channel->base;
 444         u32 val;
 445         int ret = 0;
 446
 447         mutex_lock(&channel->lock);
 448         if (!rcar_gen3_are_all_rphys_power_off(channel))
 449                 goto out;
 450
 451         if (channel->vbus) {
 452                 ret = regulator_enable(channel->vbus);
 453                 if (ret)
 454                         goto out;
 455         }
 456
 457         val = readl(usb2_base + USB2_USBCTR);
 458         val |= USB2_USBCTR_PLL_RST;
 459         writel(val, usb2_base + USB2_USBCTR);
 460         val &= ~USB2_USBCTR_PLL_RST;
 461         writel(val, usb2_base + USB2_USBCTR);
 462
 463 out:
 464         /* The powered flag should be set for any other phys anyway */
 465         rphy->powered = true;
 466         mutex_unlock(&channel->lock);
 467
 468         return 0;
 469 }
 470
 471 static int rcar_gen3_phy_usb2_power_off(struct phy *p)
 472 {
 473         struct rcar_gen3_phy *rphy = phy_get_drvdata(p);
 474         struct rcar_gen3_chan *channel = rphy->ch;
 475         int ret = 0;
 476
 477         mutex_lock(&channel->lock);
 478         rphy->powered = false;
 479
 480         if (!rcar_gen3_are_all_rphys_power_off(channel))
 481                 goto out;
 482
 483         if (channel->vbus)
 484                 ret = regulator_disable(channel->vbus);
 485
 486 out:
 487         mutex_unlock(&channel->lock);
 488
 489         return ret;
 490 }
 491
 492 static const struct phy_ops rcar_gen3_phy_usb2_ops = {
 493         .init           = rcar_gen3_phy_usb2_init,
 494         .exit           = rcar_gen3_phy_usb2_exit,
 495         .power_on       = rcar_gen3_phy_usb2_power_on,
 496         .power_off      = rcar_gen3_phy_usb2_power_off,
 497         .owner          = THIS_MODULE,
 498 };
 499
 500 static const struct phy_ops rz_g1c_phy_usb2_ops = {
 501         .init           = rcar_gen3_phy_usb2_init,
 502         .exit           = rcar_gen3_phy_usb2_exit,
 503         .owner          = THIS_MODULE,
 504 };
 505
 506 static irqreturn_t rcar_gen3_phy_usb2_irq(int irq, void *_ch)
 507 {
 508         struct rcar_gen3_chan *ch = _ch;
 509         void __iomem *usb2_base = ch->base;
 510         u32 status = readl(usb2_base + USB2_OBINTSTA);
 511         irqreturn_t ret = IRQ_NONE;
 512
 513         if (status & USB2_OBINT_BITS) {
 514                 dev_vdbg(ch->dev, "%s: %08x\n", __func__, status);
 515                 writel(USB2_OBINT_BITS, usb2_base + USB2_OBINTSTA);
 516                 rcar_gen3_device_recognition(ch);
 517                 ret = IRQ_HANDLED;
 518         }
 519
 520         return ret;
 521 }
 522
 523 static const struct of_device_id rcar_gen3_phy_usb2_match_table[] = {
 524         {
 525                 .compatible = "renesas,usb2-phy-r8a77470",
 526                 .data = &rz_g1c_phy_usb2_ops,
 527         },
 528         {
 529                 .compatible = "renesas,usb2-phy-r8a7795",
 530                 .data = &rcar_gen3_phy_usb2_ops,
 531         },
 532         {
 533                 .compatible = "renesas,usb2-phy-r8a7796",
 534                 .data = &rcar_gen3_phy_usb2_ops,
 535         },
 536         {
 537                 .compatible = "renesas,usb2-phy-r8a77965",
 538                 .data = &rcar_gen3_phy_usb2_ops,
 539         },
 540         {
 541                 .compatible = "renesas,rcar-gen3-usb2-phy",
 542                 .data = &rcar_gen3_phy_usb2_ops,
 543         },
 544         { /* sentinel */ },
 545 };
 546 MODULE_DEVICE_TABLE(of, rcar_gen3_phy_usb2_match_table);
 547
 548 static const unsigned int rcar_gen3_phy_cable[] = {
 549         EXTCON_USB,
 550         EXTCON_USB_HOST,
 551         EXTCON_NONE,
 552 };
 553
 554 static struct phy *rcar_gen3_phy_usb2_xlate(struct device *dev,
 555                                             struct of_phandle_args *args)
 556 {
 557         struct rcar_gen3_chan *ch = dev_get_drvdata(dev);
 558
 559         if (args->args_count == 0)      /* For old version dts */
 560                 return ch->rphys[PHY_INDEX_BOTH_HC].phy;
 561         else if (args->args_count > 1)  /* Prevent invalid args count */
 562                 return ERR_PTR(-ENODEV);
 563
 564         if (args->args[0] >= NUM_OF_PHYS)
 565                 return ERR_PTR(-ENODEV);
 566
 567         return ch->rphys[args->args[0]].phy;
 568 }
 569
 570 static enum usb_dr_mode rcar_gen3_get_dr_mode(struct device_node *np)
 571 {
 572         enum usb_dr_mode candidate = USB_DR_MODE_UNKNOWN;
 573         int i;
 574
 575         /*
 576          * If one of device nodes has other dr_mode except UNKNOWN,
 577          * this function returns UNKNOWN. To achieve backward compatibility,
 578          * this loop starts the index as 0.
 579          */
 580         for (i = 0; i < NUM_OF_PHYS; i++) {
 581                 enum usb_dr_mode mode = of_usb_get_dr_mode_by_phy(np, i);
 582
 583                 if (mode != USB_DR_MODE_UNKNOWN) {
 584                         if (candidate == USB_DR_MODE_UNKNOWN)
 585                                 candidate = mode;
 586                         else if (candidate != mode)
 587                                 return USB_DR_MODE_UNKNOWN;
 588                 }
 589         }
 590
 591         return candidate;
 592 }
 593
 594 static int rcar_gen3_phy_usb2_probe(struct platform_device *pdev)
 595 {
 596         struct device *dev = &pdev->dev;
 597         struct rcar_gen3_chan *channel;
 598         struct phy_provider *provider;
 599         struct resource *res;
 600         const struct phy_ops *phy_usb2_ops;
 601         int irq, ret = 0, i;
 602
 603         if (!dev->of_node) {
 604                 dev_err(dev, "This driver needs device tree\n");
 605                 return -EINVAL;
 606         }
 607
 608         channel = devm_kzalloc(dev, sizeof(*channel), GFP_KERNEL);
 609         if (!channel)
 610                 return -ENOMEM;
 611
 612         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 613         channel->base = devm_ioremap_resource(dev, res);
 614         if (IS_ERR(channel->base))
 615                 return PTR_ERR(channel->base);
 616
 617         /* call request_irq for OTG */
 618         irq = platform_get_irq_optional(pdev, 0);
 619         if (irq >= 0) {
 620                 INIT_WORK(&channel->work, rcar_gen3_phy_usb2_work);
 621                 irq = devm_request_irq(dev, irq, rcar_gen3_phy_usb2_irq,
 622                                        IRQF_SHARED, dev_name(dev), channel);
 623                 if (irq < 0)
 624                         dev_err(dev, "No irq handler (%d)\n", irq);
 625         }
 626
 627         channel->dr_mode = rcar_gen3_get_dr_mode(dev->of_node);
 628         if (channel->dr_mode != USB_DR_MODE_UNKNOWN) {
 629                 int ret;
 630
 631                 channel->is_otg_channel = true;
 632                 channel->uses_otg_pins = !of_property_read_bool(dev->of_node,
 633                                                         "renesas,no-otg-pins");
 634                 channel->extcon = devm_extcon_dev_allocate(dev,
 635                                                         rcar_gen3_phy_cable);
 636                 if (IS_ERR(channel->extcon))
 637                         return PTR_ERR(channel->extcon);
 638
 639                 ret = devm_extcon_dev_register(dev, channel->extcon);
 640                 if (ret < 0) {
 641                         dev_err(dev, "Failed to register extcon\n");
 642                         return ret;
 643                 }
 644         }
 645
 646         /*
 647          * devm_phy_create() will call pm_runtime_enable(&phy->dev);
 648          * And then, phy-core will manage runtime pm for this device.
 649          */
 650         pm_runtime_enable(dev);
 651         phy_usb2_ops = of_device_get_match_data(dev);
 652         if (!phy_usb2_ops)
 653                 return -EINVAL;
 654
 655         mutex_init(&channel->lock);
 656         for (i = 0; i < NUM_OF_PHYS; i++) {
 657                 channel->rphys[i].phy = devm_phy_create(dev, NULL,
 658                                                         phy_usb2_ops);
 659                 if (IS_ERR(channel->rphys[i].phy)) {
 660                         dev_err(dev, "Failed to create USB2 PHY\n");
 661                         ret = PTR_ERR(channel->rphys[i].phy);
 662                         goto error;
 663                 }
 664                 channel->rphys[i].ch = channel;
 665                 channel->rphys[i].int_enable_bits = rcar_gen3_int_enable[i];
 666                 phy_set_drvdata(channel->rphys[i].phy, &channel->rphys[i]);
 667         }
 668
 669         channel->vbus = devm_regulator_get_optional(dev, "vbus");
 670         if (IS_ERR(channel->vbus)) {
 671                 if (PTR_ERR(channel->vbus) == -EPROBE_DEFER) {
 672                         ret = PTR_ERR(channel->vbus);
 673                         goto error;
 674                 }
 675                 channel->vbus = NULL;
 676         }
 677
 678         platform_set_drvdata(pdev, channel);
 679         channel->dev = dev;
 680
 681         provider = devm_of_phy_provider_register(dev, rcar_gen3_phy_usb2_xlate);
 682         if (IS_ERR(provider)) {
 683                 dev_err(dev, "Failed to register PHY provider\n");
 684                 ret = PTR_ERR(provider);
 685                 goto error;
 686         } else if (channel->is_otg_channel) {
 687                 int ret;
 688
 689                 ret = device_create_file(dev, &dev_attr_role);
 690                 if (ret < 0)
 691                         goto error;
 692         }
 693
 694         return 0;
 695
 696 error:
 697         pm_runtime_disable(dev);
 698
 699         return ret;
 700 }
 701
 702 static int rcar_gen3_phy_usb2_remove(struct platform_device *pdev)
 703 {
 704         struct rcar_gen3_chan *channel = platform_get_drvdata(pdev);
 705
 706         if (channel->is_otg_channel)
 707                 device_remove_file(&pdev->dev, &dev_attr_role);
 708
 709         pm_runtime_disable(&pdev->dev);
 710
 711         return 0;
 712 };
 713
 714 static struct platform_driver rcar_gen3_phy_usb2_driver = {
 715         .driver = {
 716                 .name           = "phy_rcar_gen3_usb2",
 717                 .of_match_table = rcar_gen3_phy_usb2_match_table,
 718         },
 719         .probe  = rcar_gen3_phy_usb2_probe,
 720         .remove = rcar_gen3_phy_usb2_remove,
 721 };
 722 module_platform_driver(rcar_gen3_phy_usb2_driver);
 723
 724 MODULE_LICENSE("GPL v2");
 725 MODULE_DESCRIPTION("Renesas R-Car Gen3 USB 2.0 PHY");
 726 MODULE_AUTHOR("Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>");