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dm writecache: add cond_resched to loop in persistent_memory_claim()
[linux/fpc-iii.git] / drivers / tty / serial / 8250 / 8250_mtk.c
blobf839380c2f4c159a1ca617f555d8d45a5c1393e8
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Mediatek 8250 driver.
4 *
5 * Copyright (c) 2014 MundoReader S.L.
6 * Author: Matthias Brugger <matthias.bgg@gmail.com>
7 */
8 #include <linux/clk.h>
9 #include <linux/io.h>
10 #include <linux/module.h>
11 #include <linux/of_irq.h>
12 #include <linux/of_platform.h>
13 #include <linux/pinctrl/consumer.h>
14 #include <linux/platform_device.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/serial_8250.h>
17 #include <linux/serial_reg.h>
18 #include <linux/console.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/tty.h>
21 #include <linux/tty_flip.h>
22
23 #include "8250.h"
24
25 #define MTK_UART_HIGHS 0x09 /* Highspeed register */
26 #define MTK_UART_SAMPLE_COUNT 0x0a /* Sample count register */
27 #define MTK_UART_SAMPLE_POINT 0x0b /* Sample point register */
28 #define MTK_UART_RATE_FIX 0x0d /* UART Rate Fix Register */
29 #define MTK_UART_ESCAPE_DAT 0x10 /* Escape Character register */
30 #define MTK_UART_ESCAPE_EN 0x11 /* Escape Enable register */
31 #define MTK_UART_DMA_EN 0x13 /* DMA Enable register */
32 #define MTK_UART_RXTRI_AD 0x14 /* RX Trigger address */
33 #define MTK_UART_FRACDIV_L 0x15 /* Fractional divider LSB address */
34 #define MTK_UART_FRACDIV_M 0x16 /* Fractional divider MSB address */
35 #define MTK_UART_DEBUG0 0x18
36 #define MTK_UART_IER_XOFFI 0x20 /* Enable XOFF character interrupt */
37 #define MTK_UART_IER_RTSI 0x40 /* Enable RTS Modem status interrupt */
38 #define MTK_UART_IER_CTSI 0x80 /* Enable CTS Modem status interrupt */
39
40 #define MTK_UART_EFR_EN 0x10 /* Enable enhancement feature */
41 #define MTK_UART_EFR_RTS 0x40 /* Enable hardware rx flow control */
42 #define MTK_UART_EFR_CTS 0x80 /* Enable hardware tx flow control */
43 #define MTK_UART_EFR_NO_SW_FC 0x0 /* no sw flow control */
44 #define MTK_UART_EFR_XON1_XOFF1 0xa /* XON1/XOFF1 as sw flow control */
45 #define MTK_UART_EFR_XON2_XOFF2 0x5 /* XON2/XOFF2 as sw flow control */
46 #define MTK_UART_EFR_SW_FC_MASK 0xf /* Enable CTS Modem status interrupt */
47 #define MTK_UART_EFR_HW_FC (MTK_UART_EFR_RTS | MTK_UART_EFR_CTS)
48 #define MTK_UART_DMA_EN_TX 0x2
49 #define MTK_UART_DMA_EN_RX 0x5
50
51 #define MTK_UART_ESCAPE_CHAR 0x77 /* Escape char added under sw fc */
52 #define MTK_UART_RX_SIZE 0x8000
53 #define MTK_UART_TX_TRIGGER 1
54 #define MTK_UART_RX_TRIGGER MTK_UART_RX_SIZE
55
56 #ifdef CONFIG_SERIAL_8250_DMA
57 enum dma_rx_status {
58 DMA_RX_START = 0,
59 DMA_RX_RUNNING = 1,
60 DMA_RX_SHUTDOWN = 2,
61 };
62 #endif
63
64 struct mtk8250_data {
65 int line;
66 unsigned int rx_pos;
67 unsigned int clk_count;
68 struct clk *uart_clk;
69 struct clk *bus_clk;
70 struct uart_8250_dma *dma;
71 #ifdef CONFIG_SERIAL_8250_DMA
72 enum dma_rx_status rx_status;
73 #endif
74 int rx_wakeup_irq;
75 };
76
77 /* flow control mode */
78 enum {
79 MTK_UART_FC_NONE,
80 MTK_UART_FC_SW,
81 MTK_UART_FC_HW,
82 };
83
84 #ifdef CONFIG_SERIAL_8250_DMA
85 static void mtk8250_rx_dma(struct uart_8250_port *up);
86
87 static void mtk8250_dma_rx_complete(void *param)
88 {
89 struct uart_8250_port *up = param;
90 struct uart_8250_dma *dma = up->dma;
91 struct mtk8250_data *data = up->port.private_data;
92 struct tty_port *tty_port = &up->port.state->port;
93 struct dma_tx_state state;
94 int copied, total, cnt;
95 unsigned char *ptr;
96
97 if (data->rx_status == DMA_RX_SHUTDOWN)
98 return;
99
100 dmaengine_tx_status(dma->rxchan, dma->rx_cookie, &state);
101 total = dma->rx_size - state.residue;
102 cnt = total;
103
104 if ((data->rx_pos + cnt) > dma->rx_size)
105 cnt = dma->rx_size - data->rx_pos;
106
107 ptr = (unsigned char *)(data->rx_pos + dma->rx_buf);
108 copied = tty_insert_flip_string(tty_port, ptr, cnt);
109 data->rx_pos += cnt;
110
111 if (total > cnt) {
112 ptr = (unsigned char *)(dma->rx_buf);
113 cnt = total - cnt;
114 copied += tty_insert_flip_string(tty_port, ptr, cnt);
115 data->rx_pos = cnt;
116 }
117
118 up->port.icount.rx += copied;
119
120 tty_flip_buffer_push(tty_port);
121
122 mtk8250_rx_dma(up);
123 }
124
125 static void mtk8250_rx_dma(struct uart_8250_port *up)
126 {
127 struct uart_8250_dma *dma = up->dma;
128 struct dma_async_tx_descriptor *desc;
129
130 desc = dmaengine_prep_slave_single(dma->rxchan, dma->rx_addr,
131 dma->rx_size, DMA_DEV_TO_MEM,
132 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
133 if (!desc) {
134 pr_err("failed to prepare rx slave single\n");
135 return;
136 }
137
138 desc->callback = mtk8250_dma_rx_complete;
139 desc->callback_param = up;
140
141 dma->rx_cookie = dmaengine_submit(desc);
142
143 dma_async_issue_pending(dma->rxchan);
144 }
145
146 static void mtk8250_dma_enable(struct uart_8250_port *up)
147 {
148 struct uart_8250_dma *dma = up->dma;
149 struct mtk8250_data *data = up->port.private_data;
150 int lcr = serial_in(up, UART_LCR);
151
152 if (data->rx_status != DMA_RX_START)
153 return;
154
155 dma->rxconf.src_port_window_size = dma->rx_size;
156 dma->rxconf.src_addr = dma->rx_addr;
157
158 dma->txconf.dst_port_window_size = UART_XMIT_SIZE;
159 dma->txconf.dst_addr = dma->tx_addr;
160
161 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR_CLEAR_RCVR |
162 UART_FCR_CLEAR_XMIT);
163 serial_out(up, MTK_UART_DMA_EN,
164 MTK_UART_DMA_EN_RX | MTK_UART_DMA_EN_TX);
165
166 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
167 serial_out(up, UART_EFR, UART_EFR_ECB);
168 serial_out(up, UART_LCR, lcr);
169
170 if (dmaengine_slave_config(dma->rxchan, &dma->rxconf) != 0)
171 pr_err("failed to configure rx dma channel\n");
172 if (dmaengine_slave_config(dma->txchan, &dma->txconf) != 0)
173 pr_err("failed to configure tx dma channel\n");
174
175 data->rx_status = DMA_RX_RUNNING;
176 data->rx_pos = 0;
177 mtk8250_rx_dma(up);
178 }
179 #endif
180
181 static int mtk8250_startup(struct uart_port *port)
182 {
183 #ifdef CONFIG_SERIAL_8250_DMA
184 struct uart_8250_port *up = up_to_u8250p(port);
185 struct mtk8250_data *data = port->private_data;
186
187 /* disable DMA for console */
188 if (uart_console(port))
189 up->dma = NULL;
190
191 if (up->dma) {
192 data->rx_status = DMA_RX_START;
193 uart_circ_clear(&port->state->xmit);
194 }
195 #endif
196 memset(&port->icount, 0, sizeof(port->icount));
197
198 return serial8250_do_startup(port);
199 }
200
201 static void mtk8250_shutdown(struct uart_port *port)
202 {
203 #ifdef CONFIG_SERIAL_8250_DMA
204 struct uart_8250_port *up = up_to_u8250p(port);
205 struct mtk8250_data *data = port->private_data;
206
207 if (up->dma)
208 data->rx_status = DMA_RX_SHUTDOWN;
209 #endif
210
211 return serial8250_do_shutdown(port);
212 }
213
214 static void mtk8250_disable_intrs(struct uart_8250_port *up, int mask)
215 {
216 serial_out(up, UART_IER, serial_in(up, UART_IER) & (~mask));
217 }
218
219 static void mtk8250_enable_intrs(struct uart_8250_port *up, int mask)
220 {
221 serial_out(up, UART_IER, serial_in(up, UART_IER) | mask);
222 }
223
224 static void mtk8250_set_flow_ctrl(struct uart_8250_port *up, int mode)
225 {
226 struct uart_port *port = &up->port;
227 int lcr = serial_in(up, UART_LCR);
228
229 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
230 serial_out(up, UART_EFR, UART_EFR_ECB);
231 serial_out(up, UART_LCR, lcr);
232 lcr = serial_in(up, UART_LCR);
233
234 switch (mode) {
235 case MTK_UART_FC_NONE:
236 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
237 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
238 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
239 serial_out(up, UART_EFR, serial_in(up, UART_EFR) &
240 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK)));
241 serial_out(up, UART_LCR, lcr);
242 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI |
243 MTK_UART_IER_RTSI | MTK_UART_IER_CTSI);
244 break;
245
246 case MTK_UART_FC_HW:
247 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
248 serial_out(up, MTK_UART_ESCAPE_EN, 0x00);
249 serial_out(up, UART_MCR, UART_MCR_RTS);
250 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
251
252 /*enable hw flow control*/
253 serial_out(up, UART_EFR, MTK_UART_EFR_HW_FC |
254 (serial_in(up, UART_EFR) &
255 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
256
257 serial_out(up, UART_LCR, lcr);
258 mtk8250_disable_intrs(up, MTK_UART_IER_XOFFI);
259 mtk8250_enable_intrs(up, MTK_UART_IER_CTSI | MTK_UART_IER_RTSI);
260 break;
261
262 case MTK_UART_FC_SW: /*MTK software flow control */
263 serial_out(up, MTK_UART_ESCAPE_DAT, MTK_UART_ESCAPE_CHAR);
264 serial_out(up, MTK_UART_ESCAPE_EN, 0x01);
265 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
266
267 /*enable sw flow control */
268 serial_out(up, UART_EFR, MTK_UART_EFR_XON1_XOFF1 |
269 (serial_in(up, UART_EFR) &
270 (~(MTK_UART_EFR_HW_FC | MTK_UART_EFR_SW_FC_MASK))));
271
272 serial_out(up, UART_XON1, START_CHAR(port->state->port.tty));
273 serial_out(up, UART_XOFF1, STOP_CHAR(port->state->port.tty));
274 serial_out(up, UART_LCR, lcr);
275 mtk8250_disable_intrs(up, MTK_UART_IER_CTSI|MTK_UART_IER_RTSI);
276 mtk8250_enable_intrs(up, MTK_UART_IER_XOFFI);
277 break;
278 default:
279 break;
280 }
281 }
282
283 static void
284 mtk8250_set_termios(struct uart_port *port, struct ktermios *termios,
285 struct ktermios *old)
286 {
287 unsigned short fraction_L_mapping[] = {
288 0, 1, 0x5, 0x15, 0x55, 0x57, 0x57, 0x77, 0x7F, 0xFF, 0xFF
289 };
290 unsigned short fraction_M_mapping[] = {
291 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 3
292 };
293 struct uart_8250_port *up = up_to_u8250p(port);
294 unsigned int baud, quot, fraction;
295 unsigned long flags;
296 int mode;
297
298 #ifdef CONFIG_SERIAL_8250_DMA
299 if (up->dma) {
300 if (uart_console(port)) {
301 devm_kfree(up->port.dev, up->dma);
302 up->dma = NULL;
303 } else {
304 mtk8250_dma_enable(up);
305 }
306 }
307 #endif
308
309 serial8250_do_set_termios(port, termios, old);
310
311 /*
312 * Mediatek UARTs use an extra highspeed register (MTK_UART_HIGHS)
313 *
314 * We need to recalcualte the quot register, as the claculation depends
315 * on the vaule in the highspeed register.
316 *
317 * Some baudrates are not supported by the chip, so we use the next
318 * lower rate supported and update termios c_flag.
319 *
320 * If highspeed register is set to 3, we need to specify sample count
321 * and sample point to increase accuracy. If not, we reset the
322 * registers to their default values.
323 */
324 baud = uart_get_baud_rate(port, termios, old,
325 port->uartclk / 16 / UART_DIV_MAX,
326 port->uartclk);
327
328 if (baud < 115200) {
329 serial_port_out(port, MTK_UART_HIGHS, 0x0);
330 quot = uart_get_divisor(port, baud);
331 } else {
332 serial_port_out(port, MTK_UART_HIGHS, 0x3);
333 quot = DIV_ROUND_UP(port->uartclk, 256 * baud);
334 }
335
336 /*
337 * Ok, we're now changing the port state. Do it with
338 * interrupts disabled.
339 */
340 spin_lock_irqsave(&port->lock, flags);
341
342 /* set DLAB we have cval saved in up->lcr from the call to the core */
343 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
344 serial_dl_write(up, quot);
345
346 /* reset DLAB */
347 serial_port_out(port, UART_LCR, up->lcr);
348
349 if (baud >= 115200) {
350 unsigned int tmp;
351
352 tmp = (port->uartclk / (baud * quot)) - 1;
353 serial_port_out(port, MTK_UART_SAMPLE_COUNT, tmp);
354 serial_port_out(port, MTK_UART_SAMPLE_POINT,
355 (tmp >> 1) - 1);
356
357 /*count fraction to set fractoin register */
358 fraction = ((port->uartclk * 100) / baud / quot) % 100;
359 fraction = DIV_ROUND_CLOSEST(fraction, 10);
360 serial_port_out(port, MTK_UART_FRACDIV_L,
361 fraction_L_mapping[fraction]);
362 serial_port_out(port, MTK_UART_FRACDIV_M,
363 fraction_M_mapping[fraction]);
364 } else {
365 serial_port_out(port, MTK_UART_SAMPLE_COUNT, 0x00);
366 serial_port_out(port, MTK_UART_SAMPLE_POINT, 0xff);
367 serial_port_out(port, MTK_UART_FRACDIV_L, 0x00);
368 serial_port_out(port, MTK_UART_FRACDIV_M, 0x00);
369 }
370
371 if ((termios->c_cflag & CRTSCTS) && (!(termios->c_iflag & CRTSCTS)))
372 mode = MTK_UART_FC_HW;
373 else if (termios->c_iflag & CRTSCTS)
374 mode = MTK_UART_FC_SW;
375 else
376 mode = MTK_UART_FC_NONE;
377
378 mtk8250_set_flow_ctrl(up, mode);
379
380 if (uart_console(port))
381 up->port.cons->cflag = termios->c_cflag;
382
383 spin_unlock_irqrestore(&port->lock, flags);
384 /* Don't rewrite B0 */
385 if (tty_termios_baud_rate(termios))
386 tty_termios_encode_baud_rate(termios, baud, baud);
387 }
388
389 static int __maybe_unused mtk8250_runtime_suspend(struct device *dev)
390 {
391 struct mtk8250_data *data = dev_get_drvdata(dev);
392 struct uart_8250_port *up = serial8250_get_port(data->line);
393
394 /* wait until UART in idle status */
395 while
396 (serial_in(up, MTK_UART_DEBUG0));
397
398 if (data->clk_count == 0U) {
399 dev_dbg(dev, "%s clock count is 0\n", __func__);
400 } else {
401 clk_disable_unprepare(data->bus_clk);
402 data->clk_count--;
403 }
404
405 return 0;
406 }
407
408 static int __maybe_unused mtk8250_runtime_resume(struct device *dev)
409 {
410 struct mtk8250_data *data = dev_get_drvdata(dev);
411 int err;
412
413 if (data->clk_count > 0U) {
414 dev_dbg(dev, "%s clock count is %d\n", __func__,
415 data->clk_count);
416 } else {
417 err = clk_prepare_enable(data->bus_clk);
418 if (err) {
419 dev_warn(dev, "Can't enable bus clock\n");
420 return err;
421 }
422 data->clk_count++;
423 }
424
425 return 0;
426 }
427
428 static void
429 mtk8250_do_pm(struct uart_port *port, unsigned int state, unsigned int old)
430 {
431 if (!state)
432 if (!mtk8250_runtime_resume(port->dev))
433 pm_runtime_get_sync(port->dev);
434
435 serial8250_do_pm(port, state, old);
436
437 if (state)
438 if (!pm_runtime_put_sync_suspend(port->dev))
439 mtk8250_runtime_suspend(port->dev);
440 }
441
442 #ifdef CONFIG_SERIAL_8250_DMA
443 static bool mtk8250_dma_filter(struct dma_chan *chan, void *param)
444 {
445 return false;
446 }
447 #endif
448
449 static int mtk8250_probe_of(struct platform_device *pdev, struct uart_port *p,
450 struct mtk8250_data *data)
451 {
452 #ifdef CONFIG_SERIAL_8250_DMA
453 int dmacnt;
454 #endif
455
456 data->uart_clk = devm_clk_get(&pdev->dev, "baud");
457 if (IS_ERR(data->uart_clk)) {
458 /*
459 * For compatibility with older device trees try unnamed
460 * clk when no baud clk can be found.
461 */
462 data->uart_clk = devm_clk_get(&pdev->dev, NULL);
463 if (IS_ERR(data->uart_clk)) {
464 dev_warn(&pdev->dev, "Can't get uart clock\n");
465 return PTR_ERR(data->uart_clk);
466 }
467
468 return 0;
469 }
470
471 data->bus_clk = devm_clk_get(&pdev->dev, "bus");
472 if (IS_ERR(data->bus_clk))
473 return PTR_ERR(data->bus_clk);
474
475 data->dma = NULL;
476 #ifdef CONFIG_SERIAL_8250_DMA
477 dmacnt = of_property_count_strings(pdev->dev.of_node, "dma-names");
478 if (dmacnt == 2) {
479 data->dma = devm_kzalloc(&pdev->dev, sizeof(*data->dma),
480 GFP_KERNEL);
481 if (!data->dma)
482 return -ENOMEM;
483
484 data->dma->fn = mtk8250_dma_filter;
485 data->dma->rx_size = MTK_UART_RX_SIZE;
486 data->dma->rxconf.src_maxburst = MTK_UART_RX_TRIGGER;
487 data->dma->txconf.dst_maxburst = MTK_UART_TX_TRIGGER;
488 }
489 #endif
490
491 return 0;
492 }
493
494 static int mtk8250_probe(struct platform_device *pdev)
495 {
496 struct uart_8250_port uart = {};
497 struct resource *regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
498 struct resource *irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
499 struct mtk8250_data *data;
500 int err;
501
502 if (!regs || !irq) {
503 dev_err(&pdev->dev, "no registers/irq defined\n");
504 return -EINVAL;
505 }
506
507 uart.port.membase = devm_ioremap(&pdev->dev, regs->start,
508 resource_size(regs));
509 if (!uart.port.membase)
510 return -ENOMEM;
511
512 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
513 if (!data)
514 return -ENOMEM;
515
516 data->clk_count = 0;
517
518 if (pdev->dev.of_node) {
519 err = mtk8250_probe_of(pdev, &uart.port, data);
520 if (err)
521 return err;
522 } else
523 return -ENODEV;
524
525 spin_lock_init(&uart.port.lock);
526 uart.port.mapbase = regs->start;
527 uart.port.irq = irq->start;
528 uart.port.pm = mtk8250_do_pm;
529 uart.port.type = PORT_16550;
530 uart.port.flags = UPF_BOOT_AUTOCONF | UPF_FIXED_PORT;
531 uart.port.dev = &pdev->dev;
532 uart.port.iotype = UPIO_MEM32;
533 uart.port.regshift = 2;
534 uart.port.private_data = data;
535 uart.port.shutdown = mtk8250_shutdown;
536 uart.port.startup = mtk8250_startup;
537 uart.port.set_termios = mtk8250_set_termios;
538 uart.port.uartclk = clk_get_rate(data->uart_clk);
539 #ifdef CONFIG_SERIAL_8250_DMA
540 if (data->dma)
541 uart.dma = data->dma;
542 #endif
543
544 /* Disable Rate Fix function */
545 writel(0x0, uart.port.membase +
546 (MTK_UART_RATE_FIX << uart.port.regshift));
547
548 platform_set_drvdata(pdev, data);
549
550 pm_runtime_enable(&pdev->dev);
551 err = mtk8250_runtime_resume(&pdev->dev);
552 if (err)
553 return err;
554
555 data->line = serial8250_register_8250_port(&uart);
556 if (data->line < 0)
557 return data->line;
558
559 data->rx_wakeup_irq = platform_get_irq_optional(pdev, 1);
560
561 return 0;
562 }
563
564 static int mtk8250_remove(struct platform_device *pdev)
565 {
566 struct mtk8250_data *data = platform_get_drvdata(pdev);
567
568 pm_runtime_get_sync(&pdev->dev);
569
570 serial8250_unregister_port(data->line);
571
572 pm_runtime_disable(&pdev->dev);
573 pm_runtime_put_noidle(&pdev->dev);
574
575 if (!pm_runtime_status_suspended(&pdev->dev))
576 mtk8250_runtime_suspend(&pdev->dev);
577
578 return 0;
579 }
580
581 static int __maybe_unused mtk8250_suspend(struct device *dev)
582 {
583 struct mtk8250_data *data = dev_get_drvdata(dev);
584 int irq = data->rx_wakeup_irq;
585 int err;
586
587 serial8250_suspend_port(data->line);
588
589 pinctrl_pm_select_sleep_state(dev);
590 if (irq >= 0) {
591 err = enable_irq_wake(irq);
592 if (err) {
593 dev_err(dev,
594 "failed to enable irq wake on IRQ %d: %d\n",
595 irq, err);
596 pinctrl_pm_select_default_state(dev);
597 serial8250_resume_port(data->line);
598 return err;
599 }
600 }
601
602 return 0;
603 }
604
605 static int __maybe_unused mtk8250_resume(struct device *dev)
606 {
607 struct mtk8250_data *data = dev_get_drvdata(dev);
608 int irq = data->rx_wakeup_irq;
609
610 if (irq >= 0)
611 disable_irq_wake(irq);
612 pinctrl_pm_select_default_state(dev);
613
614 serial8250_resume_port(data->line);
615
616 return 0;
617 }
618
619 static const struct dev_pm_ops mtk8250_pm_ops = {
620 SET_SYSTEM_SLEEP_PM_OPS(mtk8250_suspend, mtk8250_resume)
621 SET_RUNTIME_PM_OPS(mtk8250_runtime_suspend, mtk8250_runtime_resume,
622 NULL)
623 };
624
625 static const struct of_device_id mtk8250_of_match[] = {
626 { .compatible = "mediatek,mt6577-uart" },
627 { /* Sentinel */ }
628 };
629 MODULE_DEVICE_TABLE(of, mtk8250_of_match);
630
631 static struct platform_driver mtk8250_platform_driver = {
632 .driver = {
633 .name = "mt6577-uart",
634 .pm = &mtk8250_pm_ops,
635 .of_match_table = mtk8250_of_match,
636 },
637 .probe = mtk8250_probe,
638 .remove = mtk8250_remove,
639 };
640 module_platform_driver(mtk8250_platform_driver);
641
642 #ifdef CONFIG_SERIAL_8250_CONSOLE
643 static int __init early_mtk8250_setup(struct earlycon_device *device,
644 const char *options)
645 {
646 if (!device->port.membase)
647 return -ENODEV;
648
649 device->port.iotype = UPIO_MEM32;
650
651 return early_serial8250_setup(device, NULL);
652 }
653
654 OF_EARLYCON_DECLARE(mtk8250, "mediatek,mt6577-uart", early_mtk8250_setup);
655 #endif
656
657 MODULE_AUTHOR("Matthias Brugger");
658 MODULE_LICENSE("GPL");
659 MODULE_DESCRIPTION("Mediatek 8250 serial port driver");
Linux with added FPC-III support